From: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
To: Abel Vesa <abelvesa@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>, Jacky Bai <ping.bai@nxp.com>,
Ye Li <ye.li@nxp.com>, Dong Aisheng <aisheng.dong@nxp.com>
Cc: linux-clk@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Abel Vesa <abel.vesa@linaro.org>,
Peng Fan <peng.fan@nxp.com>
Subject: [PATCH v2 16/17] clk: imx: imx8qxp: Parent should be initialized earlier than the clock
Date: Fri, 10 May 2024 17:19:11 +0800 [thread overview]
Message-ID: <20240510-imx-clk-v2-16-c998f315d29c@nxp.com> (raw)
In-Reply-To: <20240510-imx-clk-v2-0-c998f315d29c@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
The initialization order of SCU clocks affects the sequence of SCU clock
resume. If there are no other effects, the earlier the initialization,
the earlier the resume. During SCU clock resume, the clock rate is
restored. As SCFW guidelines, configure the parent clock rate before
configuring the child rate.
Fixes: babfaa9556d7 ("clk: imx: scu: add more scu clocks")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
drivers/clk/imx/clk-imx8qxp.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c
index 47f4ceab1179..3ae162625bb1 100644
--- a/drivers/clk/imx/clk-imx8qxp.c
+++ b/drivers/clk/imx/clk-imx8qxp.c
@@ -186,8 +186,8 @@ static int imx8qxp_clk_probe(struct platform_device *pdev)
imx_clk_scu("pwm_clk", IMX_SC_R_LCD_0_PWM_0, IMX_SC_PM_CLK_PER);
imx_clk_scu("elcdif_pll", IMX_SC_R_ELCDIF_PLL, IMX_SC_PM_CLK_PLL);
imx_clk_scu2("lcd_clk", lcd_sels, ARRAY_SIZE(lcd_sels), IMX_SC_R_LCD_0, IMX_SC_PM_CLK_PER);
- imx_clk_scu2("lcd_pxl_clk", lcd_pxl_sels, ARRAY_SIZE(lcd_pxl_sels), IMX_SC_R_LCD_0, IMX_SC_PM_CLK_MISC0);
imx_clk_scu("lcd_pxl_bypass_div_clk", IMX_SC_R_LCD_0, IMX_SC_PM_CLK_BYPASS);
+ imx_clk_scu2("lcd_pxl_clk", lcd_pxl_sels, ARRAY_SIZE(lcd_pxl_sels), IMX_SC_R_LCD_0, IMX_SC_PM_CLK_MISC0);
/* Audio SS */
imx_clk_scu("audio_pll0_clk", IMX_SC_R_AUDIO_PLL_0, IMX_SC_PM_CLK_PLL);
@@ -229,11 +229,11 @@ static int imx8qxp_clk_probe(struct platform_device *pdev)
imx_clk_scu2("dc0_disp1_clk", dc0_sels, ARRAY_SIZE(dc0_sels), IMX_SC_R_DC_0, IMX_SC_PM_CLK_MISC1);
imx_clk_scu("dc0_bypass1_clk", IMX_SC_R_DC_0_VIDEO1, IMX_SC_PM_CLK_BYPASS);
- imx_clk_scu2("dc1_disp0_clk", dc1_sels, ARRAY_SIZE(dc1_sels), IMX_SC_R_DC_1, IMX_SC_PM_CLK_MISC0);
- imx_clk_scu2("dc1_disp1_clk", dc1_sels, ARRAY_SIZE(dc1_sels), IMX_SC_R_DC_1, IMX_SC_PM_CLK_MISC1);
imx_clk_scu("dc1_pll0_clk", IMX_SC_R_DC_1_PLL_0, IMX_SC_PM_CLK_PLL);
imx_clk_scu("dc1_pll1_clk", IMX_SC_R_DC_1_PLL_1, IMX_SC_PM_CLK_PLL);
imx_clk_scu("dc1_bypass0_clk", IMX_SC_R_DC_1_VIDEO0, IMX_SC_PM_CLK_BYPASS);
+ imx_clk_scu2("dc1_disp0_clk", dc1_sels, ARRAY_SIZE(dc1_sels), IMX_SC_R_DC_1, IMX_SC_PM_CLK_MISC0);
+ imx_clk_scu2("dc1_disp1_clk", dc1_sels, ARRAY_SIZE(dc1_sels), IMX_SC_R_DC_1, IMX_SC_PM_CLK_MISC1);
imx_clk_scu("dc1_bypass1_clk", IMX_SC_R_DC_1_VIDEO1, IMX_SC_PM_CLK_BYPASS);
/* MIPI-LVDS SS */
--
2.37.1
next prev parent reply other threads:[~2024-05-10 9:12 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-10 9:18 [PATCH v2 00/17] clk: imx: misc update/fix Peng Fan (OSS)
2024-05-10 9:18 ` [PATCH v2 01/17] clk: imx: composite-8m: Enable gate clk with mcore_booted Peng Fan (OSS)
2024-05-13 6:39 ` Sascha Hauer
2024-05-13 8:31 ` Peng Fan
2024-05-10 9:18 ` [PATCH v2 02/17] clk: imx: composite-93: keep root clock on when mcore enabled Peng Fan (OSS)
2024-05-10 9:18 ` [PATCH v2 03/17] clk: imx: composite-7ulp: Check the PCC present bit Peng Fan (OSS)
2024-05-13 6:54 ` Sascha Hauer
2024-05-10 9:18 ` [PATCH v2 04/17] clk: imx: fracn-gppll: fix fractional part of PLL getting lost Peng Fan (OSS)
2024-05-10 9:19 ` [PATCH v2 05/17] clk: imx: pll14xx: Add constraint for fvco frequency Peng Fan (OSS)
2024-05-13 12:13 ` Rasmus Villemoes
2024-05-13 12:39 ` Peng Fan
2024-05-13 12:28 ` Rasmus Villemoes
2024-05-13 12:42 ` Peng Fan
2024-05-13 12:40 ` Adam Ford
2024-05-10 9:19 ` [PATCH v2 06/17] clk: imx: pll14xx: use rate_table for audio plls Peng Fan (OSS)
2024-05-13 11:49 ` Rasmus Villemoes
2024-05-13 11:56 ` Peng Fan
2024-05-10 9:19 ` [PATCH v2 07/17] clk: imx: imx8mp-audiomix: remove sdma root clock Peng Fan (OSS)
2024-05-10 9:19 ` [PATCH v2 08/17] clk: imx: imx8mp: fix clock tree update of TF-A managed clocks Peng Fan (OSS)
2024-05-13 12:26 ` Ahmad Fatoum
2024-05-10 9:19 ` [PATCH v2 09/17] clk: imx: Remove CLK_SET_PARENT_GATE for DRAM mux for i.MX7D Peng Fan (OSS)
2024-05-10 9:19 ` [PATCH v2 10/17] clk: imx: add CLK_SET_RATE_PARENT for lcdif_pixel_src " Peng Fan (OSS)
2024-05-10 9:19 ` [PATCH v2 11/17] clk: imx: imx8mn: add sai7_ipg_clk clock settings Peng Fan (OSS)
2024-05-10 9:19 ` [PATCH v2 12/17] clk: imx: imx8mm: Change the 'nand_usdhc_bus' clock to non-critical one Peng Fan (OSS)
2024-05-10 9:19 ` [PATCH v2 13/17] clk: imx: imx8qxp: Add LVDS bypass clocks Peng Fan (OSS)
2024-05-10 9:19 ` [PATCH v2 14/17] clk: imx: imx8qxp: Add clock muxes for MIPI and PHY ref clocks Peng Fan (OSS)
2024-05-10 9:19 ` [PATCH v2 15/17] clk: imx: imx8qxp: Register dc0_bypass0_clk before disp clk Peng Fan (OSS)
2024-05-10 9:19 ` Peng Fan (OSS) [this message]
2024-05-10 9:19 ` [PATCH v2 17/17] clk: imx: fracn-gppll: update rate table Peng Fan (OSS)
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