From: Deepak Gupta <debug@rivosinc.com>
To: Charlie Jenkins <charlie@rivosinc.com>
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Subject: Re: [PATCH v3 01/29] riscv: envcfg save and restore on task switching
Date: Thu, 9 May 2024 12:00:36 -0700 [thread overview]
Message-ID: <Zj0dVJ20D05ELAoH@debug.ba.rivosinc.com> (raw)
In-Reply-To: <ZjwUhvLBv13qi77a@ghost>
On Wed, May 08, 2024 at 05:10:46PM -0700, Charlie Jenkins wrote:
>On Wed, Apr 03, 2024 at 04:34:49PM -0700, Deepak Gupta wrote:
>> envcfg CSR defines enabling bits for cache management instructions and
>> soon will control enabling for control flow integrity and pointer
>> masking features.
>>
>> Control flow integrity enabling for forward cfi and backward cfi are
>> controlled via envcfg and thus need to be enabled on per thread basis.
>>
>> This patch creates a place holder for envcfg CSR in `thread_info` and
>> adds logic to save and restore on task switching.
>>
>> Signed-off-by: Deepak Gupta <debug@rivosinc.com>
>> ---
>> arch/riscv/include/asm/switch_to.h | 10 ++++++++++
>> arch/riscv/include/asm/thread_info.h | 1 +
>> 2 files changed, 11 insertions(+)
>>
>> diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h
>> index 7efdb0584d47..2d9a00a30394 100644
>> --- a/arch/riscv/include/asm/switch_to.h
>> +++ b/arch/riscv/include/asm/switch_to.h
>> @@ -69,6 +69,15 @@ static __always_inline bool has_fpu(void) { return false; }
>> #define __switch_to_fpu(__prev, __next) do { } while (0)
>> #endif
>>
>> +static inline void __switch_to_envcfg(struct task_struct *next)
>> +{
>> + register unsigned long envcfg = next->thread_info.envcfg;
>
>This doesn't need the register storage class.
>
yeah. will fix it. thanks.
>> +
>> + asm volatile (ALTERNATIVE("nop", "csrw " __stringify(CSR_ENVCFG) ", %0", 0,
>> + RISCV_ISA_EXT_XLINUXENVCFG, 1)
>> + :: "r" (envcfg) : "memory");
>> +}
>> +
>
>Something like:
>
>static inline void __switch_to_envcfg(struct task_struct *next)
>{
> if (riscv_has_extension_unlikely(RISCV_ISA_EXT_XLINUXENVCFG))
> csr_write(CSR_ENVCFG, next->thread_info.envcfg);
>}
>
>would be easier to read, but the alternative you have written doesn't
>have the jump that riscv_has_extension_unlikely has so what you have
>will be more performant.
Yeah looked at codegen of `riscv_has_extension_unlikely` and I didn't like un-necessary jumps,
specially in switch_to path. All I want is a CSR write. So used alternative to patch nop with
CSR write.
>
>Does envcfg need to be save/restored always or just with
>CONFIG_RISCV_USER_CFI?
There is no save (no read of CSR). Only restore (writes to CSR).
There are pointer masking patches from Samuel Holland where senvcfg needs to be context
switched on per task basis.
https://lore.kernel.org/lkml/20240319215915.832127-1-samuel.holland@sifive.com/T/
Given that this CSR controls user execution environment and is per task basis, I thought its
better to not wrap it under CONFIG_RISCV_USER_CFI and rather make it dependend on
RISCV_ISA_EXT_XLINUXENVCFG. If any of the extensions which require senvcfg, then simply
restore this CSR on per task basis.
>
>- Charlie
>
>> extern struct task_struct *__switch_to(struct task_struct *,
>> struct task_struct *);
>>
>> @@ -80,6 +89,7 @@ do { \
>> __switch_to_fpu(__prev, __next); \
>> if (has_vector()) \
>> __switch_to_vector(__prev, __next); \
>> + __switch_to_envcfg(__next); \
>> ((last) = __switch_to(__prev, __next)); \
>> } while (0)
>>
>> diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h
>> index 5d473343634b..a503bdc2f6dd 100644
>> --- a/arch/riscv/include/asm/thread_info.h
>> +++ b/arch/riscv/include/asm/thread_info.h
>> @@ -56,6 +56,7 @@ struct thread_info {
>> long user_sp; /* User stack pointer */
>> int cpu;
>> unsigned long syscall_work; /* SYSCALL_WORK_ flags */
>> + unsigned long envcfg;
>> #ifdef CONFIG_SHADOW_CALL_STACK
>> void *scs_base;
>> void *scs_sp;
>> --
>> 2.43.2
>>
next prev parent reply other threads:[~2024-05-09 19:00 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-03 23:34 [PATCH v3 00/29] riscv control-flow integrity for usermode Deepak Gupta
2024-04-03 23:34 ` [PATCH v3 01/29] riscv: envcfg save and restore on task switching Deepak Gupta
2024-05-09 0:10 ` Charlie Jenkins
2024-05-09 19:00 ` Deepak Gupta [this message]
2024-04-03 23:34 ` [PATCH v3 02/29] riscv: define default value for envcfg for task Deepak Gupta
2024-05-10 22:33 ` Charlie Jenkins
2024-05-13 18:33 ` Deepak Gupta
2024-04-03 23:34 ` [PATCH v3 03/29] riscv/Kconfig: enable HAVE_EXIT_THREAD for riscv Deepak Gupta
2024-05-10 22:36 ` Charlie Jenkins
2024-04-03 23:34 ` [PATCH v3 04/29] riscv: zicfilp / zicfiss in dt-bindings (extensions.yaml) Deepak Gupta
2024-04-10 11:58 ` Rob Herring
2024-04-10 21:37 ` Deepak Gupta
2024-04-15 19:41 ` Rob Herring
2024-04-16 15:44 ` Deepak Gupta
2024-05-09 18:14 ` Conor Dooley
2024-05-09 18:46 ` Deepak Gupta
2024-05-09 20:32 ` Conor Dooley
2024-05-09 23:26 ` Deepak Gupta
2024-04-03 23:34 ` [PATCH v3 05/29] riscv: zicfiss / zicfilp enumeration Deepak Gupta
2024-05-09 0:00 ` Andy Chiu
2024-05-09 0:07 ` Charlie Jenkins
2024-04-03 23:34 ` [PATCH v3 06/29] riscv: zicfiss / zicfilp extension csr and bit definitions Deepak Gupta
2024-05-10 22:37 ` Charlie Jenkins
2024-04-03 23:34 ` [PATCH v3 07/29] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit Deepak Gupta
2024-05-10 22:51 ` Charlie Jenkins
2024-04-03 23:34 ` [PATCH v3 08/29] mm: Define VM_SHADOW_STACK for RISC-V Deepak Gupta
2024-04-04 18:58 ` David Hildenbrand
2024-04-04 19:04 ` Mark Brown
2024-04-04 19:15 ` David Hildenbrand
2024-04-04 19:21 ` Deepak Gupta
2024-04-03 23:34 ` [PATCH v3 09/29] mm: abstract shadow stack vma behind `vma_is_shadow_stack` Deepak Gupta
2024-04-04 19:02 ` David Hildenbrand
2024-04-04 21:39 ` Deepak Gupta
2024-04-03 23:34 ` [PATCH v3 10/29] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE Deepak Gupta
2024-05-10 21:02 ` Charlie Jenkins
2024-05-13 17:47 ` Deepak Gupta
2024-05-13 18:36 ` Charlie Jenkins
2024-05-13 18:41 ` Deepak Gupta
2024-05-13 21:26 ` Charlie Jenkins
2024-05-12 16:24 ` Alexandre Ghiti
2024-05-13 18:29 ` Deepak Gupta
2024-04-03 23:34 ` [PATCH v3 11/29] riscv mm: manufacture shadow stack pte Deepak Gupta
2024-05-12 16:26 ` Alexandre Ghiti
2024-04-03 23:35 ` [PATCH v3 12/29] riscv mmu: teach pte_mkwrite to manufacture shadow stack PTEs Deepak Gupta
2024-05-12 16:28 ` Alexandre Ghiti
2024-05-13 17:33 ` Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 13/29] riscv mmu: write protect and shadow stack Deepak Gupta
2024-05-12 16:31 ` Alexandre Ghiti
2024-05-13 17:32 ` Deepak Gupta
2024-05-23 14:59 ` Alexandre Ghiti
2024-05-24 7:16 ` Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 14/29] riscv/mm: Implement map_shadow_stack() syscall Deepak Gupta
2024-05-12 16:50 ` Alexandre Ghiti
2024-05-13 17:25 ` Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 15/29] riscv/shstk: If needed allocate a new shadow stack on clone Deepak Gupta
2024-05-12 17:05 ` Alexandre Ghiti
2024-05-13 17:10 ` Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 16/29] prctl: arch-agnostic prctl for shadow stack Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 17/29] prctl: arch-agnostic prctl for indirect branch tracking Deepak Gupta
2024-05-10 23:29 ` Charlie Jenkins
2024-05-13 18:31 ` Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 18/29] riscv: Implements arch agnostic shadow stack prctls Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 19/29] riscv: Implements arch agnostic indirect branch tracking prctls Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 20/29] riscv/kernel: update __show_regs to print shadow stack register Deepak Gupta
2024-05-12 17:10 ` Alexandre Ghiti
2024-04-03 23:35 ` [PATCH v3 21/29] riscv/traps: Introduce software check exception Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 22/29] riscv sigcontext: adding cfi state field in sigcontext Deepak Gupta
2024-05-24 9:46 ` Andy Chiu
2024-05-24 19:11 ` Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 23/29] riscv signal: Save and restore of shadow stack for signal Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 24/29] riscv/ptrace: riscv cfi status and state via ptrace and in core files Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 25/29] riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 26/29] riscv: create a config for shadow stack and landing pad instr support Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 27/29] riscv: Documentation for landing pad / indirect branch tracking Deepak Gupta
2024-05-10 20:30 ` Charlie Jenkins
2024-05-13 17:07 ` Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 28/29] riscv: Documentation for shadow stack on riscv Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 29/29] kselftest/riscv: kselftest for user mode cfi Deepak Gupta
2024-05-09 18:21 ` Charlie Jenkins
2024-05-09 19:16 ` Deepak Gupta
2024-05-10 1:20 ` Charlie Jenkins
2024-05-09 0:33 ` [PATCH v3 00/29] riscv control-flow integrity for usermode Charlie Jenkins
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