From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51735) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z5Tzk-0000Nn-E0 for qemu-devel@nongnu.org; Thu, 18 Jun 2015 03:12:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z5Tzf-00056L-Fe for qemu-devel@nongnu.org; Thu, 18 Jun 2015 03:12:16 -0400 Received: from mail.ispras.ru ([83.149.199.45]:57204) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z5Tzf-00055P-7q for qemu-devel@nongnu.org; Thu, 18 Jun 2015 03:12:11 -0400 From: "Pavel Dovgaluk" References: <20150617124158.3316.54954.stgit@PASHA-ISP> <20150617141901.GE19635@aurel32.net> In-Reply-To: <20150617141901.GE19635@aurel32.net> Date: Thu, 18 Jun 2015 10:12:13 +0300 Message-ID: <001101d0a996$19a72f80$4cf58e80$@Dovgaluk@ispras.ru> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Content-Language: ru Subject: Re: [Qemu-devel] [PATCH v2 0/3] Fix exceptions handling for MIPS and i386 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: 'Aurelien Jarno' Cc: pbonzini@redhat.com, rth7680@gmail.com, leon.alrae@imgtec.com, qemu-devel@nongnu.org > From: Aurelien Jarno [mailto:aurelien@aurel32.net] > On 2015-06-17 15:41, Pavel Dovgalyuk wrote: > > In icount mode every translation block looks as follows: > > > > if icount < n then exit > > icount -= n > > instr1 > > instr2 > > ... > > instrn > > exit > > > > When one of these instructions initiates an exception, icount should be > > restored and adjusted number of instructions should be subtracted from icount > > instead of initial n. > > > > tlb_fill function passes retaddr to raise_exception, which allows restoring > > current instructions in TB and correct icount calculation. > > > > When exception triggered with other function (e.g. by embedding call to > > exception raising helper into TB), then PC is not passed as retaddr and > > correct icount is not recovered. In such cases icount will be decreased > > by the value equal to the size of TB. > > Looking at how icount work, I see it's basically a variable in the CPU > state (icount_decr.u16.low), which is already accessed from the TB. > Couldn't we adjust it using additional code before generating an > exception, when in icount mode. > > For example for MIPS, we can add some code before generate_exception > which use the value from s->gen_opc_icount[j] to adjust > the variable icount_decr.u16.low. It is possible, but it will incur additional overhead, because we will have to update icount every time the exception might be generated. We'll have to update icount value before and after every helper call, that can cause an exception: icount -= n ... instr_k icount += n - k helper icount -= n - k ... And this overhead will slowdown the code even if no exception occur. Pavel Dovgalyuk