From: "Pavel Dovgaluk" <Pavel.Dovgaluk@ispras.ru>
To: 'Peter Maydell' <peter.maydell@linaro.org>
Cc: 'Paolo Bonzini' <pbonzini@redhat.com>,
'Richard Henderson' <rth7680@gmail.com>,
'Leon Alrae' <leon.alrae@imgtec.com>,
'QEMU Developers' <qemu-devel@nongnu.org>,
'Aurelien Jarno' <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [PATCH v2 0/3] Fix exceptions handling for MIPS and i386
Date: Thu, 18 Jun 2015 10:56:42 +0300 [thread overview]
Message-ID: <001201d0a99c$50f0b910$f2d22b30$@Dovgaluk@ispras.ru> (raw)
In-Reply-To: <CAFEAcA8Gp6f0bSS-MOgvdP2HcAWeGV7FeJOoM-u3jpcL-DTz9w@mail.gmail.com>
> From: Peter Maydell [mailto:peter.maydell@linaro.org]
> On 18 June 2015 at 08:12, Pavel Dovgaluk <Pavel.Dovgaluk@ispras.ru> wrote:
> >> From: Aurelien Jarno [mailto:aurelien@aurel32.net]
> >> Looking at how icount work, I see it's basically a variable in the CPU
> >> state (icount_decr.u16.low), which is already accessed from the TB.
> >> Couldn't we adjust it using additional code before generating an
> >> exception, when in icount mode.
> >>
> >> For example for MIPS, we can add some code before generate_exception
> >> which use the value from s->gen_opc_icount[j] to adjust
> >> the variable icount_decr.u16.low.
> >
> > It is possible, but it will incur additional overhead, because we will
> > have to update icount every time the exception might be generated.
> > We'll have to update icount value before and after every helper call,
> > that can cause an exception:
> >
> > icount -= n
> > ...
> > instr_k
> > icount += n - k
> > helper
> > icount -= n - k
> > ...
> >
> > And this overhead will slowdown the code even if no exception occur.
>
> Right, this is a tradeoff: in some cases it's faster to assume
> no exception and handle state resync by doing a retranslate.
> In some cases it's faster to assume there will be an exception
> and do a manual sync. Guest load/store is obviously in the
> first category. Guest doing an instruction which always takes
> an exception (like syscall insns) is in the second category.
> For other cases there's a choice. We need to support both
> approaches; obviously you can argue for any particular case
> whether it should be approach 1 or approach 2.
Syscall and non-implemented instructions are in third category - they
always take an exception. In this case the translation should be stopped
without any additional actions.
By the way, I implemented this 'third category' approach for mips
and measured the performance. It does not show any performance degradation
when compared to original unfixed version.
All other exception-generating helpers and instructions use approach 1.
Pavel Dovgalyuk
prev parent reply other threads:[~2015-06-18 7:56 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-17 12:41 [Qemu-devel] [PATCH v2 0/3] Fix exceptions handling for MIPS and i386 Pavel Dovgalyuk
2015-06-17 12:42 ` [Qemu-devel] [PATCH v2 1/3] softmmu: add helper function to pass through retaddr Pavel Dovgalyuk
2015-06-17 12:53 ` Paolo Bonzini
2015-06-18 5:17 ` Pavel Dovgaluk
2015-06-18 8:16 ` Paolo Bonzini
2015-06-18 8:20 ` Aurelien Jarno
2015-06-18 9:24 ` Pavel Dovgaluk
2015-06-18 9:30 ` Paolo Bonzini
2015-06-18 9:33 ` Pavel Dovgaluk
2015-06-18 9:35 ` Paolo Bonzini
2015-06-17 12:42 ` [Qemu-devel] [PATCH v2 2/3] target-mips: exceptions handling in icount mode Pavel Dovgalyuk
2015-06-17 13:05 ` Aurelien Jarno
2015-06-17 12:42 ` [Qemu-devel] [PATCH v2 3/3] target-i386: fix memory operations in helpers Pavel Dovgalyuk
2015-06-17 13:27 ` Aurelien Jarno
2015-06-17 13:24 ` [Qemu-devel] [PATCH v2 0/3] Fix exceptions handling for MIPS and i386 Aurelien Jarno
2015-06-18 6:18 ` Pavel Dovgaluk
2015-06-17 14:19 ` Aurelien Jarno
2015-06-18 7:12 ` Pavel Dovgaluk
2015-06-18 8:16 ` Aurelien Jarno
2015-06-18 8:58 ` Pavel Dovgaluk
2015-06-18 9:08 ` Aurelien Jarno
2015-06-18 9:29 ` Paolo Bonzini
2015-06-18 9:42 ` Aurelien Jarno
2015-06-18 10:02 ` Paolo Bonzini
2015-06-18 17:42 ` Aurelien Jarno
2015-06-19 5:09 ` Pavel Dovgaluk
2015-06-19 8:22 ` Aurelien Jarno
[not found] ` <55826f70.2215370a.4634.ffff91b2SMTPIN_ADDED_BROKEN@mx.google.com>
2015-06-18 7:51 ` Peter Maydell
2015-06-18 7:56 ` Pavel Dovgaluk [this message]
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