diff for duplicates of <1409585324-3678-3-git-send-email-lorenzo.pieralisi@arm.com> diff --git a/a/1.txt b/N1/1.txt index c9e4a04..9134ec6 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -28,12 +28,12 @@ Thus, this patch also adds a property in the PSCI bindings that describes how the PSCI CPU suspend power_state parameter should be defined in DT in all device nodes that rely on PSCI CPU suspend method usage. -Acked-by: Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org> -Acked-by: Daniel Lezcano <daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> -Acked-by: Nicolas Pitre <nico-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> -Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> -Reviewed-by: Sebastian Capella <sebcape-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> -Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org> +Acked-by: Catalin Marinas <catalin.marinas@arm.com> +Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> +Acked-by: Nicolas Pitre <nico@linaro.org> +Reviewed-by: Rob Herring <robh@kernel.org> +Reviewed-by: Sebastian Capella <sebcape@gmail.com> +Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> --- Documentation/devicetree/bindings/arm/cpus.txt | 8 + .../devicetree/bindings/arm/idle-states.txt | 679 +++++++++++++++++++++ @@ -266,7 +266,7 @@ index 0000000..37375c7 +state IDLE2 implies that after a suitable time, IDLE2 becomes more energy +efficient. + -+The time at which IDLE2 becomes more energy efficient than IDLE1 (and other ++The time@which IDLE2 becomes more energy efficient than IDLE1 (and other +shallower states in a system with multiple idle states) is defined +IDLE2-min-residency and corresponds to the time when energy consumption of +IDLE1 and IDLE2 states breaks even. @@ -404,7 +404,7 @@ index 0000000..37375c7 + #size-cells = <0>; + #address-cells = <2>; + -+ CPU0: cpu@0 { ++ CPU0: cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x0>; @@ -413,7 +413,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU1: cpu@1 { ++ CPU1: cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x1>; @@ -422,7 +422,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU2: cpu@100 { ++ CPU2: cpu at 100 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x100>; @@ -431,7 +431,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU3: cpu@101 { ++ CPU3: cpu at 101 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x101>; @@ -440,7 +440,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU4: cpu@10000 { ++ CPU4: cpu at 10000 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x10000>; @@ -449,7 +449,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU5: cpu@10001 { ++ CPU5: cpu at 10001 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x10001>; @@ -458,7 +458,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU6: cpu@10100 { ++ CPU6: cpu at 10100 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x10100>; @@ -467,7 +467,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU7: cpu@10101 { ++ CPU7: cpu at 10101 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x10101>; @@ -476,7 +476,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU8: cpu@100000000 { ++ CPU8: cpu at 100000000 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1 0x0>; @@ -485,7 +485,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; + }; + -+ CPU9: cpu@100000001 { ++ CPU9: cpu at 100000001 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1 0x1>; @@ -494,7 +494,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; + }; + -+ CPU10: cpu@100000100 { ++ CPU10: cpu at 100000100 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1 0x100>; @@ -503,7 +503,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; + }; + -+ CPU11: cpu@100000101 { ++ CPU11: cpu at 100000101 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1 0x101>; @@ -512,7 +512,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; + }; + -+ CPU12: cpu@100010000 { ++ CPU12: cpu at 100010000 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1 0x10000>; @@ -521,7 +521,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; + }; + -+ CPU13: cpu@100010001 { ++ CPU13: cpu at 100010001 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1 0x10001>; @@ -530,7 +530,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; + }; + -+ CPU14: cpu@100010100 { ++ CPU14: cpu at 100010100 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1 0x10100>; @@ -539,7 +539,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; + }; + -+ CPU15: cpu@100010101 { ++ CPU15: cpu at 100010101 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1 0x10101>; @@ -635,56 +635,56 @@ index 0000000..37375c7 + #size-cells = <0>; + #address-cells = <1>; + -+ CPU0: cpu@0 { ++ CPU0: cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x0>; + cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU1: cpu@1 { ++ CPU1: cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x1>; + cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU2: cpu@2 { ++ CPU2: cpu at 2 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x2>; + cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU3: cpu@3 { ++ CPU3: cpu at 3 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x3>; + cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU4: cpu@100 { ++ CPU4: cpu at 100 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x100>; + cpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>; + }; + -+ CPU5: cpu@101 { ++ CPU5: cpu at 101 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x101>; + cpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>; + }; + -+ CPU6: cpu@102 { ++ CPU6: cpu at 102 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x102>; + cpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>; + }; + -+ CPU7: cpu@103 { ++ CPU7: cpu at 103 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x103>; @@ -787,9 +787,3 @@ index b4a58f3..5aa40ed 100644 + Documentation/devicetree/bindings/arm/idle-states.txt -- 1.9.1 - - --- -To unsubscribe from this list: send the line "unsubscribe devicetree" in -the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org -More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index f35be56..88f1efe 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,10 +2,7 @@ "ref\0001409585324-3678-1-git-send-email-lorenzo.pieralisi\@arm.com\0" ] [ - "ref\0001409585324-3678-1-git-send-email-lorenzo.pieralisi-5wv7dgnIgG8\@public.gmane.org\0" -] -[ - "From\0Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8\@public.gmane.org>\0" + "From\0lorenzo.pieralisi\@arm.com (Lorenzo Pieralisi)\0" ] [ "Subject\0[PATCH v8 2/8] Documentation: arm: define DT idle states bindings\0" @@ -14,33 +11,7 @@ "Date\0Mon, 1 Sep 2014 16:28:38 +0100\0" ] [ - "To\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r\@public.gmane.org", - " linux-pm-u79uwXL29TY76Z2rM5mHXA\@public.gmane.org\0" -] -[ - "Cc\0devicetree-u79uwXL29TY76Z2rM5mHXA\@public.gmane.org", - " Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8\@public.gmane.org>", - " Mark Rutland <mark.rutland-5wv7dgnIgG8\@public.gmane.org>", - " Sudeep Holla <sudeep.holla-5wv7dgnIgG8\@public.gmane.org>", - " Catalin Marinas <catalin.marinas-5wv7dgnIgG8\@public.gmane.org>", - " Charles Garcia Tobin <Charles.Garcia-Tobin-5wv7dgnIgG8\@public.gmane.org>", - " Nicolas Pitre <nico-QSEj5FYQhm4dnm+yROfE0A\@public.gmane.org>", - " Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A\@public.gmane.org>", - " Grant Likely <grant.likely-QSEj5FYQhm4dnm+yROfE0A\@public.gmane.org>", - " Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>", - " Santosh Shilimkar <santosh.shilimkar-l0cyMroinI0\@public.gmane.org>", - " Daniel Lezcano <daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A\@public.gmane.org>", - " Amit Kucheria <amit.kucheria-QSEj5FYQhm4dnm+yROfE0A\@public.gmane.org>", - " Vincent Guittot <vincent.guittot-QSEj5FYQhm4dnm+yROfE0A\@public.gmane.org>", - " Antti Miettinen <ananaza-X3B1VOXEql0\@public.gmane.org>", - " Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ\@public.gmane.org>", - " Kevin Hilman <khilman-QSEj5FYQhm4dnm+yROfE0A\@public.gmane.org>", - " Sebastian Capella <sebcape-Re5JQEeQqe8AvxtiuMwx3w\@public.gmane.org>", - " Tomasz Figa <t.figa-Sze3O3UU22JBDgjK7y7TUQ\@public.gmane.org>", - " Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A\@public.gmane.org>", - " Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w\@public.gmane.org>", - " Chander Kashyap <k.chander-Sze3O3UU22JBDgjK7y7TUQ\@public.gmane.org>", - " Geoff\0" + "To\0linux-arm-kernel\@lists.infradead.org\0" ] [ "\0000:1\0" @@ -79,12 +50,12 @@ "describes how the PSCI CPU suspend power_state parameter should be\n", "defined in DT in all device nodes that rely on PSCI CPU suspend method usage.\n", "\n", - "Acked-by: Catalin Marinas <catalin.marinas-5wv7dgnIgG8\@public.gmane.org>\n", - "Acked-by: Daniel Lezcano <daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A\@public.gmane.org>\n", - "Acked-by: Nicolas Pitre <nico-QSEj5FYQhm4dnm+yROfE0A\@public.gmane.org>\n", - "Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A\@public.gmane.org>\n", - "Reviewed-by: Sebastian Capella <sebcape-Re5JQEeQqe8AvxtiuMwx3w\@public.gmane.org>\n", - "Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8\@public.gmane.org>\n", + "Acked-by: Catalin Marinas <catalin.marinas\@arm.com>\n", + "Acked-by: Daniel Lezcano <daniel.lezcano\@linaro.org>\n", + "Acked-by: Nicolas Pitre <nico\@linaro.org>\n", + "Reviewed-by: Rob Herring <robh\@kernel.org>\n", + "Reviewed-by: Sebastian Capella <sebcape\@gmail.com>\n", + "Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi\@arm.com>\n", "---\n", " Documentation/devicetree/bindings/arm/cpus.txt | 8 +\n", " .../devicetree/bindings/arm/idle-states.txt | 679 +++++++++++++++++++++\n", @@ -317,7 +288,7 @@ "+state IDLE2 implies that after a suitable time, IDLE2 becomes more energy\n", "+efficient.\n", "+\n", - "+The time at which IDLE2 becomes more energy efficient than IDLE1 (and other\n", + "+The time\@which IDLE2 becomes more energy efficient than IDLE1 (and other\n", "+shallower states in a system with multiple idle states) is defined\n", "+IDLE2-min-residency and corresponds to the time when energy consumption of\n", "+IDLE1 and IDLE2 states breaks even.\n", @@ -455,7 +426,7 @@ "+\t#size-cells = <0>;\n", "+\t#address-cells = <2>;\n", "+\n", - "+\tCPU0: cpu\@0 {\n", + "+\tCPU0: cpu at 0 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a57\";\n", "+\t\treg = <0x0 0x0>;\n", @@ -464,7 +435,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU1: cpu\@1 {\n", + "+\tCPU1: cpu at 1 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a57\";\n", "+\t\treg = <0x0 0x1>;\n", @@ -473,7 +444,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU2: cpu\@100 {\n", + "+\tCPU2: cpu at 100 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a57\";\n", "+\t\treg = <0x0 0x100>;\n", @@ -482,7 +453,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU3: cpu\@101 {\n", + "+\tCPU3: cpu at 101 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a57\";\n", "+\t\treg = <0x0 0x101>;\n", @@ -491,7 +462,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU4: cpu\@10000 {\n", + "+\tCPU4: cpu at 10000 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a57\";\n", "+\t\treg = <0x0 0x10000>;\n", @@ -500,7 +471,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU5: cpu\@10001 {\n", + "+\tCPU5: cpu at 10001 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a57\";\n", "+\t\treg = <0x0 0x10001>;\n", @@ -509,7 +480,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU6: cpu\@10100 {\n", + "+\tCPU6: cpu at 10100 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a57\";\n", "+\t\treg = <0x0 0x10100>;\n", @@ -518,7 +489,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU7: cpu\@10101 {\n", + "+\tCPU7: cpu at 10101 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a57\";\n", "+\t\treg = <0x0 0x10101>;\n", @@ -527,7 +498,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU8: cpu\@100000000 {\n", + "+\tCPU8: cpu at 100000000 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a53\";\n", "+\t\treg = <0x1 0x0>;\n", @@ -536,7 +507,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU9: cpu\@100000001 {\n", + "+\tCPU9: cpu at 100000001 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a53\";\n", "+\t\treg = <0x1 0x1>;\n", @@ -545,7 +516,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU10: cpu\@100000100 {\n", + "+\tCPU10: cpu at 100000100 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a53\";\n", "+\t\treg = <0x1 0x100>;\n", @@ -554,7 +525,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU11: cpu\@100000101 {\n", + "+\tCPU11: cpu at 100000101 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a53\";\n", "+\t\treg = <0x1 0x101>;\n", @@ -563,7 +534,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU12: cpu\@100010000 {\n", + "+\tCPU12: cpu at 100010000 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a53\";\n", "+\t\treg = <0x1 0x10000>;\n", @@ -572,7 +543,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU13: cpu\@100010001 {\n", + "+\tCPU13: cpu at 100010001 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a53\";\n", "+\t\treg = <0x1 0x10001>;\n", @@ -581,7 +552,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU14: cpu\@100010100 {\n", + "+\tCPU14: cpu at 100010100 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a53\";\n", "+\t\treg = <0x1 0x10100>;\n", @@ -590,7 +561,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU15: cpu\@100010101 {\n", + "+\tCPU15: cpu at 100010101 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a53\";\n", "+\t\treg = <0x1 0x10101>;\n", @@ -686,56 +657,56 @@ "+\t#size-cells = <0>;\n", "+\t#address-cells = <1>;\n", "+\n", - "+\tCPU0: cpu\@0 {\n", + "+\tCPU0: cpu at 0 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a15\";\n", "+\t\treg = <0x0>;\n", "+\t\tcpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU1: cpu\@1 {\n", + "+\tCPU1: cpu at 1 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a15\";\n", "+\t\treg = <0x1>;\n", "+\t\tcpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU2: cpu\@2 {\n", + "+\tCPU2: cpu at 2 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a15\";\n", "+\t\treg = <0x2>;\n", "+\t\tcpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU3: cpu\@3 {\n", + "+\tCPU3: cpu at 3 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a15\";\n", "+\t\treg = <0x3>;\n", "+\t\tcpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU4: cpu\@100 {\n", + "+\tCPU4: cpu at 100 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a7\";\n", "+\t\treg = <0x100>;\n", "+\t\tcpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU5: cpu\@101 {\n", + "+\tCPU5: cpu at 101 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a7\";\n", "+\t\treg = <0x101>;\n", "+\t\tcpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU6: cpu\@102 {\n", + "+\tCPU6: cpu at 102 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a7\";\n", "+\t\treg = <0x102>;\n", "+\t\tcpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU7: cpu\@103 {\n", + "+\tCPU7: cpu at 103 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a7\";\n", "+\t\treg = <0x103>;\n", @@ -837,13 +808,7 @@ "+[1] Kernel documentation - ARM idle states bindings\n", "+ Documentation/devicetree/bindings/arm/idle-states.txt\n", "-- \n", - "1.9.1\n", - "\n", - "\n", - "--\n", - "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n", - "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA\@public.gmane.org\n", - "More majordomo info at http://vger.kernel.org/majordomo-info.html" + "1.9.1" ] -b8619709c6c44ef6c81b4a076d867cc46cc439e7c562aedd8ace649ddf54628e +f04ced0640bc309d39bd9080d53ebf3441b6f8ceb6321e08b5c9713c14d381c1
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