diff for duplicates of <1409938498-17984-2-git-send-email-lorenzo.pieralisi@arm.com> diff --git a/a/1.txt b/N1/1.txt index 6fa88fb..9134ec6 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -266,7 +266,7 @@ index 0000000..37375c7 +state IDLE2 implies that after a suitable time, IDLE2 becomes more energy +efficient. + -+The time at which IDLE2 becomes more energy efficient than IDLE1 (and other ++The time@which IDLE2 becomes more energy efficient than IDLE1 (and other +shallower states in a system with multiple idle states) is defined +IDLE2-min-residency and corresponds to the time when energy consumption of +IDLE1 and IDLE2 states breaks even. @@ -404,7 +404,7 @@ index 0000000..37375c7 + #size-cells = <0>; + #address-cells = <2>; + -+ CPU0: cpu@0 { ++ CPU0: cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x0>; @@ -413,7 +413,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU1: cpu@1 { ++ CPU1: cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x1>; @@ -422,7 +422,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU2: cpu@100 { ++ CPU2: cpu at 100 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x100>; @@ -431,7 +431,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU3: cpu@101 { ++ CPU3: cpu at 101 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x101>; @@ -440,7 +440,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU4: cpu@10000 { ++ CPU4: cpu at 10000 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x10000>; @@ -449,7 +449,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU5: cpu@10001 { ++ CPU5: cpu at 10001 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x10001>; @@ -458,7 +458,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU6: cpu@10100 { ++ CPU6: cpu at 10100 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x10100>; @@ -467,7 +467,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU7: cpu@10101 { ++ CPU7: cpu at 10101 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x10101>; @@ -476,7 +476,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU8: cpu@100000000 { ++ CPU8: cpu at 100000000 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1 0x0>; @@ -485,7 +485,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; + }; + -+ CPU9: cpu@100000001 { ++ CPU9: cpu at 100000001 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1 0x1>; @@ -494,7 +494,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; + }; + -+ CPU10: cpu@100000100 { ++ CPU10: cpu at 100000100 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1 0x100>; @@ -503,7 +503,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; + }; + -+ CPU11: cpu@100000101 { ++ CPU11: cpu at 100000101 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1 0x101>; @@ -512,7 +512,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; + }; + -+ CPU12: cpu@100010000 { ++ CPU12: cpu at 100010000 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1 0x10000>; @@ -521,7 +521,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; + }; + -+ CPU13: cpu@100010001 { ++ CPU13: cpu at 100010001 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1 0x10001>; @@ -530,7 +530,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; + }; + -+ CPU14: cpu@100010100 { ++ CPU14: cpu at 100010100 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1 0x10100>; @@ -539,7 +539,7 @@ index 0000000..37375c7 + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; + }; + -+ CPU15: cpu@100010101 { ++ CPU15: cpu at 100010101 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1 0x10101>; @@ -635,56 +635,56 @@ index 0000000..37375c7 + #size-cells = <0>; + #address-cells = <1>; + -+ CPU0: cpu@0 { ++ CPU0: cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x0>; + cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU1: cpu@1 { ++ CPU1: cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x1>; + cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU2: cpu@2 { ++ CPU2: cpu at 2 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x2>; + cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU3: cpu@3 { ++ CPU3: cpu at 3 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x3>; + cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; + }; + -+ CPU4: cpu@100 { ++ CPU4: cpu at 100 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x100>; + cpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>; + }; + -+ CPU5: cpu@101 { ++ CPU5: cpu at 101 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x101>; + cpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>; + }; + -+ CPU6: cpu@102 { ++ CPU6: cpu at 102 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x102>; + cpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>; + }; + -+ CPU7: cpu@103 { ++ CPU7: cpu at 103 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x103>; diff --git a/a/content_digest b/N1/content_digest index 938c565..fab4608 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,7 +2,7 @@ "ref\0001409938498-17984-1-git-send-email-lorenzo.pieralisi\@arm.com\0" ] [ - "From\0Lorenzo Pieralisi <lorenzo.pieralisi\@arm.com>\0" + "From\0lorenzo.pieralisi\@arm.com (Lorenzo Pieralisi)\0" ] [ "Subject\0[PATCH v9 1/8] Documentation: arm: define DT idle states bindings\0" @@ -11,33 +11,7 @@ "Date\0Fri, 5 Sep 2014 18:34:50 +0100\0" ] [ - "To\0linux-arm-kernel\@lists.infradead.org", - " linux-pm\@vger.kernel.org\0" -] -[ - "Cc\0devicetree\@vger.kernel.org", - " Lorenzo Pieralisi <lorenzo.pieralisi\@arm.com>", - " Mark Rutland <mark.rutland\@arm.com>", - " Sudeep Holla <sudeep.holla\@arm.com>", - " Catalin Marinas <catalin.marinas\@arm.com>", - " Will Deacon <will.deacon\@arm.com>", - " Charles Garcia Tobin <Charles.Garcia-Tobin\@arm.com>", - " Nicolas Pitre <nico\@linaro.org>", - " Rob Herring <robh+dt\@kernel.org>", - " Grant Likely <grant.likely\@linaro.org>", - " Peter De Schrijver <pdeschrijver\@nvidia.com>", - " Santosh Shilimkar <santosh.shilimkar\@ti.com>", - " Daniel Lezcano <daniel.lezcano\@linaro.org>", - " Amit Kucheria <amit.kucheria\@linaro.org>", - " Vincent Guittot <vincent.guittot\@linaro.org>", - " Antti Miettinen <ananaza\@iki.fi>", - " Stephen Boyd <sboyd\@codeaurora.org>", - " Kevin Hilman <khilman\@linaro.org>", - " Sebastian Capella <sebcape\@gmail.com>", - " Mark Brown <broonie\@kernel.org>", - " Paul Walmsley <paul\@pwsan.com>", - " Chander Kashyap <k.chander\@samsung.com>", - " Geoff\0" + "To\0linux-arm-kernel\@lists.infradead.org\0" ] [ "\0000:1\0" @@ -314,7 +288,7 @@ "+state IDLE2 implies that after a suitable time, IDLE2 becomes more energy\n", "+efficient.\n", "+\n", - "+The time at which IDLE2 becomes more energy efficient than IDLE1 (and other\n", + "+The time\@which IDLE2 becomes more energy efficient than IDLE1 (and other\n", "+shallower states in a system with multiple idle states) is defined\n", "+IDLE2-min-residency and corresponds to the time when energy consumption of\n", "+IDLE1 and IDLE2 states breaks even.\n", @@ -452,7 +426,7 @@ "+\t#size-cells = <0>;\n", "+\t#address-cells = <2>;\n", "+\n", - "+\tCPU0: cpu\@0 {\n", + "+\tCPU0: cpu at 0 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a57\";\n", "+\t\treg = <0x0 0x0>;\n", @@ -461,7 +435,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU1: cpu\@1 {\n", + "+\tCPU1: cpu at 1 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a57\";\n", "+\t\treg = <0x0 0x1>;\n", @@ -470,7 +444,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU2: cpu\@100 {\n", + "+\tCPU2: cpu at 100 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a57\";\n", "+\t\treg = <0x0 0x100>;\n", @@ -479,7 +453,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU3: cpu\@101 {\n", + "+\tCPU3: cpu at 101 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a57\";\n", "+\t\treg = <0x0 0x101>;\n", @@ -488,7 +462,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU4: cpu\@10000 {\n", + "+\tCPU4: cpu at 10000 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a57\";\n", "+\t\treg = <0x0 0x10000>;\n", @@ -497,7 +471,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU5: cpu\@10001 {\n", + "+\tCPU5: cpu at 10001 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a57\";\n", "+\t\treg = <0x0 0x10001>;\n", @@ -506,7 +480,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU6: cpu\@10100 {\n", + "+\tCPU6: cpu at 10100 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a57\";\n", "+\t\treg = <0x0 0x10100>;\n", @@ -515,7 +489,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU7: cpu\@10101 {\n", + "+\tCPU7: cpu at 10101 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a57\";\n", "+\t\treg = <0x0 0x10101>;\n", @@ -524,7 +498,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU8: cpu\@100000000 {\n", + "+\tCPU8: cpu at 100000000 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a53\";\n", "+\t\treg = <0x1 0x0>;\n", @@ -533,7 +507,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU9: cpu\@100000001 {\n", + "+\tCPU9: cpu at 100000001 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a53\";\n", "+\t\treg = <0x1 0x1>;\n", @@ -542,7 +516,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU10: cpu\@100000100 {\n", + "+\tCPU10: cpu at 100000100 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a53\";\n", "+\t\treg = <0x1 0x100>;\n", @@ -551,7 +525,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU11: cpu\@100000101 {\n", + "+\tCPU11: cpu at 100000101 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a53\";\n", "+\t\treg = <0x1 0x101>;\n", @@ -560,7 +534,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU12: cpu\@100010000 {\n", + "+\tCPU12: cpu at 100010000 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a53\";\n", "+\t\treg = <0x1 0x10000>;\n", @@ -569,7 +543,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU13: cpu\@100010001 {\n", + "+\tCPU13: cpu at 100010001 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a53\";\n", "+\t\treg = <0x1 0x10001>;\n", @@ -578,7 +552,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU14: cpu\@100010100 {\n", + "+\tCPU14: cpu at 100010100 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a53\";\n", "+\t\treg = <0x1 0x10100>;\n", @@ -587,7 +561,7 @@ "+\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU15: cpu\@100010101 {\n", + "+\tCPU15: cpu at 100010101 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a53\";\n", "+\t\treg = <0x1 0x10101>;\n", @@ -683,56 +657,56 @@ "+\t#size-cells = <0>;\n", "+\t#address-cells = <1>;\n", "+\n", - "+\tCPU0: cpu\@0 {\n", + "+\tCPU0: cpu at 0 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a15\";\n", "+\t\treg = <0x0>;\n", "+\t\tcpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU1: cpu\@1 {\n", + "+\tCPU1: cpu at 1 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a15\";\n", "+\t\treg = <0x1>;\n", "+\t\tcpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU2: cpu\@2 {\n", + "+\tCPU2: cpu at 2 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a15\";\n", "+\t\treg = <0x2>;\n", "+\t\tcpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU3: cpu\@3 {\n", + "+\tCPU3: cpu at 3 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a15\";\n", "+\t\treg = <0x3>;\n", "+\t\tcpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;\n", "+\t};\n", "+\n", - "+\tCPU4: cpu\@100 {\n", + "+\tCPU4: cpu at 100 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a7\";\n", "+\t\treg = <0x100>;\n", "+\t\tcpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU5: cpu\@101 {\n", + "+\tCPU5: cpu at 101 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a7\";\n", "+\t\treg = <0x101>;\n", "+\t\tcpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU6: cpu\@102 {\n", + "+\tCPU6: cpu at 102 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a7\";\n", "+\t\treg = <0x102>;\n", "+\t\tcpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>;\n", "+\t};\n", "+\n", - "+\tCPU7: cpu\@103 {\n", + "+\tCPU7: cpu at 103 {\n", "+\t\tdevice_type = \"cpu\";\n", "+\t\tcompatible = \"arm,cortex-a7\";\n", "+\t\treg = <0x103>;\n", @@ -837,4 +811,4 @@ "1.9.1" ] -1564b09807b2472cbd0e86ae6fd966f7dccc68cd8f27c877bbd329e16472d582 +27f3f3ba1d616af007ce7d4a175beb50ae8d4eb23edba307b46252e76d8987b1
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