From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1423125AbbD2OAX (ORCPT ); Wed, 29 Apr 2015 10:00:23 -0400 Received: from mga01.intel.com ([192.55.52.88]:22511 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1422850AbbD2OAW (ORCPT ); Wed, 29 Apr 2015 10:00:22 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.11,671,1422950400"; d="scan'208";a="717790800" From: Shobhit Kumar To: intel-gfx , linux-kernel , linux-gpio , linux-pwm , dri-devel Cc: Linus Walleij , Alexandre Courbot , Daniel Vetter , David Airlie , Samuel Ortiz , Thierry Reding , Jani Nikula , Lee Jones , Povilas Staniulis , Chih-Wei Huang , Shobhit Kumar Subject: [PATCH 0/8] Crystalcove (CRC) PMIC based panel and pwm control Date: Wed, 29 Apr 2015 19:29:57 +0530 Message-Id: <1430316005-16480-1-git-send-email-shobhit.kumar@intel.com> X-Mailer: git-send-email 2.1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi All, On some of the BYT devices, for DSI panels, the panel enable/disable signals and backlight control are done using the Crystalcove PMIC. This series provides support for the same and has been reviewed earlier on - http://lists.freedesktop.org/archives/intel-gfx/2015-March/061908.html This series addresses the review comments with two of the patches already merged in linux-next as - http://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/?id=e189ca56d91bbf1d3fe2f88ab6858bf919d42adf http://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/?id=c264f1110d27185f8531602f5fce400a6bbce946 Basically following are implemented - 1. GPIO control for panel enable/disable with GFX device as consumer 2. New PWM chip driver added for CRC PMIC based backlight control 3. i915 is modified to use the CRC gpio chip and the CRC PWM chip to do backlight control. This is now added in the generic panel backlight control infrastructure All these patches have been tested on AsusT100 and working fine using /sys/class/backlight/intel_backlight interface. Patches are also verified on android-x86 tree for AsusT100. Regards Shobhit Shobhit Kumar (8): drivers/gpio/gpiolib: Add support for removing registered consumer lookup table drivers/pwm/core: Add support to remove registered consumer lookup tables drivers/mfd: Add lookup table for Panel Control as GPIO signal drivers/mfd: Add PWM cell device for Crystalcove PMIC drivers/mfd: ADD PWM lookup table for CRC PMIC based PWM drivers/pwm: Add Crystalcove (CRC) PWM driver drm/i915: Use the CRC gpio for panel enable/disable drm/i915: Backlight control using CRC PMIC based PWM driver drivers/gpio/gpiolib.c | 13 +++ drivers/gpu/drm/i915/intel_drv.h | 5 ++ drivers/gpu/drm/i915/intel_dsi.c | 38 ++++++++- drivers/gpu/drm/i915/intel_dsi.h | 6 ++ drivers/gpu/drm/i915/intel_panel.c | 92 ++++++++++++++++++-- drivers/mfd/intel_soc_pmic_core.c | 29 +++++++ drivers/mfd/intel_soc_pmic_crc.c | 3 + drivers/pwm/Kconfig | 7 ++ drivers/pwm/Makefile | 1 + drivers/pwm/core.c | 17 ++++ drivers/pwm/pwm-crc.c | 171 +++++++++++++++++++++++++++++++++++++ include/linux/gpio/machine.h | 1 + include/linux/pwm.h | 5 ++ 13 files changed, 381 insertions(+), 7 deletions(-) create mode 100644 drivers/pwm/pwm-crc.c -- 2.1.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shobhit Kumar Subject: [PATCH 0/8] Crystalcove (CRC) PMIC based panel and pwm control Date: Wed, 29 Apr 2015 19:29:57 +0530 Message-ID: <1430316005-16480-1-git-send-email-shobhit.kumar@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx , linux-kernel , linux-gpio , linux-pwm , dri-devel Cc: Alexandre Courbot , Samuel Ortiz , Povilas Staniulis , David Airlie , Shobhit Kumar , Linus Walleij , Jani Nikula , Chih-Wei Huang , Thierry Reding , Daniel Vetter , Lee Jones List-Id: linux-gpio@vger.kernel.org SGkgQWxsLApPbiBzb21lIG9mIHRoZSBCWVQgZGV2aWNlcywgZm9yIERTSSBwYW5lbHMsIHRoZSBw YW5lbCBlbmFibGUvZGlzYWJsZSBzaWduYWxzCmFuZCBiYWNrbGlnaHQgY29udHJvbCBhcmUgZG9u ZSB1c2luZyB0aGUgQ3J5c3RhbGNvdmUgUE1JQy4gVGhpcyBzZXJpZXMgcHJvdmlkZXMKc3VwcG9y dCBmb3IgdGhlIHNhbWUgYW5kIGhhcyBiZWVuIHJldmlld2VkIGVhcmxpZXIgb24gLSAKaHR0cDov L2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9hcmNoaXZlcy9pbnRlbC1nZngvMjAxNS1NYXJjaC8wNjE5 MDguaHRtbAoKVGhpcyBzZXJpZXMgYWRkcmVzc2VzIHRoZSByZXZpZXcgY29tbWVudHMgd2l0aCB0 d28gb2YgdGhlIHBhdGNoZXMgYWxyZWFkeSBtZXJnZWQKaW4gbGludXgtbmV4dCBhcyAtIAoKaHR0 cDovL2dpdC5rZXJuZWwub3JnL2NnaXQvbGludXgva2VybmVsL2dpdC9uZXh0L2xpbnV4LW5leHQu Z2l0L2NvbW1pdC8/aWQ9ZTE4OWNhNTZkOTFiYmYxZDNmZTJmODhhYjY4NThiZjkxOWQ0MmFkZgpo dHRwOi8vZ2l0Lmtlcm5lbC5vcmcvY2dpdC9saW51eC9rZXJuZWwvZ2l0L25leHQvbGludXgtbmV4 dC5naXQvY29tbWl0Lz9pZD1jMjY0ZjExMTBkMjcxODVmODUzMTYwMmY1ZmNlNDAwYTZiYmNlOTQ2 CgpCYXNpY2FsbHkgZm9sbG93aW5nIGFyZSBpbXBsZW1lbnRlZCAtIAoKMS4gR1BJTyBjb250cm9s IGZvciBwYW5lbCBlbmFibGUvZGlzYWJsZSB3aXRoIEdGWCBkZXZpY2UgYXMgY29uc3VtZXIKMi4g TmV3IFBXTSBjaGlwIGRyaXZlciBhZGRlZCBmb3IgQ1JDIFBNSUMgYmFzZWQgYmFja2xpZ2h0IGNv bnRyb2wKMy4gaTkxNSBpcyBtb2RpZmllZCB0byB1c2UgdGhlIENSQyBncGlvIGNoaXAgYW5kIHRo ZSBDUkMgUFdNIGNoaXAgdG8gZG8gCiAgIGJhY2tsaWdodCBjb250cm9sLiBUaGlzIGlzIG5vdyBh ZGRlZCBpbiB0aGUgZ2VuZXJpYyBwYW5lbCBiYWNrbGlnaHQKICAgY29udHJvbCBpbmZyYXN0cnVj dHVyZQoKQWxsIHRoZXNlIHBhdGNoZXMgaGF2ZSBiZWVuIHRlc3RlZCBvbiBBc3VzVDEwMCBhbmQg d29ya2luZyBmaW5lIHVzaW5nIAovc3lzL2NsYXNzL2JhY2tsaWdodC9pbnRlbF9iYWNrbGlnaHQg aW50ZXJmYWNlLgoKUGF0Y2hlcyBhcmUgYWxzbyB2ZXJpZmllZCBvbiBhbmRyb2lkLXg4NiB0cmVl IGZvciBBc3VzVDEwMC4KClJlZ2FyZHMKU2hvYmhpdAoKU2hvYmhpdCBLdW1hciAoOCk6CiAgZHJp dmVycy9ncGlvL2dwaW9saWI6IEFkZCBzdXBwb3J0IGZvciByZW1vdmluZyByZWdpc3RlcmVkIGNv bnN1bWVyCiAgICBsb29rdXAgdGFibGUKICBkcml2ZXJzL3B3bS9jb3JlOiBBZGQgc3VwcG9ydCB0 byByZW1vdmUgcmVnaXN0ZXJlZCBjb25zdW1lciBsb29rdXAKICAgIHRhYmxlcwogIGRyaXZlcnMv bWZkOiBBZGQgbG9va3VwIHRhYmxlIGZvciBQYW5lbCBDb250cm9sIGFzIEdQSU8gc2lnbmFsCiAg ZHJpdmVycy9tZmQ6IEFkZCBQV00gY2VsbCBkZXZpY2UgZm9yIENyeXN0YWxjb3ZlIFBNSUMKICBk cml2ZXJzL21mZDogQUREIFBXTSBsb29rdXAgdGFibGUgZm9yIENSQyBQTUlDIGJhc2VkIFBXTQog IGRyaXZlcnMvcHdtOiBBZGQgQ3J5c3RhbGNvdmUgKENSQykgUFdNIGRyaXZlcgogIGRybS9pOTE1 OiBVc2UgdGhlIENSQyBncGlvIGZvciBwYW5lbCBlbmFibGUvZGlzYWJsZQogIGRybS9pOTE1OiBC YWNrbGlnaHQgY29udHJvbCB1c2luZyBDUkMgUE1JQyBiYXNlZCBQV00gZHJpdmVyCgogZHJpdmVy cy9ncGlvL2dwaW9saWIuYyAgICAgICAgICAgICB8ICAxMyArKysKIGRyaXZlcnMvZ3B1L2RybS9p OTE1L2ludGVsX2Rydi5oICAgfCAgIDUgKysKIGRyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX2Rz aS5jICAgfCAgMzggKysrKysrKystCiBkcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9kc2kuaCAg IHwgICA2ICsrCiBkcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9wYW5lbC5jIHwgIDkyICsrKysr KysrKysrKysrKysrKy0tCiBkcml2ZXJzL21mZC9pbnRlbF9zb2NfcG1pY19jb3JlLmMgIHwgIDI5 ICsrKysrKysKIGRyaXZlcnMvbWZkL2ludGVsX3NvY19wbWljX2NyYy5jICAgfCAgIDMgKwogZHJp dmVycy9wd20vS2NvbmZpZyAgICAgICAgICAgICAgICB8ICAgNyArKwogZHJpdmVycy9wd20vTWFr ZWZpbGUgICAgICAgICAgICAgICB8ICAgMSArCiBkcml2ZXJzL3B3bS9jb3JlLmMgICAgICAgICAg ICAgICAgIHwgIDE3ICsrKysKIGRyaXZlcnMvcHdtL3B3bS1jcmMuYyAgICAgICAgICAgICAgfCAx NzEgKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKwogaW5jbHVkZS9saW51eC9n cGlvL21hY2hpbmUuaCAgICAgICB8ICAgMSArCiBpbmNsdWRlL2xpbnV4L3B3bS5oICAgICAgICAg ICAgICAgIHwgICA1ICsrCiAxMyBmaWxlcyBjaGFuZ2VkLCAzODEgaW5zZXJ0aW9ucygrKSwgNyBk ZWxldGlvbnMoLSkKIGNyZWF0ZSBtb2RlIDEwMDY0NCBkcml2ZXJzL3B3bS9wd20tY3JjLmMKCi0t IAoyLjEuMAoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18K SW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0 dHA6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9pbnRlbC1nZngK