From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jagan Teki Date: Sun, 10 May 2015 20:45:51 +0530 Subject: [U-Boot] [U-Boot PATCH v2 11/17] dts: zynq: Add zynq spi controller nodes In-Reply-To: <1431270957-6901-1-git-send-email-jteki@openedev.com> References: <1431270957-6901-1-git-send-email-jteki@openedev.com> Message-ID: <1431270957-6901-12-git-send-email-jteki@openedev.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de This patch adds zynq spi controller nodes in zynq-7000.dtsi. Signed-off-by: Jagan Teki Acked-by: Simon Glass Cc: Michal Simek Cc: Siva Durga Prasad Paladugu --- arch/arm/dts/zynq-7000.dtsi | 24 ++++++++++++++++++++++++ doc/device-tree-bindings/spi/spi-zynq.txt | 27 +++++++++++++++++++++++++++ 2 files changed, 51 insertions(+) create mode 100644 doc/device-tree-bindings/spi/spi-zynq.txt diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index 2d076f1..f66f8dc 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -109,6 +109,30 @@ interrupts = <0 50 4>; }; + spi0: spi at e0006000 { + compatible = "xlnx,zynq-spi"; + reg = <0xe0006000 0x1000>; + status = "disabled"; + interrupt-parent = <&intc>; + interrupts = <0 26 4>; + clocks = <&clkc 25>, <&clkc 34>; + clock-names = "ref_clk", "pclk"; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi1: spi at e0007000 { + compatible = "xlnx,zynq-spi"; + reg = <0xe0007000 0x1000>; + status = "disabled"; + interrupt-parent = <&intc>; + interrupts = <0 49 4>; + clocks = <&clkc 26>, <&clkc 35>; + clock-names = "ref_clk", "pclk"; + #address-cells = <1>; + #size-cells = <0>; + }; + gem0: ethernet at e000b000 { compatible = "cdns,gem"; reg = <0xe000b000 0x4000>; diff --git a/doc/device-tree-bindings/spi/spi-zynq.txt b/doc/device-tree-bindings/spi/spi-zynq.txt new file mode 100644 index 0000000..a7c2757 --- /dev/null +++ b/doc/device-tree-bindings/spi/spi-zynq.txt @@ -0,0 +1,27 @@ +Zynq SPI controller Device Tree Bindings +---------------------------------------- + +Required properties: +- compatible : Should be "xlnx,spi-zynq". +- reg : Physical base address and size of SPI registers map. +- status : Status will be disabled in dtsi and enabled in required dts. +- interrupt-parent : Must be core interrupt controller. +- interrupts : Property with a value describing the interrupt + number. +- clocks : Clock phandles (see clock bindings for details). +- clock-names : List of input clock names - "ref_clk", "pclk" + (See clock bindings for details). + +Example: + + spi at e0006000 { + compatible = "xlnx,zynq-spi"; + reg = <0xe0006000 0x1000>; + status = "disabled"; + interrupt-parent = <&intc>; + interrupts = <0 26 4>; + clocks = <&clkc 25>, <&clkc 34>; + clock-names = "ref_clk", "pclk"; + #address-cells = <1>; + #size-cells = <0>; + } ; -- 1.9.1