* [PATCH 0/3] Broadwell atomic CD clock
@ 2015-06-16 11:31 Mika Kahola
2015-06-16 11:31 ` [PATCH 1/3] drm/i915: Broadwell modeset global pipes to atomic Mika Kahola
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Mika Kahola @ 2015-06-16 11:31 UTC (permalink / raw
To: intel-gfx
This patch series add support for atomic mode setting
for Broadwell platform. In addition, the max CD clock
computation is unified into one function 'intel_mode_max_pixclk()'.
The modeset for global pipes is proposed to be computed
in a single function 'intel_modeset_global_pipes()'
Mika Kahola (3):
drm/i915: Broadwell modeset global pipes to atomic
drm/i915: Max CD clock for Broadwell
drm/i915: Unify modesetting for global pipes
drivers/gpu/drm/i915/intel_display.c | 147 ++++++++++++-----------------------
1 file changed, 50 insertions(+), 97 deletions(-)
--
1.9.1
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^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 1/3] drm/i915: Broadwell modeset global pipes to atomic
2015-06-16 11:31 [PATCH 0/3] Broadwell atomic CD clock Mika Kahola
@ 2015-06-16 11:31 ` Mika Kahola
2015-06-16 11:31 ` [PATCH 2/3] drm/i915: Max CD clock for Broadwell Mika Kahola
2015-06-16 11:31 ` [PATCH 3/3] drm/i915: Unify modesetting for global pipes Mika Kahola
2 siblings, 0 replies; 4+ messages in thread
From: Mika Kahola @ 2015-06-16 11:31 UTC (permalink / raw
To: intel-gfx
Convert 'broadwell_modeset_global_pipes()' into atomic
mode setting.
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 24 ++++++++++++++++++------
1 file changed, 18 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3f48917..953eda7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9683,6 +9683,10 @@ static int broadwell_modeset_global_pipes(struct drm_atomic_state *state)
struct drm_crtc_state *crtc_state;
int max_pixclk = ilk_max_pixel_rate(dev_priv);
int cdclk, i;
+ int ret = 0;
+
+ if (max_pixclk < 0)
+ return max_pixclk;
cdclk = broadwell_calc_cdclk(dev_priv, max_pixclk);
@@ -9697,14 +9701,22 @@ static int broadwell_modeset_global_pipes(struct drm_atomic_state *state)
crtc_state = drm_atomic_get_crtc_state(state, crtc);
if (IS_ERR(crtc_state))
return PTR_ERR(crtc_state);
- }
- /* disable/enable all currently active pipes while we change cdclk */
- for_each_crtc_in_state(state, crtc, crtc_state, i)
- if (crtc_state->enable)
- crtc_state->mode_changed = true;
+ if (!crtc_state->active || needs_modeset(crtc_state))
+ continue;
- return 0;
+ crtc_state->mode_changed = true;
+
+ ret = drm_atomic_add_affected_connectors(state, crtc);
+ if (ret)
+ break;
+
+ ret = drm_atomic_add_affected_planes(state, crtc);
+ if (ret)
+ break;
+ }
+
+ return ret;
}
static void broadwell_modeset_global_resources(struct drm_atomic_state *state)
--
1.9.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/3] drm/i915: Max CD clock for Broadwell
2015-06-16 11:31 [PATCH 0/3] Broadwell atomic CD clock Mika Kahola
2015-06-16 11:31 ` [PATCH 1/3] drm/i915: Broadwell modeset global pipes to atomic Mika Kahola
@ 2015-06-16 11:31 ` Mika Kahola
2015-06-16 11:31 ` [PATCH 3/3] drm/i915: Unify modesetting for global pipes Mika Kahola
2 siblings, 0 replies; 4+ messages in thread
From: Mika Kahola @ 2015-06-16 11:31 UTC (permalink / raw
To: intel-gfx
Max CD clock for Broadwell platform is added to
'intel_mode_max_pixclk()' function. This patch
removes the need for 'ilk_max_pixel_rate()' function.
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 45 +++++++++++-------------------------
1 file changed, 14 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 953eda7..b178fe9 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5879,6 +5879,7 @@ static int intel_mode_max_pixclk(struct drm_device *dev,
struct intel_crtc *intel_crtc;
struct intel_crtc_state *crtc_state;
int max_pixclk = 0;
+ int pixel_rate;
for_each_intel_crtc(dev, intel_crtc) {
if (state)
@@ -5892,8 +5893,16 @@ static int intel_mode_max_pixclk(struct drm_device *dev,
if (!crtc_state->base.enable)
continue;
- max_pixclk = max(max_pixclk,
- crtc_state->base.adjusted_mode.crtc_clock);
+ if (IS_BROADWELL(dev)) {
+ pixel_rate = ilk_pipe_pixel_rate(intel_crtc->config);
+
+ if (intel_crtc->config->ips_enabled)
+ pixel_rate = DIV_ROUND_UP(pixel_rate * 100, 95);
+
+ } else
+ pixel_rate = crtc_state->base.adjusted_mode.crtc_clock;
+
+ max_pixclk = max(max_pixclk, pixel_rate);
}
return max_pixclk;
@@ -9542,32 +9551,6 @@ static void broxton_modeset_global_resources(struct drm_atomic_state *old_state)
broxton_set_cdclk(dev, req_cdclk);
}
-/* compute the max rate for new configuration */
-static int ilk_max_pixel_rate(struct drm_i915_private *dev_priv)
-{
- struct drm_device *dev = dev_priv->dev;
- struct intel_crtc *intel_crtc;
- struct drm_crtc *crtc;
- int max_pixel_rate = 0;
- int pixel_rate;
-
- for_each_crtc(dev, crtc) {
- if (!crtc->state->enable)
- continue;
-
- intel_crtc = to_intel_crtc(crtc);
- pixel_rate = ilk_pipe_pixel_rate(intel_crtc->config);
-
- /* pixel rate mustn't exceed 95% of cdclk with IPS on BDW */
- if (IS_BROADWELL(dev) && intel_crtc->config->ips_enabled)
- pixel_rate = DIV_ROUND_UP(pixel_rate * 100, 95);
-
- max_pixel_rate = max(max_pixel_rate, pixel_rate);
- }
-
- return max_pixel_rate;
-}
-
static void broadwell_set_cdclk(struct drm_device *dev, int cdclk)
{
struct drm_i915_private *dev_priv = dev->dev_private;
@@ -9681,8 +9664,8 @@ static int broadwell_modeset_global_pipes(struct drm_atomic_state *state)
struct drm_i915_private *dev_priv = to_i915(state->dev);
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
- int max_pixclk = ilk_max_pixel_rate(dev_priv);
- int cdclk, i;
+ int max_pixclk = intel_mode_max_pixclk(state->dev, state);
+ int cdclk;
int ret = 0;
if (max_pixclk < 0)
@@ -9723,7 +9706,7 @@ static void broadwell_modeset_global_resources(struct drm_atomic_state *state)
{
struct drm_device *dev = state->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
- int max_pixel_rate = ilk_max_pixel_rate(dev_priv);
+ int max_pixel_rate = intel_mode_max_pixclk(state->dev, state);
int req_cdclk = broadwell_calc_cdclk(dev_priv, max_pixel_rate);
if (req_cdclk != dev_priv->cdclk_freq)
--
1.9.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 3/3] drm/i915: Unify modesetting for global pipes
2015-06-16 11:31 [PATCH 0/3] Broadwell atomic CD clock Mika Kahola
2015-06-16 11:31 ` [PATCH 1/3] drm/i915: Broadwell modeset global pipes to atomic Mika Kahola
2015-06-16 11:31 ` [PATCH 2/3] drm/i915: Max CD clock for Broadwell Mika Kahola
@ 2015-06-16 11:31 ` Mika Kahola
2 siblings, 0 replies; 4+ messages in thread
From: Mika Kahola @ 2015-06-16 11:31 UTC (permalink / raw
To: intel-gfx
Combine global pipe modesetting for Valleyview,
Broxton, and Broadwell. This removes some of the
repetitive code that exists in routines
'valleyview_modeset_global_pipes()' and
'broadwell_modeset_global_pipes()'. The naming
changed to 'intel_modeset_global_pipes()'.
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 118 +++++++++++------------------------
1 file changed, 38 insertions(+), 80 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b178fe9..01e79a5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5851,6 +5851,37 @@ static int valleyview_calc_cdclk(struct drm_i915_private *dev_priv,
return 200000;
}
+static int broadwell_calc_cdclk(struct drm_i915_private *dev_priv,
+ int max_pixel_rate)
+{
+ int cdclk;
+
+ /*
+ * FIXME should also account for plane ratio
+ * once 64bpp pixel formats are supported.
+ */
+ if (max_pixel_rate > 540000)
+ cdclk = 675000;
+ else if (max_pixel_rate > 450000)
+ cdclk = 540000;
+ else if (max_pixel_rate > 337500)
+ cdclk = 450000;
+ else
+ cdclk = 337500;
+
+ /*
+ * FIXME move the cdclk caclulation to
+ * compute_config() so we can fail gracegully.
+ */
+ if (cdclk > dev_priv->max_cdclk_freq) {
+ DRM_ERROR("requested cdclk (%d kHz) exceeds max (%d kHz)\n",
+ cdclk, dev_priv->max_cdclk_freq);
+ cdclk = dev_priv->max_cdclk_freq;
+ }
+
+ return cdclk;
+}
+
static int broxton_calc_cdclk(struct drm_i915_private *dev_priv,
int max_pixclk)
{
@@ -5908,7 +5939,7 @@ static int intel_mode_max_pixclk(struct drm_device *dev,
return max_pixclk;
}
-static int valleyview_modeset_global_pipes(struct drm_atomic_state *state)
+static int intel_modeset_global_pipes(struct drm_atomic_state *state)
{
struct drm_i915_private *dev_priv = to_i915(state->dev);
struct drm_crtc *crtc;
@@ -5921,8 +5952,12 @@ static int valleyview_modeset_global_pipes(struct drm_atomic_state *state)
if (IS_VALLEYVIEW(dev_priv))
cdclk = valleyview_calc_cdclk(dev_priv, max_pixclk);
- else
+ else if (IS_BROXTON(dev_priv))
cdclk = broxton_calc_cdclk(dev_priv, max_pixclk);
+ else if (IS_BROADWELL(dev_priv))
+ cdclk = broadwell_calc_cdclk(dev_priv, max_pixclk);
+ else
+ cdclk = dev_priv->cdclk_freq;
if (cdclk == dev_priv->cdclk_freq)
return 0;
@@ -9628,80 +9663,6 @@ static void broadwell_set_cdclk(struct drm_device *dev, int cdclk)
cdclk, dev_priv->cdclk_freq);
}
-static int broadwell_calc_cdclk(struct drm_i915_private *dev_priv,
- int max_pixel_rate)
-{
- int cdclk;
-
- /*
- * FIXME should also account for plane ratio
- * once 64bpp pixel formats are supported.
- */
- if (max_pixel_rate > 540000)
- cdclk = 675000;
- else if (max_pixel_rate > 450000)
- cdclk = 540000;
- else if (max_pixel_rate > 337500)
- cdclk = 450000;
- else
- cdclk = 337500;
-
- /*
- * FIXME move the cdclk caclulation to
- * compute_config() so we can fail gracegully.
- */
- if (cdclk > dev_priv->max_cdclk_freq) {
- DRM_ERROR("requested cdclk (%d kHz) exceeds max (%d kHz)\n",
- cdclk, dev_priv->max_cdclk_freq);
- cdclk = dev_priv->max_cdclk_freq;
- }
-
- return cdclk;
-}
-
-static int broadwell_modeset_global_pipes(struct drm_atomic_state *state)
-{
- struct drm_i915_private *dev_priv = to_i915(state->dev);
- struct drm_crtc *crtc;
- struct drm_crtc_state *crtc_state;
- int max_pixclk = intel_mode_max_pixclk(state->dev, state);
- int cdclk;
- int ret = 0;
-
- if (max_pixclk < 0)
- return max_pixclk;
-
- cdclk = broadwell_calc_cdclk(dev_priv, max_pixclk);
-
- if (cdclk == dev_priv->cdclk_freq)
- return 0;
-
- /* add all active pipes to the state */
- for_each_crtc(state->dev, crtc) {
- if (!crtc->state->enable)
- continue;
-
- crtc_state = drm_atomic_get_crtc_state(state, crtc);
- if (IS_ERR(crtc_state))
- return PTR_ERR(crtc_state);
-
- if (!crtc_state->active || needs_modeset(crtc_state))
- continue;
-
- crtc_state->mode_changed = true;
-
- ret = drm_atomic_add_affected_connectors(state, crtc);
- if (ret)
- break;
-
- ret = drm_atomic_add_affected_planes(state, crtc);
- if (ret)
- break;
- }
-
- return ret;
-}
-
static void broadwell_modeset_global_resources(struct drm_atomic_state *state)
{
struct drm_device *dev = state->dev;
@@ -12922,10 +12883,7 @@ static int intel_modeset_checks(struct drm_atomic_state *state)
* adjusted_mode bits in the crtc directly.
*/
if (IS_VALLEYVIEW(dev) || IS_BROXTON(dev) || IS_BROADWELL(dev)) {
- if (IS_VALLEYVIEW(dev) || IS_BROXTON(dev))
- ret = valleyview_modeset_global_pipes(state);
- else
- ret = broadwell_modeset_global_pipes(state);
+ ret = intel_modeset_global_pipes(state);
if (ret)
return ret;
--
1.9.1
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2015-06-16 11:30 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-06-16 11:31 [PATCH 0/3] Broadwell atomic CD clock Mika Kahola
2015-06-16 11:31 ` [PATCH 1/3] drm/i915: Broadwell modeset global pipes to atomic Mika Kahola
2015-06-16 11:31 ` [PATCH 2/3] drm/i915: Max CD clock for Broadwell Mika Kahola
2015-06-16 11:31 ` [PATCH 3/3] drm/i915: Unify modesetting for global pipes Mika Kahola
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