From mboxrd@z Thu Jan 1 00:00:00 1970 From: heiko@sntech.de (Heiko Stuebner) Date: Thu, 18 Jun 2015 16:18:31 +0200 Subject: [PATCH v2 4/9] clk: rockchip: add COMPOSITE_NOGATE_DIVTBL variant In-Reply-To: <1434637116-17124-1-git-send-email-heiko@sntech.de> References: <1434637116-17124-1-git-send-email-heiko@sntech.de> Message-ID: <1434637116-17124-5-git-send-email-heiko@sntech.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org A clock branch consisting of a mux and divider with non-standard divider values. Signed-off-by: Heiko Stuebner --- drivers/clk/rockchip/clk.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index 92edb5f..501f02e 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -308,6 +308,26 @@ struct rockchip_clk_branch { .gate_offset = -1, \ } +#define COMPOSITE_NOGATE_DIVTBL(_id, cname, pnames, f, mo, ms, \ + mw, mf, ds, dw, df, dt) \ + { \ + .id = _id, \ + .branch_type = branch_composite, \ + .name = cname, \ + .parent_names = pnames, \ + .num_parents = ARRAY_SIZE(pnames), \ + .flags = f, \ + .muxdiv_offset = mo, \ + .mux_shift = ms, \ + .mux_width = mw, \ + .mux_flags = mf, \ + .div_shift = ds, \ + .div_width = dw, \ + .div_flags = df, \ + .div_table = dt, \ + .gate_offset = -1, \ + } + #define COMPOSITE_FRAC(_id, cname, pname, f, mo, df, go, gs, gf)\ { \ .id = _id, \ -- 2.1.4 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Heiko Stuebner To: mturquette@linaro.org, sboyd@codeaurora.org Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Heiko Stuebner Subject: [PATCH v2 4/9] clk: rockchip: add COMPOSITE_NOGATE_DIVTBL variant Date: Thu, 18 Jun 2015 16:18:31 +0200 Message-Id: <1434637116-17124-5-git-send-email-heiko@sntech.de> In-Reply-To: <1434637116-17124-1-git-send-email-heiko@sntech.de> References: <1434637116-17124-1-git-send-email-heiko@sntech.de> List-ID: A clock branch consisting of a mux and divider with non-standard divider values. Signed-off-by: Heiko Stuebner --- drivers/clk/rockchip/clk.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index 92edb5f..501f02e 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -308,6 +308,26 @@ struct rockchip_clk_branch { .gate_offset = -1, \ } +#define COMPOSITE_NOGATE_DIVTBL(_id, cname, pnames, f, mo, ms, \ + mw, mf, ds, dw, df, dt) \ + { \ + .id = _id, \ + .branch_type = branch_composite, \ + .name = cname, \ + .parent_names = pnames, \ + .num_parents = ARRAY_SIZE(pnames), \ + .flags = f, \ + .muxdiv_offset = mo, \ + .mux_shift = ms, \ + .mux_width = mw, \ + .mux_flags = mf, \ + .div_shift = ds, \ + .div_width = dw, \ + .div_flags = df, \ + .div_table = dt, \ + .gate_offset = -1, \ + } + #define COMPOSITE_FRAC(_id, cname, pname, f, mo, df, go, gs, gf)\ { \ .id = _id, \ -- 2.1.4 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiko Stuebner Subject: [PATCH v2 4/9] clk: rockchip: add COMPOSITE_NOGATE_DIVTBL variant Date: Thu, 18 Jun 2015 16:18:31 +0200 Message-ID: <1434637116-17124-5-git-send-email-heiko@sntech.de> References: <1434637116-17124-1-git-send-email-heiko@sntech.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1434637116-17124-1-git-send-email-heiko@sntech.de> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: mturquette@linaro.org, sboyd@codeaurora.org Cc: linux-rockchip@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Heiko Stuebner List-Id: linux-rockchip.vger.kernel.org A clock branch consisting of a mux and divider with non-standard divider values. Signed-off-by: Heiko Stuebner --- drivers/clk/rockchip/clk.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index 92edb5f..501f02e 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -308,6 +308,26 @@ struct rockchip_clk_branch { .gate_offset = -1, \ } +#define COMPOSITE_NOGATE_DIVTBL(_id, cname, pnames, f, mo, ms, \ + mw, mf, ds, dw, df, dt) \ + { \ + .id = _id, \ + .branch_type = branch_composite, \ + .name = cname, \ + .parent_names = pnames, \ + .num_parents = ARRAY_SIZE(pnames), \ + .flags = f, \ + .muxdiv_offset = mo, \ + .mux_shift = ms, \ + .mux_width = mw, \ + .mux_flags = mf, \ + .div_shift = ds, \ + .div_width = dw, \ + .div_flags = df, \ + .div_table = dt, \ + .gate_offset = -1, \ + } + #define COMPOSITE_FRAC(_id, cname, pname, f, mo, df, go, gs, gf)\ { \ .id = _id, \ -- 2.1.4