From mboxrd@z Thu Jan 1 00:00:00 1970 From: Feng Wu Subject: [v3 02/15] Add helper macro for X86_FEATURE_CX16 feature detection Date: Wed, 24 Jun 2015 13:18:16 +0800 Message-ID: <1435123109-10481-3-git-send-email-feng.wu@intel.com> References: <1435123109-10481-1-git-send-email-feng.wu@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1435123109-10481-1-git-send-email-feng.wu@intel.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: xen-devel@lists.xen.org Cc: kevin.tian@intel.com, keir@xen.org, george.dunlap@eu.citrix.com, andrew.cooper3@citrix.com, jbeulich@suse.com, yang.z.zhang@intel.com, feng.wu@intel.com List-Id: xen-devel@lists.xenproject.org Add macro cpu_has_cx16 to detect X86_FEATURE_CX16 feature. Signed-off-by: Feng Wu --- v3: - Newly added. We need to atomically update the IRTE in PI format via CMPXCHG16B which is only available with this feature. xen/include/asm-x86/cpufeature.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index 7963a3a..63c1fe8 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -216,6 +216,8 @@ #define cpu_has_cpuid_faulting boot_cpu_has(X86_FEATURE_CPUID_FAULTING) +#define cpu_has_cx16 boot_cpu_has(X86_FEATURE_CX16) + enum _cache_type { CACHE_TYPE_NULL = 0, CACHE_TYPE_DATA = 1, -- 2.1.0