From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jul 2015 11:46:10 +0200 (CEST) Received: from mailapp01.imgtec.com ([195.59.15.196]:3243 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27009996AbbGIJlzkC4Dh (ORCPT ); Thu, 9 Jul 2015 11:41:55 +0200 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id 5067F1ED30ED9 for ; Thu, 9 Jul 2015 10:41:48 +0100 (IST) Received: from LEMAIL01.le.imgtec.org (192.168.152.62) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.195.1; Thu, 9 Jul 2015 10:41:50 +0100 Received: from mchandras-linux.le.imgtec.org (192.168.154.48) by LEMAIL01.le.imgtec.org (192.168.152.62) with Microsoft SMTP Server (TLS) id 14.3.210.2; Thu, 9 Jul 2015 10:41:49 +0100 From: Markos Chandras To: CC: Markos Chandras Subject: [PATCH 16/19] MIPS: kernel: cpu-probe: Remove cp0 hazard barrier when enabling the FTLB Date: Thu, 9 Jul 2015 10:40:50 +0100 Message-ID: <1436434853-30001-17-git-send-email-markos.chandras@imgtec.com> X-Mailer: git-send-email 2.4.5 In-Reply-To: <1436434853-30001-1-git-send-email-markos.chandras@imgtec.com> References: <1436434853-30001-1-git-send-email-markos.chandras@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [192.168.154.48] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 48153 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: markos.chandras@imgtec.com Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips We are so early in the boot process where we really don't want to stall and wait for CP0 FTLB related changes become visible so just drop the cp0 hazard barrier. Signed-off-by: Markos Chandras --- arch/mips/kernel/cpu-probe.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 02b75127dad3..dc057f37305b 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -385,7 +385,6 @@ static void set_ftlb_enable(struct cpuinfo_mips *c, int enable) else /* Disable FTLB */ write_c0_config6(config6 & ~MIPS_CONF6_FTLBEN); - back_to_back_c0_hazard(); break; } } -- 2.4.5 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailapp01.imgtec.com ([195.59.15.196]:3243 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27009996AbbGIJlzkC4Dh (ORCPT ); Thu, 9 Jul 2015 11:41:55 +0200 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id 5067F1ED30ED9 for ; Thu, 9 Jul 2015 10:41:48 +0100 (IST) From: Markos Chandras Subject: [PATCH 16/19] MIPS: kernel: cpu-probe: Remove cp0 hazard barrier when enabling the FTLB Date: Thu, 9 Jul 2015 10:40:50 +0100 Message-ID: <1436434853-30001-17-git-send-email-markos.chandras@imgtec.com> In-Reply-To: <1436434853-30001-1-git-send-email-markos.chandras@imgtec.com> References: <1436434853-30001-1-git-send-email-markos.chandras@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain Return-Path: Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-subscribe: List-owner: List-post: List-archive: To: linux-mips@linux-mips.org Cc: Markos Chandras Message-ID: <20150709094050.JDnXUYIx_FmEdK8Hb3hqOdcka8stjKJQ3UcZYsYaNMQ@z> We are so early in the boot process where we really don't want to stall and wait for CP0 FTLB related changes become visible so just drop the cp0 hazard barrier. Signed-off-by: Markos Chandras --- arch/mips/kernel/cpu-probe.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 02b75127dad3..dc057f37305b 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -385,7 +385,6 @@ static void set_ftlb_enable(struct cpuinfo_mips *c, int enable) else /* Disable FTLB */ write_c0_config6(config6 & ~MIPS_CONF6_FTLBEN); - back_to_back_c0_hazard(); break; } } -- 2.4.5