From mboxrd@z Thu Jan 1 00:00:00 1970 From: vijay.kilari@gmail.com Subject: [PATCH v6 14/31] xen/arm: ITS: Initialize physical ITS and export lpi support Date: Mon, 31 Aug 2015 16:36:31 +0530 Message-ID: <1441019208-2764-15-git-send-email-vijay.kilari@gmail.com> References: <1441019208-2764-1-git-send-email-vijay.kilari@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1441019208-2764-1-git-send-email-vijay.kilari@gmail.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian.Campbell@citrix.com, julien.grall@citrix.com, stefano.stabellini@eu.citrix.com, stefano.stabellini@citrix.com, tim@xen.org, xen-devel@lists.xen.org Cc: Prasun.Kapoor@caviumnetworks.com, Vijaya Kumar K , Zoltan Kiss , manish.jaggi@caviumnetworks.com, vijay.kilari@gmail.com List-Id: xen-devel@lists.xenproject.org From: Vijaya Kumar K Initialize physical ITS if HW supports LPIs. Signed-off-by: Vijaya Kumar K CC: Zoltan Kiss --- v6: - Updated lpi_supported gic_info member for GICv2 and GICv3 - Introduced helper gic_lpi_supported() and exported v5: - Made check of its dt node availability before setting lpi_supported flag --- xen/arch/arm/gic-hip04.c | 2 ++ xen/arch/arm/gic-v2.c | 2 ++ xen/arch/arm/gic-v3.c | 23 +++++++++++++++++++++++ xen/arch/arm/gic.c | 5 +++++ xen/include/asm-arm/gic.h | 4 ++++ 5 files changed, 36 insertions(+) diff --git a/xen/arch/arm/gic-hip04.c b/xen/arch/arm/gic-hip04.c index 98fdeee..b34db20 100644 --- a/xen/arch/arm/gic-hip04.c +++ b/xen/arch/arm/gic-hip04.c @@ -710,6 +710,8 @@ static int __init hip04gic_init(void) hip04gic_cpu_init(); hip04gic_hyp_init(); + gicv2_info.lpi_supported = 0; + spin_unlock(&gicv2.lock); return 0; diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index fe02334..a9cd19c 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -696,6 +696,8 @@ static int __init gicv2_init(void) gicv2_cpu_init(); gicv2_hyp_init(); + gicv2_info.lpi_supported = 0; + spin_unlock(&gicv2.lock); return 0; diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index c3b1a7c..bb2c531 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -684,6 +684,11 @@ static int __init gicv3_populate_rdist(void) return -ENODEV; } +static int gicv3_dist_supports_lpis(void) +{ + return readl_relaxed(GICD + GICD_TYPER) & GICD_TYPER_LPIS_SUPPORTED; +} + static int __cpuinit gicv3_cpu_init(void) { int i; @@ -696,6 +701,10 @@ static int __cpuinit gicv3_cpu_init(void) if ( gicv3_enable_redist() ) return -ENODEV; + /* Give LPIs a spin */ + if ( gicv3_info.lpi_supported ) + its_cpu_init(); + /* Set priority on PPI and SGI interrupts */ priority = (GIC_PRI_IPI << 24 | GIC_PRI_IPI << 16 | GIC_PRI_IPI << 8 | GIC_PRI_IPI); @@ -1299,6 +1308,20 @@ static int __init gicv3_init(void) spin_lock(&gicv3.lock); + if ( gicv3_dist_supports_lpis() ) + { + /* + * LPI support is enabled only if HW supports it and + * ITS dt node is available + */ + if ( !its_init(&gicv3.rdist_data) ) + gicv3_info.lpi_supported = 1; + else + gicv3_info.lpi_supported = 0; + } + else + gicv3_info.lpi_supported = 0; + gicv3_dist_init(); res = gicv3_cpu_init(); gicv3_hyp_init(); diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 16d43ec..555ad3c 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -76,6 +76,11 @@ unsigned int gic_number_lines(void) return gic_hw_ops->info->nr_lines; } +bool_t gic_lpi_supported(void) +{ + return gic_hw_ops->info->lpi_supported; +} + void gic_save_state(struct vcpu *v) { ASSERT(!local_irq_is_enabled()); diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h index 6ece7cc..15c76d0 100644 --- a/xen/include/asm-arm/gic.h +++ b/xen/include/asm-arm/gic.h @@ -283,6 +283,8 @@ extern void gic_dump_info(struct vcpu *v); /* Number of interrupt lines */ extern unsigned int gic_number_lines(void); +/* LPI support info */ +bool_t gic_lpi_supported(void); /* IRQ translation function for the device tree */ int gic_irq_xlate(const u32 *intspec, unsigned int intsize, @@ -302,6 +304,8 @@ struct gic_info { const struct dt_device_node *node; /* Number of IRQ ID bits supported */ uint32_t nr_id_bits; + /* LPIs are support information */ + bool_t lpi_supported; }; struct gic_hw_operations { -- 1.7.9.5