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From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH] drm/i915: workaround bad DSL readout v2
Date: Thu, 10 Sep 2015 14:38:53 -0700	[thread overview]
Message-ID: <1441921133-3381-1-git-send-email-jbarnes@virtuousgeek.org> (raw)
In-Reply-To: <1441899263-12986-1-git-send-email-jbarnes@virtuousgeek.org>

On HSW at least (still testing other platforms, but should be harmless
elsewhere), the DSL reg reads back as 0 when read around vblank start
time.  This ends up confusing the atomic start/end checking code, since
it causes the update to appear as if it crossed a frame count boundary.
Avoid the problem by making sure we don't return scanline_offset from
the get_crtc_scanline function.  In moving the code there, I add to add
an additional delay since it could be called and have a legitimate 0
result for some time (depending on the pixel clock).

v2: move hsw dsl read hack to get_crtc_scanline (Ville)

References: https://bugs.freedesktop.org/show_bug.cgi?id=91579
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/i915_irq.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 90bc6c2..97e5d52 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -697,6 +697,27 @@ static int __intel_get_crtc_scanline(struct intel_crtc *crtc)
 		position = __raw_i915_read32(dev_priv, PIPEDSL(pipe)) & DSL_LINEMASK_GEN3;
 
 	/*
+	 * On HSW, the DSL reg (0x70000) appears to return 0 if we
+	 * read it right around the start of vblank.  So try it again
+	 * so we don't accidentally end up spanning a vblank frame
+	 * increment, causing the pipe_update_end() code to squak at us.
+	 */
+	if (IS_HASWELL(dev) && !position) {
+		int i, temp;
+
+		for (i = 0; i < 100; i++) {
+			udelay(1);
+			temp = __raw_i915_read32(dev_priv, PIPEDSL(pipe)) &
+				DSL_LINEMASK_GEN3;
+			if (temp != position) {
+				position = temp;
+				goto out;
+			}
+		}
+	}
+
+out:
+	/*
 	 * See update_scanline_offset() for the details on the
 	 * scanline_offset adjustment.
 	 */
-- 
1.9.1

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  parent reply	other threads:[~2015-09-10 21:39 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-10 15:34 [PATCH 1/2] drm/i915: workaround bad DSL readout in start of pipe update Jesse Barnes
2015-09-10 15:34 ` [PATCH 2/2] drm/i915: add more debug info for when atomic updates fail Jesse Barnes
2015-09-10 16:05   ` Ville Syrjälä
2015-09-10 16:14     ` Jesse Barnes
2015-09-10 20:23     ` Jesse Barnes
2015-09-14  9:04       ` Daniel Vetter
2015-09-15 17:03   ` [PATCH] drm/i915: add more debug info for when atomic updates fail v2 Jesse Barnes
2015-09-15 17:47     ` Ville Syrjälä
2015-09-10 16:11 ` [PATCH 1/2] drm/i915: workaround bad DSL readout in start of pipe update Ville Syrjälä
2015-09-10 16:17   ` Jesse Barnes
2015-09-10 16:27     ` Ville Syrjälä
2015-09-10 21:38 ` Jesse Barnes [this message]
2015-09-10 21:53   ` [PATCH] drm/i915: workaround bad DSL readout v2 Ville Syrjälä
2015-09-10 21:57     ` Jesse Barnes
2015-09-10 22:33       ` Ville Syrjälä
2015-09-14  9:10         ` Daniel Vetter
2015-09-14 13:02           ` Ville Syrjälä
2015-09-14 14:29             ` Daniel Vetter
2015-09-15 21:00         ` Jesse Barnes
2015-09-14 18:47   ` Ville Syrjälä
2015-09-22 16:41   ` Ville Syrjälä
2015-09-22 19:15     ` [PATCH] drm/i915: workaround bad DSL readout v3 Jesse Barnes
2015-09-23  7:48       ` Jani Nikula

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