From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37102) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zb3Gb-0002cV-P3 for qemu-devel@nongnu.org; Sun, 13 Sep 2015 05:08:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zb3GW-0000Iz-OR for qemu-devel@nongnu.org; Sun, 13 Sep 2015 05:08:09 -0400 Received: from mail-wi0-x22f.google.com ([2a00:1450:400c:c05::22f]:33900) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zb3GW-0000Iv-Hk for qemu-devel@nongnu.org; Sun, 13 Sep 2015 05:08:04 -0400 Received: by wicfx3 with SMTP id fx3so106385068wic.1 for ; Sun, 13 Sep 2015 02:08:03 -0700 (PDT) From: "Edgar E. Iglesias" Date: Sun, 13 Sep 2015 11:07:50 +0200 Message-Id: <1442135278-25281-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH v2 0/8] arm: Steps towards EL2 support round 4 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com, alex.bennee@linaro.org, agraf@suse.de From: "Edgar E. Iglesias" Hi, This is another series with small steps towards EL2 emulation. Patch 1 is a fix to allow easier testing of EL3-less cores. Patches 2 and on add regs and a few small steps towards 2-stage MMU. Comments welcome! Best regards, Edgar v1 -> v2: * Add fix for gracefully handling missing has_el2 CPU props * Dropped suppress of TTBR1 for S2 (unneeded) * Comment on vttbr_write TLB flush * Mark second instance of VTTBR as ALIAS * Split the active aa32ns_aa64any into separate AA32/AA64 registrations to allow the AA64 one to avoid .access checks * VTCR does not need TLB flushes * Various CP_CONST/resetvalue=0 instead of writefns/readfns * Fix VMPIDR el2 vs el1 typo * Fix VMPIDR reset value * Fix spelling of suppress in commit message Edgar E. Iglesias (8): hw/cpu/{a15mpcore, a9mpcore}: Handle missing has_el3 CPU props gracefully target-arm: Add VTCR_EL2 target-arm: Add VTTBR_EL2 target-arm: Suppress TBI for S2 translations target-arm: Suppress EPD for S2, EL2 and EL3 translations target-arm: Add VPIDR_EL2 target-arm: Break out mpidr_read_val() target-arm: Add VMPIDR_EL2 hw/cpu/a15mpcore.c | 2 +- hw/cpu/a9mpcore.c | 2 +- target-arm/cpu.h | 4 ++ target-arm/helper.c | 158 +++++++++++++++++++++++++++++++++++++++++++++++++--- 4 files changed, 155 insertions(+), 11 deletions(-) -- 1.9.1