* [PATCH V3 2/4] MIPS: Loongson-3: Reserve 32MB for RS780E integrated GPU
@ 2016-03-17 12:41 Huacai Chen
2016-03-17 12:41 ` [PATCH V3 3/4] MIPS: Loongson-3: Fix build error after ld-version.sh modification Huacai Chen
2016-03-17 12:41 ` [PATCH V3 4/4] MIPS: Loongson-3: Adjust irq dispatch to speedup processing Huacai Chen
0 siblings, 2 replies; 3+ messages in thread
From: Huacai Chen @ 2016-03-17 12:41 UTC (permalink / raw
To: Ralf Baechle
Cc: Aurelien Jarno, Steven J . Hill, linux-mips, Fuxin Zhang,
Zhangjin Wu, Huacai Chen, stable
Due to datasheet, reserving 0xff800000~0xffffffff (8MB below 4GB) is
not enough for RS780E integrated GPU's TOM (top of memory) registers
and MSI/MSI-x memory region, so we reserve 0xfe000000~0xffffffff (32MB
below 4GB).
Cc: stable@vger.kernel.org
Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
arch/mips/loongson64/loongson-3/numa.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/mips/loongson64/loongson-3/numa.c b/arch/mips/loongson64/loongson-3/numa.c
index 6f9e010..282c5a8 100644
--- a/arch/mips/loongson64/loongson-3/numa.c
+++ b/arch/mips/loongson64/loongson-3/numa.c
@@ -213,10 +213,10 @@ static void __init node_mem_init(unsigned int node)
BOOTMEM_DEFAULT);
if (node == 0 && node_end_pfn(0) >= (0xffffffff >> PAGE_SHIFT)) {
- /* Reserve 0xff800000~0xffffffff for RS780E integrated GPU */
+ /* Reserve 0xfe000000~0xffffffff for RS780E integrated GPU */
reserve_bootmem_node(NODE_DATA(node),
- (node_addrspace_offset | 0xff800000),
- 8 << 20, BOOTMEM_DEFAULT);
+ (node_addrspace_offset | 0xfe000000),
+ 32 << 20, BOOTMEM_DEFAULT);
}
sparse_memory_present_with_active_regions(node);
--
2.7.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH V3 3/4] MIPS: Loongson-3: Fix build error after ld-version.sh modification
2016-03-17 12:41 [PATCH V3 2/4] MIPS: Loongson-3: Reserve 32MB for RS780E integrated GPU Huacai Chen
@ 2016-03-17 12:41 ` Huacai Chen
2016-03-17 12:41 ` [PATCH V3 4/4] MIPS: Loongson-3: Adjust irq dispatch to speedup processing Huacai Chen
1 sibling, 0 replies; 3+ messages in thread
From: Huacai Chen @ 2016-03-17 12:41 UTC (permalink / raw
To: Ralf Baechle
Cc: Aurelien Jarno, Steven J . Hill, linux-mips, Fuxin Zhang,
Zhangjin Wu, Huacai Chen, stable
Commit d5ece1cb074b2c ("Fix ld-version.sh to handle large 3rd version
part") modifies the ld version description. This causes a build error
on Loongson-3, so fix it.
Cc: stable@vger.kernel.org
Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
arch/mips/loongson64/Platform | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/loongson64/Platform b/arch/mips/loongson64/Platform
index 85d8089..0fce460 100644
--- a/arch/mips/loongson64/Platform
+++ b/arch/mips/loongson64/Platform
@@ -31,7 +31,7 @@ cflags-$(CONFIG_CPU_LOONGSON3) += -Wa,--trap
# can't easily be used safely within the kbuild framework.
#
ifeq ($(call cc-ifversion, -ge, 0409, y), y)
- ifeq ($(call ld-ifversion, -ge, 22500000, y), y)
+ ifeq ($(call ld-ifversion, -ge, 225000000, y), y)
cflags-$(CONFIG_CPU_LOONGSON3) += \
$(call cc-option,-march=loongson3a -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64)
else
--
2.7.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH V3 4/4] MIPS: Loongson-3: Adjust irq dispatch to speedup processing
2016-03-17 12:41 [PATCH V3 2/4] MIPS: Loongson-3: Reserve 32MB for RS780E integrated GPU Huacai Chen
2016-03-17 12:41 ` [PATCH V3 3/4] MIPS: Loongson-3: Fix build error after ld-version.sh modification Huacai Chen
@ 2016-03-17 12:41 ` Huacai Chen
1 sibling, 0 replies; 3+ messages in thread
From: Huacai Chen @ 2016-03-17 12:41 UTC (permalink / raw
To: Ralf Baechle
Cc: Aurelien Jarno, Steven J . Hill, linux-mips, Fuxin Zhang,
Zhangjin Wu, Huacai Chen
This patch adjust the logic in mach_irq_dispatch(), allow multiple IPs
handled in the same dispatching. This can speedup interrupt processing.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
arch/mips/loongson64/loongson-3/irq.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/mips/loongson64/loongson-3/irq.c b/arch/mips/loongson64/loongson-3/irq.c
index 0f75b6b..8e76490 100644
--- a/arch/mips/loongson64/loongson-3/irq.c
+++ b/arch/mips/loongson64/loongson-3/irq.c
@@ -24,19 +24,21 @@ static void ht_irqdispatch(void)
}
}
+#define UNUSED_IPS (CAUSEF_IP5 | CAUSEF_IP4 | CAUSEF_IP1 | CAUSEF_IP0)
+
void mach_irq_dispatch(unsigned int pending)
{
if (pending & CAUSEF_IP7)
do_IRQ(LOONGSON_TIMER_IRQ);
#if defined(CONFIG_SMP)
- else if (pending & CAUSEF_IP6)
+ if (pending & CAUSEF_IP6)
loongson3_ipi_interrupt(NULL);
#endif
- else if (pending & CAUSEF_IP3)
+ if (pending & CAUSEF_IP3)
ht_irqdispatch();
- else if (pending & CAUSEF_IP2)
+ if (pending & CAUSEF_IP2)
do_IRQ(LOONGSON_UART_IRQ);
- else {
+ if (pending & UNUSED_IPS) {
pr_err("%s : spurious interrupt\n", __func__);
spurious_interrupt();
}
--
2.7.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2016-03-17 12:43 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2016-03-17 12:41 [PATCH V3 2/4] MIPS: Loongson-3: Reserve 32MB for RS780E integrated GPU Huacai Chen
2016-03-17 12:41 ` [PATCH V3 3/4] MIPS: Loongson-3: Fix build error after ld-version.sh modification Huacai Chen
2016-03-17 12:41 ` [PATCH V3 4/4] MIPS: Loongson-3: Adjust irq dispatch to speedup processing Huacai Chen
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