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* [Intel-gfx] [PATCH 1/2] drm/i915/perf: Register sysctl path globally
@ 2019-12-12  7:35 Venkata Sandeep Dhanalakota
  2019-12-12  7:35 ` [Intel-gfx] [PATCH 2/2] drm/i915: Tag GEM_TRACE with device name Venkata Sandeep Dhanalakota
                   ` (4 more replies)
  0 siblings, 5 replies; 9+ messages in thread
From: Venkata Sandeep Dhanalakota @ 2019-12-12  7:35 UTC (permalink / raw
  To: intel-gfx; +Cc: chris.p.wilson

We do not require to register the sysctl paths per instance,
so making registration global.

v2: make sysctl path register and unregister function driver
    specific (Tvrtko and Lucas).

Cc: Sudeep Dutt <sudeep.dutt@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c        |  6 ++++++
 drivers/gpu/drm/i915/i915_perf.c       | 19 ++++++++++++++++---
 drivers/gpu/drm/i915/i915_perf.h       |  2 ++
 drivers/gpu/drm/i915/i915_perf_types.h |  1 -
 4 files changed, 24 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index bba6b50e6beb..c5a2bb5e87fe 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -30,6 +30,7 @@
 #include "display/intel_fbdev.h"
 
 #include "i915_drv.h"
+#include "i915_perf.h"
 #include "i915_globals.h"
 #include "i915_selftest.h"
 
@@ -1051,6 +1052,10 @@ static int __init i915_init(void)
 		return 0;
 	}
 
+	err = i915_perf_sysctl_register();
+	if (err)
+		return err;
+
 	return pci_register_driver(&i915_pci_driver);
 }
 
@@ -1059,6 +1064,7 @@ static void __exit i915_exit(void)
 	if (!i915_pci_driver.driver.owner)
 		return;
 
+	i915_perf_sysctl_unregister();
 	pci_unregister_driver(&i915_pci_driver);
 	i915_globals_exit();
 }
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 8d2e37949f46..f039beed1771 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -387,6 +387,8 @@ struct i915_oa_config_bo {
 	struct i915_vma *vma;
 };
 
+static struct ctl_table_header *sysctl_header;
+
 static enum hrtimer_restart oa_poll_check_timer_cb(struct hrtimer *hrtimer);
 
 void i915_oa_config_release(struct kref *ref)
@@ -4345,7 +4347,6 @@ void i915_perf_init(struct drm_i915_private *i915)
 
 		oa_sample_rate_hard_limit = 1000 *
 			(RUNTIME_INFO(i915)->cs_timestamp_frequency_khz / 2);
-		perf->sysctl_header = register_sysctl_table(dev_root);
 
 		mutex_init(&perf->metrics_lock);
 		idr_init(&perf->metrics_idr);
@@ -4381,6 +4382,20 @@ static int destroy_config(int id, void *p, void *data)
 	return 0;
 }
 
+int i915_perf_sysctl_register(void)
+{
+	sysctl_header = register_sysctl_table(dev_root);
+	if (!sysctl_header)
+		return -ENOMEM;
+
+	return 0;
+}
+
+void i915_perf_sysctl_unregister(void)
+{
+	unregister_sysctl_table(sysctl_header);
+}
+
 /**
  * i915_perf_fini - Counter part to i915_perf_init()
  * @i915: i915 device instance
@@ -4395,8 +4410,6 @@ void i915_perf_fini(struct drm_i915_private *i915)
 	idr_for_each(&perf->metrics_idr, destroy_config, perf);
 	idr_destroy(&perf->metrics_idr);
 
-	unregister_sysctl_table(perf->sysctl_header);
-
 	memset(&perf->ops, 0, sizeof(perf->ops));
 	perf->i915 = NULL;
 }
diff --git a/drivers/gpu/drm/i915/i915_perf.h b/drivers/gpu/drm/i915/i915_perf.h
index 4ceebce72060..1d1329e5af3a 100644
--- a/drivers/gpu/drm/i915/i915_perf.h
+++ b/drivers/gpu/drm/i915/i915_perf.h
@@ -23,6 +23,8 @@ void i915_perf_fini(struct drm_i915_private *i915);
 void i915_perf_register(struct drm_i915_private *i915);
 void i915_perf_unregister(struct drm_i915_private *i915);
 int i915_perf_ioctl_version(void);
+int i915_perf_sysctl_register(void);
+void i915_perf_sysctl_unregister(void);
 
 int i915_perf_open_ioctl(struct drm_device *dev, void *data,
 			 struct drm_file *file);
diff --git a/drivers/gpu/drm/i915/i915_perf_types.h b/drivers/gpu/drm/i915/i915_perf_types.h
index 74ddc20a0d37..45e581455f5d 100644
--- a/drivers/gpu/drm/i915/i915_perf_types.h
+++ b/drivers/gpu/drm/i915/i915_perf_types.h
@@ -380,7 +380,6 @@ struct i915_perf {
 	struct drm_i915_private *i915;
 
 	struct kobject *metrics_kobj;
-	struct ctl_table_header *sysctl_header;
 
 	/*
 	 * Lock associated with adding/modifying/removing OA configs
-- 
2.21.0.5.gaeb582a983

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [Intel-gfx] [PATCH 2/2] drm/i915: Tag GEM_TRACE with device name
  2019-12-12  7:35 [Intel-gfx] [PATCH 1/2] drm/i915/perf: Register sysctl path globally Venkata Sandeep Dhanalakota
@ 2019-12-12  7:35 ` Venkata Sandeep Dhanalakota
  2019-12-12  8:30   ` Chris Wilson
  2019-12-12  9:37 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/perf: Register sysctl path globally (rev2) Patchwork
                   ` (3 subsequent siblings)
  4 siblings, 1 reply; 9+ messages in thread
From: Venkata Sandeep Dhanalakota @ 2019-12-12  7:35 UTC (permalink / raw
  To: intel-gfx; +Cc: chris.p.wilson

Adding device name to trace makes debugging easier,
when dealing with multiple gpus.

Cc: Sudeep Dutt <sudeep.dutt@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_pm.c        |  4 +-
 drivers/gpu/drm/i915/gt/intel_context.c       | 11 ++--
 drivers/gpu/drm/i915/gt/intel_engine_cs.c     |  7 +--
 drivers/gpu/drm/i915/gt/intel_engine_pm.c     |  6 +--
 drivers/gpu/drm/i915/gt/intel_gt_pm.c         | 12 ++---
 drivers/gpu/drm/i915/gt/intel_lrc.c           | 50 ++++++++++++-------
 drivers/gpu/drm/i915/gt/intel_reset.c         | 23 +++++----
 .../gpu/drm/i915/gt/intel_ring_submission.c   | 11 ++--
 drivers/gpu/drm/i915/gt/selftest_hangcheck.c  |  6 ++-
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  8 +--
 drivers/gpu/drm/i915/i915_request.c           | 15 ++++--
 11 files changed, 92 insertions(+), 61 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index f88ee1317bb4..037f2eb0b77b 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -13,7 +13,7 @@
 
 void i915_gem_suspend(struct drm_i915_private *i915)
 {
-	GEM_TRACE("\n");
+	GEM_TRACE("[%s]\n", dev_name(i915->drm.dev));
 
 	intel_wakeref_auto(&i915->ggtt.userfault_wakeref, 0);
 	flush_workqueue(i915->wq);
@@ -99,7 +99,7 @@ void i915_gem_suspend_late(struct drm_i915_private *i915)
 
 void i915_gem_resume(struct drm_i915_private *i915)
 {
-	GEM_TRACE("\n");
+	GEM_TRACE("[%s]\n", dev_name(i915->drm.dev));
 
 	intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL);
 
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c b/drivers/gpu/drm/i915/gt/intel_context.c
index 61c39e943f69..5b3f05b29365 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -68,8 +68,9 @@ int __intel_context_do_pin(struct intel_context *ce)
 		if (err)
 			goto err;
 
-		GEM_TRACE("%s context:%llx pin ring:{head:%04x, tail:%04x}\n",
-			  ce->engine->name, ce->timeline->fence_context,
+		GEM_TRACE("[%s] %s context:%llx pin ring:{head:%04x, tail:%04x}\n",
+			  dev_name(ce->engine->i915->drm.dev), ce->engine->name,
+			  ce->timeline->fence_context,
 			  ce->ring->head, ce->ring->tail);
 
 		i915_gem_context_get(ce->gem_context); /* for ctx->ppgtt */
@@ -98,7 +99,8 @@ void intel_context_unpin(struct intel_context *ce)
 	mutex_lock_nested(&ce->pin_mutex, SINGLE_DEPTH_NESTING);
 
 	if (likely(atomic_dec_and_test(&ce->pin_count))) {
-		GEM_TRACE("%s context:%llx retire\n",
+		GEM_TRACE("[%s] %s context:%llx retire\n",
+			  dev_name(ce->engine->i915->drm.dev),
 			  ce->engine->name, ce->timeline->fence_context);
 
 		ce->ops->unpin(ce);
@@ -141,7 +143,8 @@ static void __intel_context_retire(struct i915_active *active)
 {
 	struct intel_context *ce = container_of(active, typeof(*ce), active);
 
-	GEM_TRACE("%s context:%llx retire\n",
+	GEM_TRACE("[%s] %s context:%llx retire\n",
+		  dev_name(ce->engine->i915->drm.dev),
 		  ce->engine->name, ce->timeline->fence_context);
 
 	set_bit(CONTEXT_VALID_BIT, &ce->flags);
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 49473c25916c..a25947e8026f 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -912,7 +912,7 @@ int intel_engine_stop_cs(struct intel_engine_cs *engine)
 	if (INTEL_GEN(engine->i915) < 3)
 		return -ENODEV;
 
-	GEM_TRACE("%s\n", engine->name);
+	GEM_TRACE("[%s] %s\n",dev_name(engine->i915->drm.dev), engine->name);
 
 	intel_uncore_write_fw(uncore, mode, _MASKED_BIT_ENABLE(STOP_RING));
 
@@ -921,7 +921,8 @@ int intel_engine_stop_cs(struct intel_engine_cs *engine)
 					 mode, MODE_IDLE, MODE_IDLE,
 					 1000, stop_timeout(engine),
 					 NULL)) {
-		GEM_TRACE("%s: timed out on STOP_RING -> IDLE\n", engine->name);
+		GEM_TRACE("[%s] %s: timed out on STOP_RING -> IDLE\n",
+			  dev_name(engine->i915->drm.dev), engine->name);
 		err = -ETIMEDOUT;
 	}
 
@@ -933,7 +934,7 @@ int intel_engine_stop_cs(struct intel_engine_cs *engine)
 
 void intel_engine_cancel_stop_cs(struct intel_engine_cs *engine)
 {
-	GEM_TRACE("%s\n", engine->name);
+	GEM_TRACE("[%s] %s\n",dev_name(engine->i915->drm.dev), engine->name);
 
 	ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING));
 }
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index 889eb37e386a..e355b29eb21d 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -21,7 +21,7 @@ static int __engine_unpark(struct intel_wakeref *wf)
 		container_of(wf, typeof(*engine), wakeref);
 	void *map;
 
-	GEM_TRACE("%s\n", engine->name);
+	GEM_TRACE("[%s] %s\n", dev_name(engine->i915->drm.dev), engine->name);
 
 	intel_gt_pm_get(engine->gt);
 
@@ -80,7 +80,7 @@ __queue_and_release_pm(struct i915_request *rq,
 {
 	struct intel_gt_timelines *timelines = &engine->gt->timelines;
 
-	GEM_TRACE("%s\n", engine->name);
+	GEM_TRACE("[%s] %s\n", dev_name(engine->i915->drm.dev), engine->name);
 
 	/*
 	 * We have to serialise all potential retirement paths with our
@@ -204,7 +204,7 @@ static int __engine_park(struct intel_wakeref *wf)
 	if (!switch_to_kernel_context(engine))
 		return -EBUSY;
 
-	GEM_TRACE("%s\n", engine->name);
+	GEM_TRACE("[%s] %s\n", dev_name(engine->i915->drm.dev), engine->name);
 
 	call_idle_barriers(engine); /* cleanup after wedging */
 
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index ecde67a75e32..e8ebb38fdd38 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -43,7 +43,7 @@ static int __gt_unpark(struct intel_wakeref *wf)
 	struct intel_gt *gt = container_of(wf, typeof(*gt), wakeref);
 	struct drm_i915_private *i915 = gt->i915;
 
-	GEM_TRACE("\n");
+	GEM_TRACE("[%s]\n", dev_name(i915->drm.dev));
 
 	i915_globals_unpark();
 
@@ -76,7 +76,7 @@ static int __gt_park(struct intel_wakeref *wf)
 	intel_wakeref_t wakeref = fetch_and_zero(&gt->awake);
 	struct drm_i915_private *i915 = gt->i915;
 
-	GEM_TRACE("\n");
+	GEM_TRACE("[%s]\n", dev_name(i915->drm.dev));
 
 	intel_gt_park_requests(gt);
 
@@ -188,7 +188,7 @@ int intel_gt_resume(struct intel_gt *gt)
 	enum intel_engine_id id;
 	int err = 0;
 
-	GEM_TRACE("\n");
+	GEM_TRACE("[%s] \n", dev_name(gt->i915->drm.dev));
 
 	/*
 	 * After resume, we may need to poke into the pinned kernel
@@ -301,19 +301,19 @@ void intel_gt_suspend_late(struct intel_gt *gt)
 
 	intel_gt_sanitize(gt, false);
 
-	GEM_TRACE("\n");
+	GEM_TRACE("[%s]\n", dev_name(gt->i915->drm.dev));
 }
 
 void intel_gt_runtime_suspend(struct intel_gt *gt)
 {
 	intel_uc_runtime_suspend(&gt->uc);
 
-	GEM_TRACE("\n");
+	GEM_TRACE("[%s]\n", dev_name(gt->i915->drm.dev));
 }
 
 int intel_gt_runtime_resume(struct intel_gt *gt)
 {
-	GEM_TRACE("\n");
+	GEM_TRACE("[%s]\n", dev_name(gt->i915->drm.dev));
 
 	intel_gt_init_swizzling(gt);
 
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 929f6bae4eba..094e42600636 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1069,8 +1069,9 @@ static void reset_active(struct i915_request *rq,
 	 * remain correctly ordered. And we defer to __i915_request_submit()
 	 * so that all asynchronous waits are correctly handled.
 	 */
-	GEM_TRACE("%s(%s): { rq=%llx:%lld }\n",
-		  __func__, engine->name, rq->fence.context, rq->fence.seqno);
+	GEM_TRACE("%s [%s] (%s): { rq=%llx:%lld }\n",
+		  __func__, dev_name(engine->i915->drm.dev), engine->name,
+		  rq->fence.context, rq->fence.seqno);
 
 	/* On resubmission of the active request, payload will be scrubbed */
 	if (i915_request_completed(rq))
@@ -1274,7 +1275,8 @@ trace_ports(const struct intel_engine_execlists *execlists,
 	if (!ports[0])
 		return;
 
-	GEM_TRACE("%s: %s { %llx:%lld%s, %llx:%lld }\n",
+	GEM_TRACE("[%s]%s: %s { %llx:%lld%s, %llx:%lld }\n",
+		  dev_name(engine->i915->drm.dev),
 		  engine->name, msg,
 		  ports[0]->fence.context,
 		  ports[0]->fence.seqno,
@@ -1700,7 +1702,8 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 	last = last_active(execlists);
 	if (last) {
 		if (need_preempt(engine, last, rb)) {
-			GEM_TRACE("%s: preempting last=%llx:%lld, prio=%d, hint=%d\n",
+			GEM_TRACE("[%s] %s: preempting last=%llx:%lld, prio=%d, hint=%d\n",
+				  dev_name(engine->i915->drm.dev),
 				  engine->name,
 				  last->fence.context,
 				  last->fence.seqno,
@@ -1735,7 +1738,8 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 			last = NULL;
 		} else if (need_timeslice(engine, last) &&
 			   timer_expired(&engine->execlists.timer)) {
-			GEM_TRACE("%s: expired last=%llx:%lld, prio=%d, hint=%d\n",
+			GEM_TRACE("[%s] %s: expired last=%llx:%lld, prio=%d, hint=%d\n",
+				  dev_name(engine->i915->drm.dev),
 				  engine->name,
 				  last->fence.context,
 				  last->fence.seqno,
@@ -1817,7 +1821,8 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 				return; /* leave this for another */
 			}
 
-			GEM_TRACE("%s: virtual rq=%llx:%lld%s, new engine? %s\n",
+			GEM_TRACE("[%s] %s: virtual rq=%llx:%lld%s, new engine? %s\n",
+				  dev_name(engine->i915->drm.dev),
 				  engine->name,
 				  rq->fence.context,
 				  rq->fence.seqno,
@@ -1980,7 +1985,8 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 	 * interrupt for secondary ports).
 	 */
 	execlists->queue_priority_hint = queue_prio(execlists);
-	GEM_TRACE("%s: queue_priority_hint:%d, submit:%s\n",
+	GEM_TRACE("[%s] %s: queue_priority_hint:%d, submit:%s\n",
+		  dev_name(engine->i915->drm.dev),
 		  engine->name, execlists->queue_priority_hint,
 		  yesno(submit));
 
@@ -2131,7 +2137,9 @@ static void process_csb(struct intel_engine_cs *engine)
 	 */
 	head = execlists->csb_head;
 	tail = READ_ONCE(*execlists->csb_write);
-	GEM_TRACE("%s cs-irq head=%d, tail=%d\n", engine->name, head, tail);
+	GEM_TRACE("[%s] %s cs-irq head=%d, tail=%d\n",
+		  dev_name(engine->i915->drm.dev), engine->name,
+		  head, tail);
 	if (unlikely(head == tail))
 		return;
 
@@ -2169,8 +2177,8 @@ static void process_csb(struct intel_engine_cs *engine)
 		 * status notifier.
 		 */
 
-		GEM_TRACE("%s csb[%d]: status=0x%08x:0x%08x\n",
-			  engine->name, head,
+		GEM_TRACE("[%s] %s csb[%d]: status=0x%08x:0x%08x\n",
+			  dev_name(engine->i915->drm.dev), engine->name, head,
 			  buf[2 * head + 0], buf[2 * head + 1]);
 
 		if (INTEL_GEN(engine->i915) >= 12)
@@ -2262,7 +2270,8 @@ static noinline void preempt_reset(struct intel_engine_cs *engine)
 	/* Mark this tasklet as disabled to avoid waiting for it to complete */
 	tasklet_disable_nosync(&engine->execlists.tasklet);
 
-	GEM_TRACE("%s: preempt timeout %lu+%ums\n",
+	GEM_TRACE("[%s] %s: preempt timeout %lu+%ums\n",
+		  dev_name(engine->i915->drm.dev),
 		  engine->name,
 		  READ_ONCE(engine->props.preempt_timeout_ms),
 		  jiffies_to_msecs(jiffies - engine->execlists.preempt.expires));
@@ -2971,8 +2980,8 @@ static void execlists_reset_prepare(struct intel_engine_cs *engine)
 	struct intel_engine_execlists * const execlists = &engine->execlists;
 	unsigned long flags;
 
-	GEM_TRACE("%s: depth<-%d\n", engine->name,
-		  atomic_read(&execlists->tasklet.count));
+	GEM_TRACE("[%s] %s: depth<-%d\n", dev_name(engine->i915->drm.dev),
+		  engine->name, atomic_read(&execlists->tasklet.count));
 
 	/*
 	 * Prevent request submission to the hardware until we have
@@ -3134,7 +3143,8 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
 	restore_default_state(ce, engine);
 
 out_replay:
-	GEM_TRACE("%s replay {head:%04x, tail:%04x}\n",
+	GEM_TRACE("[%s] %s replay {head:%04x, tail:%04x}\n",
+		  dev_name(engine->i915->drm.dev),
 		  engine->name, ce->ring->head, ce->ring->tail);
 	intel_ring_update_space(ce->ring);
 	__execlists_reset_reg_state(ce, engine);
@@ -3151,7 +3161,7 @@ static void execlists_reset(struct intel_engine_cs *engine, bool stalled)
 {
 	unsigned long flags;
 
-	GEM_TRACE("%s\n", engine->name);
+	GEM_TRACE("[%s] %s\n", dev_name(engine->i915->drm.dev), engine->name);
 
 	spin_lock_irqsave(&engine->active.lock, flags);
 
@@ -3172,7 +3182,7 @@ static void execlists_cancel_requests(struct intel_engine_cs *engine)
 	struct rb_node *rb;
 	unsigned long flags;
 
-	GEM_TRACE("%s\n", engine->name);
+	GEM_TRACE("[%s] %s\n", dev_name(engine->i915->drm.dev), engine->name);
 
 	/*
 	 * Before we call engine->cancel_requests(), we should have exclusive
@@ -3259,7 +3269,7 @@ static void execlists_reset_finish(struct intel_engine_cs *engine)
 	if (__tasklet_enable(&execlists->tasklet))
 		/* And kick in case we missed a new request submission. */
 		tasklet_hi_schedule(&execlists->tasklet);
-	GEM_TRACE("%s: depth->%d\n", engine->name,
+	GEM_TRACE("[%s] %s: depth->%d\n", dev_name(engine->i915->drm.dev), engine->name,
 		  atomic_read(&execlists->tasklet.count));
 }
 
@@ -4309,7 +4319,8 @@ static intel_engine_mask_t virtual_submission_mask(struct virtual_engine *ve)
 		mask = ve->siblings[0]->mask;
 	}
 
-	GEM_TRACE("%s: rq=%llx:%lld, mask=%x, prio=%d\n",
+	GEM_TRACE("[%s] %s: rq=%llx:%lld, mask=%x, prio=%d\n",
+		  dev_name(ve->base.i915->drm.dev),
 		  ve->base.name,
 		  rq->fence.context, rq->fence.seqno,
 		  mask, ve->base.execlists.queue_priority_hint);
@@ -4403,7 +4414,8 @@ static void virtual_submit_request(struct i915_request *rq)
 	struct i915_request *old;
 	unsigned long flags;
 
-	GEM_TRACE("%s: rq=%llx:%lld\n",
+	GEM_TRACE("[%s] %s: rq=%llx:%lld\n",
+		  dev_name(ve->base.i915->drm.dev),
 		  ve->base.name,
 		  rq->fence.context,
 		  rq->fence.seqno);
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 8408cb84e52c..fbf503d5d1ef 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -126,7 +126,8 @@ static void context_mark_innocent(struct i915_gem_context *ctx)
 
 void __i915_request_reset(struct i915_request *rq, bool guilty)
 {
-	GEM_TRACE("%s rq=%llx:%lld, guilty? %s\n",
+	GEM_TRACE("[%s] %s rq=%llx:%lld, guilty? %s\n",
+		  dev_name(rq->engine->i915->drm.dev),
 		  rq->engine->name,
 		  rq->fence.context,
 		  rq->fence.seqno,
@@ -604,7 +605,8 @@ int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask)
 	 */
 	intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL);
 	for (retry = 0; ret == -ETIMEDOUT && retry < retries; retry++) {
-		GEM_TRACE("engine_mask=%x\n", engine_mask);
+		GEM_TRACE("[%s] engine_mask=%x\n", dev_name(gt->i915->drm.dev),
+			  engine_mask);
 		preempt_disable();
 		ret = reset(gt, engine_mask, retry);
 		preempt_enable();
@@ -762,7 +764,8 @@ static void nop_submit_request(struct i915_request *request)
 	struct intel_engine_cs *engine = request->engine;
 	unsigned long flags;
 
-	GEM_TRACE("%s fence %llx:%lld -> -EIO\n",
+	GEM_TRACE("[%s] %s fence %llx:%lld -> -EIO\n",
+		  dev_name(engine->i915->drm.dev),
 		  engine->name, request->fence.context, request->fence.seqno);
 	dma_fence_set_error(&request->fence, -EIO);
 
@@ -790,7 +793,7 @@ static void __intel_gt_set_wedged(struct intel_gt *gt)
 			intel_engine_dump(engine, &p, "%s\n", engine->name);
 	}
 
-	GEM_TRACE("start\n");
+	GEM_TRACE("[%s] start\n", dev_name(gt->i915->drm.dev));
 
 	/*
 	 * First, stop submission to hw, but do not yet complete requests by
@@ -820,7 +823,7 @@ static void __intel_gt_set_wedged(struct intel_gt *gt)
 
 	reset_finish(gt, awake);
 
-	GEM_TRACE("end\n");
+	GEM_TRACE("[%s] end\n", dev_name(gt->i915->drm.dev));
 }
 
 void intel_gt_set_wedged(struct intel_gt *gt)
@@ -846,7 +849,7 @@ static bool __intel_gt_unset_wedged(struct intel_gt *gt)
 	if (test_bit(I915_WEDGED_ON_INIT, &gt->reset.flags))
 		return false;
 
-	GEM_TRACE("start\n");
+	GEM_TRACE("[%s] start\n", dev_name(gt->i915->drm.dev));
 
 	/*
 	 * Before unwedging, make sure that all pending operations
@@ -908,7 +911,7 @@ static bool __intel_gt_unset_wedged(struct intel_gt *gt)
 	 */
 	intel_engines_reset_default_submission(gt);
 
-	GEM_TRACE("end\n");
+	GEM_TRACE("[%s] end\n", dev_name(gt->i915->drm.dev));
 
 	smp_mb__before_atomic(); /* complete takeover before enabling execbuf */
 	clear_bit(I915_WEDGED, &gt->reset.flags);
@@ -983,7 +986,8 @@ void intel_gt_reset(struct intel_gt *gt,
 	intel_engine_mask_t awake;
 	int ret;
 
-	GEM_TRACE("flags=%lx\n", gt->reset.flags);
+	GEM_TRACE("[%s] flags=%lx\n", dev_name(gt->i915->drm.dev),
+		  gt->reset.flags);
 
 	might_sleep();
 	GEM_BUG_ON(!test_bit(I915_RESET_BACKOFF, &gt->reset.flags));
@@ -1089,7 +1093,8 @@ int intel_engine_reset(struct intel_engine_cs *engine, const char *msg)
 	bool uses_guc = intel_engine_in_guc_submission_mode(engine);
 	int ret;
 
-	GEM_TRACE("%s flags=%lx\n", engine->name, gt->reset.flags);
+	GEM_TRACE("[%s] %s flags=%lx\n", dev_name(engine->i915->drm.dev),
+		  engine->name, gt->reset.flags);
 	GEM_BUG_ON(!test_bit(I915_RESET_ENGINE + engine->id, &gt->reset.flags));
 
 	if (!intel_engine_pm_get_if_awake(engine))
diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
index 5c22ca6f998a..90cf5eedc228 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
@@ -632,7 +632,8 @@ static int xcs_resume(struct intel_engine_cs *engine)
 	struct intel_ring *ring = engine->legacy.ring;
 	int ret = 0;
 
-	GEM_TRACE("%s: ring:{HEAD:%04x, TAIL:%04x}\n",
+	GEM_TRACE("[%s] %s: ring:{HEAD:%04x, TAIL:%04x}\n",
+		  dev_name(engine->i915->drm.dev),
 		  engine->name, ring->head, ring->tail);
 
 	intel_uncore_forcewake_get(engine->uncore, FORCEWAKE_ALL);
@@ -746,10 +747,11 @@ static void reset_prepare(struct intel_engine_cs *engine)
 	 *
 	 * FIXME: Wa for more modern gens needs to be validated
 	 */
-	GEM_TRACE("%s\n", engine->name);
+	GEM_TRACE("[%s] %s\n", dev_name(engine->i915->drm.dev), engine->name);
 
 	if (intel_engine_stop_cs(engine))
-		GEM_TRACE("%s: timed out on STOP_RING\n", engine->name);
+		GEM_TRACE("[%s] %s: timed out on STOP_RING\n", dev_name(engine->i915->drm.dev),
+			  engine->name);
 
 	intel_uncore_write_fw(uncore,
 			      RING_HEAD(base),
@@ -765,7 +767,8 @@ static void reset_prepare(struct intel_engine_cs *engine)
 
 	/* Check acts as a post */
 	if (intel_uncore_read_fw(uncore, RING_HEAD(base)))
-		GEM_TRACE("%s: ring head [%x] not parked\n",
+		GEM_TRACE("[%s] %s: ring head [%x] not parked\n",
+			  dev_name(engine->i915->drm.dev),
 			  engine->name,
 			  intel_uncore_read_fw(uncore, RING_HEAD(base)));
 }
diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index d155c9374453..b6cd26eaca08 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -678,7 +678,8 @@ static int active_request_put(struct i915_request *rq)
 		return 0;
 
 	if (i915_request_wait(rq, 0, 5 * HZ) < 0) {
-		GEM_TRACE("%s timed out waiting for completion of fence %llx:%lld\n",
+		GEM_TRACE("[%s] %s timed out waiting for completion of fence %llx:%lld\n",
+			  dev_name(rq->engine->i915->drm.dev),
 			  rq->engine->name,
 			  rq->fence.context,
 			  rq->fence.seqno);
@@ -1568,7 +1569,8 @@ static int __igt_atomic_reset_engine(struct intel_engine_cs *engine,
 	struct tasklet_struct * const t = &engine->execlists.tasklet;
 	int err;
 
-	GEM_TRACE("i915_reset_engine(%s:%s) under %s\n",
+	GEM_TRACE("[%s] i915_reset_engine(%s:%s) under %s\n",
+		  dev_name(engine->i915->drm.dev),
 		  engine->name, mode, p->name);
 
 	tasklet_disable(t);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 172220e83079..e184746dc370 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -375,7 +375,7 @@ static void guc_reset_prepare(struct intel_engine_cs *engine)
 {
 	struct intel_engine_execlists * const execlists = &engine->execlists;
 
-	GEM_TRACE("%s\n", engine->name);
+	GEM_TRACE("[%s] %s\n", dev_name(engine->i915->drm.dev), engine->name);
 
 	/*
 	 * Prevent request submission to the hardware until we have
@@ -434,7 +434,7 @@ static void guc_cancel_requests(struct intel_engine_cs *engine)
 	struct rb_node *rb;
 	unsigned long flags;
 
-	GEM_TRACE("%s\n", engine->name);
+	GEM_TRACE("[%s] %s\n", dev_name(engine->i915->drm.dev), engine->name);
 
 	/*
 	 * Before we call engine->cancel_requests(), we should have exclusive
@@ -495,8 +495,8 @@ static void guc_reset_finish(struct intel_engine_cs *engine)
 		/* And kick in case we missed a new request submission. */
 		tasklet_hi_schedule(&execlists->tasklet);
 
-	GEM_TRACE("%s: depth->%d\n", engine->name,
-		  atomic_read(&execlists->tasklet.count));
+	GEM_TRACE("[%s] %s: depth->%d\n", dev_name(engine->i915->drm.dev),
+		  engine->name, atomic_read(&execlists->tasklet.count));
 }
 
 /*
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index a6238c626a16..14242a14d9f9 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -223,7 +223,8 @@ bool i915_request_retire(struct i915_request *rq)
 	if (!i915_request_completed(rq))
 		return false;
 
-	GEM_TRACE("%s fence %llx:%lld, current %d\n",
+	GEM_TRACE("[%s] %s fence %llx:%lld, current %d\n",
+		  dev_name(rq->engine->i915->drm.dev),
 		  rq->engine->name,
 		  rq->fence.context, rq->fence.seqno,
 		  hwsp_seqno(rq));
@@ -287,7 +288,8 @@ void i915_request_retire_upto(struct i915_request *rq)
 	struct intel_timeline * const tl = i915_request_timeline(rq);
 	struct i915_request *tmp;
 
-	GEM_TRACE("%s fence %llx:%lld, current %d\n",
+	GEM_TRACE("[%s] %s fence %llx:%lld, current %d\n",
+		  dev_name(rq->engine->i915->drm.dev),
 		  rq->engine->name,
 		  rq->fence.context, rq->fence.seqno,
 		  hwsp_seqno(rq));
@@ -351,7 +353,8 @@ bool __i915_request_submit(struct i915_request *request)
 	struct intel_engine_cs *engine = request->engine;
 	bool result = false;
 
-	GEM_TRACE("%s fence %llx:%lld, current %d\n",
+	GEM_TRACE("[%s] %s fence %llx:%lld, current %d\n",
+		  dev_name(engine->i915->drm.dev),
 		  engine->name,
 		  request->fence.context, request->fence.seqno,
 		  hwsp_seqno(request));
@@ -443,7 +446,8 @@ void __i915_request_unsubmit(struct i915_request *request)
 {
 	struct intel_engine_cs *engine = request->engine;
 
-	GEM_TRACE("%s fence %llx:%lld, current %d\n",
+	GEM_TRACE("[%s] %s fence %llx:%lld, current %d\n",
+		  dev_name(engine->i915->drm.dev),
 		  engine->name,
 		  request->fence.context, request->fence.seqno,
 		  hwsp_seqno(request));
@@ -1261,7 +1265,8 @@ struct i915_request *__i915_request_commit(struct i915_request *rq)
 	struct intel_ring *ring = rq->ring;
 	u32 *cs;
 
-	GEM_TRACE("%s fence %llx:%lld\n",
+	GEM_TRACE("[%s] %s fence %llx:%lld\n",
+		  dev_name(engine->i915->drm.dev),
 		  engine->name, rq->fence.context, rq->fence.seqno);
 
 	/*
-- 
2.21.0.5.gaeb582a983

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^ permalink raw reply related	[flat|nested] 9+ messages in thread

* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Tag GEM_TRACE with device name
  2019-12-12  7:35 ` [Intel-gfx] [PATCH 2/2] drm/i915: Tag GEM_TRACE with device name Venkata Sandeep Dhanalakota
@ 2019-12-12  8:30   ` Chris Wilson
  2019-12-12 21:14     ` Lucas De Marchi
  0 siblings, 1 reply; 9+ messages in thread
From: Chris Wilson @ 2019-12-12  8:30 UTC (permalink / raw
  To: Venkata Sandeep Dhanalakota, intel-gfx

Quoting Venkata Sandeep Dhanalakota (2019-12-12 07:35:22)
> Adding device name to trace makes debugging easier,
> when dealing with multiple gpus.

I'm not going to type that by hand, so let's try a little bit of
ingenuity.

---
 drivers/gpu/drm/i915/gt/intel_engine.h        |   8 ++
 drivers/gpu/drm/i915/gt/intel_engine_cs.c     |   6 +-
 drivers/gpu/drm/i915/gt/intel_engine_pm.c     |   6 +-
 drivers/gpu/drm/i915/gt/intel_lrc.c           | 106 ++++++++----------
 drivers/gpu/drm/i915/gt/intel_reset.c         |   2 +-
 .../gpu/drm/i915/gt/intel_ring_submission.c   |  11 +-
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |   8 +-
 7 files changed, 72 insertions(+), 75 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h b/drivers/gpu/drm/i915/gt/intel_engine.h
index c294ea80605e..d9c7121fa09e 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine.h
@@ -29,6 +29,14 @@ struct intel_gt;
 #define CACHELINE_BYTES 64
 #define CACHELINE_DWORDS (CACHELINE_BYTES / sizeof(u32))
 
+#define ENGINE_TRACE(e__, fmt, ...) do {				\
+	typecheck(struct intel_engine_cs, *(e__));			\
+	GEM_TRACE("%s %s: " fmt, 					\
+		  dev_name((e__)->i915->drm.dev),			\
+		  (e__)->name,						\
+		  ##__VA_ARGS__);					\
+} while (0)
+
 /*
  * The register defines to be used with the following macros need to accept a
  * base param, e.g:
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 49473c25916c..3d1d48bf90cf 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -912,7 +912,7 @@ int intel_engine_stop_cs(struct intel_engine_cs *engine)
 	if (INTEL_GEN(engine->i915) < 3)
 		return -ENODEV;
 
-	GEM_TRACE("%s\n", engine->name);
+	ENGINE_TRACE(engine, "\n");
 
 	intel_uncore_write_fw(uncore, mode, _MASKED_BIT_ENABLE(STOP_RING));
 
@@ -921,7 +921,7 @@ int intel_engine_stop_cs(struct intel_engine_cs *engine)
 					 mode, MODE_IDLE, MODE_IDLE,
 					 1000, stop_timeout(engine),
 					 NULL)) {
-		GEM_TRACE("%s: timed out on STOP_RING -> IDLE\n", engine->name);
+		ENGINE_TRACE(engine, "timed out on STOP_RING -> IDLE\n");
 		err = -ETIMEDOUT;
 	}
 
@@ -933,7 +933,7 @@ int intel_engine_stop_cs(struct intel_engine_cs *engine)
 
 void intel_engine_cancel_stop_cs(struct intel_engine_cs *engine)
 {
-	GEM_TRACE("%s\n", engine->name);
+	ENGINE_TRACE(engine, "\n");
 
 	ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING));
 }
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index 889eb37e386a..bcbda8e52d41 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -21,7 +21,7 @@ static int __engine_unpark(struct intel_wakeref *wf)
 		container_of(wf, typeof(*engine), wakeref);
 	void *map;
 
-	GEM_TRACE("%s\n", engine->name);
+	ENGINE_TRACE(engine, "\n");
 
 	intel_gt_pm_get(engine->gt);
 
@@ -80,7 +80,7 @@ __queue_and_release_pm(struct i915_request *rq,
 {
 	struct intel_gt_timelines *timelines = &engine->gt->timelines;
 
-	GEM_TRACE("%s\n", engine->name);
+	ENGINE_TRACE(engine, "\n");
 
 	/*
 	 * We have to serialise all potential retirement paths with our
@@ -204,7 +204,7 @@ static int __engine_park(struct intel_wakeref *wf)
 	if (!switch_to_kernel_context(engine))
 		return -EBUSY;
 
-	GEM_TRACE("%s\n", engine->name);
+	ENGINE_TRACE(engine, "\n");
 
 	call_idle_barriers(engine); /* cleanup after wedging */
 
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 929f6bae4eba..e402b3b28150 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1069,8 +1069,8 @@ static void reset_active(struct i915_request *rq,
 	 * remain correctly ordered. And we defer to __i915_request_submit()
 	 * so that all asynchronous waits are correctly handled.
 	 */
-	GEM_TRACE("%s(%s): { rq=%llx:%lld }\n",
-		  __func__, engine->name, rq->fence.context, rq->fence.seqno);
+	ENGINE_TRACE(engine, "{ rq=%llx:%lld }\n",
+		     rq->fence.context, rq->fence.seqno);
 
 	/* On resubmission of the active request, payload will be scrubbed */
 	if (i915_request_completed(rq))
@@ -1274,15 +1274,14 @@ trace_ports(const struct intel_engine_execlists *execlists,
 	if (!ports[0])
 		return;
 
-	GEM_TRACE("%s: %s { %llx:%lld%s, %llx:%lld }\n",
-		  engine->name, msg,
-		  ports[0]->fence.context,
-		  ports[0]->fence.seqno,
-		  i915_request_completed(ports[0]) ? "!" :
-		  i915_request_started(ports[0]) ? "*" :
-		  "",
-		  ports[1] ? ports[1]->fence.context : 0,
-		  ports[1] ? ports[1]->fence.seqno : 0);
+	ENGINE_TRACE(engine, "%s { %llx:%lld%s, %llx:%lld }\n", msg,
+		     ports[0]->fence.context,
+		     ports[0]->fence.seqno,
+		     i915_request_completed(ports[0]) ? "!" :
+		     i915_request_started(ports[0]) ? "*" :
+		     "",
+		     ports[1] ? ports[1]->fence.context : 0,
+		     ports[1] ? ports[1]->fence.seqno : 0);
 }
 
 static __maybe_unused bool
@@ -1700,12 +1699,11 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 	last = last_active(execlists);
 	if (last) {
 		if (need_preempt(engine, last, rb)) {
-			GEM_TRACE("%s: preempting last=%llx:%lld, prio=%d, hint=%d\n",
-				  engine->name,
-				  last->fence.context,
-				  last->fence.seqno,
-				  last->sched.attr.priority,
-				  execlists->queue_priority_hint);
+			ENGINE_TRACE(engine, "preempting last=%llx:%lld, prio=%d, hint=%d\n",
+				     last->fence.context,
+				     last->fence.seqno,
+				     last->sched.attr.priority,
+				     execlists->queue_priority_hint);
 			record_preemption(execlists);
 
 			/*
@@ -1735,12 +1733,12 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 			last = NULL;
 		} else if (need_timeslice(engine, last) &&
 			   timer_expired(&engine->execlists.timer)) {
-			GEM_TRACE("%s: expired last=%llx:%lld, prio=%d, hint=%d\n",
-				  engine->name,
-				  last->fence.context,
-				  last->fence.seqno,
-				  last->sched.attr.priority,
-				  execlists->queue_priority_hint);
+			ENGINE_TRACE(engine,
+				     "expired last=%llx:%lld, prio=%d, hint=%d\n",
+				     last->fence.context,
+				     last->fence.seqno,
+				     last->sched.attr.priority,
+				     execlists->queue_priority_hint);
 
 			ring_set_paused(engine, 1);
 			defer_active(engine);
@@ -1817,14 +1815,13 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 				return; /* leave this for another */
 			}
 
-			GEM_TRACE("%s: virtual rq=%llx:%lld%s, new engine? %s\n",
-				  engine->name,
-				  rq->fence.context,
-				  rq->fence.seqno,
-				  i915_request_completed(rq) ? "!" :
-				  i915_request_started(rq) ? "*" :
-				  "",
-				  yesno(engine != ve->siblings[0]));
+			ENGINE_TRACE(engine, "virtual rq=%llx:%lld%s, new engine? %s\n",
+				     rq->fence.context,
+				     rq->fence.seqno,
+				     i915_request_completed(rq) ? "!" :
+				     i915_request_started(rq) ? "*" :
+				     "",
+				     yesno(engine != ve->siblings[0]));
 
 			ve->request = NULL;
 			ve->base.execlists.queue_priority_hint = INT_MIN;
@@ -1980,9 +1977,6 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 	 * interrupt for secondary ports).
 	 */
 	execlists->queue_priority_hint = queue_prio(execlists);
-	GEM_TRACE("%s: queue_priority_hint:%d, submit:%s\n",
-		  engine->name, execlists->queue_priority_hint,
-		  yesno(submit));
 
 	if (submit) {
 		*port = execlists_schedule_in(last, port - execlists->pending);
@@ -2131,7 +2125,7 @@ static void process_csb(struct intel_engine_cs *engine)
 	 */
 	head = execlists->csb_head;
 	tail = READ_ONCE(*execlists->csb_write);
-	GEM_TRACE("%s cs-irq head=%d, tail=%d\n", engine->name, head, tail);
+	ENGINE_TRACE(engine, "cs-irq head=%d, tail=%d\n", head, tail);
 	if (unlikely(head == tail))
 		return;
 
@@ -2169,9 +2163,8 @@ static void process_csb(struct intel_engine_cs *engine)
 		 * status notifier.
 		 */
 
-		GEM_TRACE("%s csb[%d]: status=0x%08x:0x%08x\n",
-			  engine->name, head,
-			  buf[2 * head + 0], buf[2 * head + 1]);
+		ENGINE_TRACE(engine, "csb[%d]: status=0x%08x:0x%08x\n",
+			     head, buf[2 * head + 0], buf[2 * head + 1]);
 
 		if (INTEL_GEN(engine->i915) >= 12)
 			promote = gen12_csb_parse(execlists, buf + 2 * head);
@@ -2262,10 +2255,9 @@ static noinline void preempt_reset(struct intel_engine_cs *engine)
 	/* Mark this tasklet as disabled to avoid waiting for it to complete */
 	tasklet_disable_nosync(&engine->execlists.tasklet);
 
-	GEM_TRACE("%s: preempt timeout %lu+%ums\n",
-		  engine->name,
-		  READ_ONCE(engine->props.preempt_timeout_ms),
-		  jiffies_to_msecs(jiffies - engine->execlists.preempt.expires));
+	ENGINE_TRACE(engine, "preempt timeout %lu+%ums\n",
+		     READ_ONCE(engine->props.preempt_timeout_ms),
+		     jiffies_to_msecs(jiffies - engine->execlists.preempt.expires));
 	intel_engine_reset(engine, "preemption time out");
 
 	tasklet_enable(&engine->execlists.tasklet);
@@ -2971,8 +2963,8 @@ static void execlists_reset_prepare(struct intel_engine_cs *engine)
 	struct intel_engine_execlists * const execlists = &engine->execlists;
 	unsigned long flags;
 
-	GEM_TRACE("%s: depth<-%d\n", engine->name,
-		  atomic_read(&execlists->tasklet.count));
+	ENGINE_TRACE(engine, "depth<-%d\n",
+		     atomic_read(&execlists->tasklet.count));
 
 	/*
 	 * Prevent request submission to the hardware until we have
@@ -3134,8 +3126,8 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
 	restore_default_state(ce, engine);
 
 out_replay:
-	GEM_TRACE("%s replay {head:%04x, tail:%04x}\n",
-		  engine->name, ce->ring->head, ce->ring->tail);
+	ENGINE_TRACE(engine, "replay {head:%04x, tail:%04x}\n",
+		     ce->ring->head, ce->ring->tail);
 	intel_ring_update_space(ce->ring);
 	__execlists_reset_reg_state(ce, engine);
 	__execlists_update_reg_state(ce, engine);
@@ -3151,7 +3143,7 @@ static void execlists_reset(struct intel_engine_cs *engine, bool stalled)
 {
 	unsigned long flags;
 
-	GEM_TRACE("%s\n", engine->name);
+	ENGINE_TRACE(engine, "\n");
 
 	spin_lock_irqsave(&engine->active.lock, flags);
 
@@ -3172,7 +3164,7 @@ static void execlists_cancel_requests(struct intel_engine_cs *engine)
 	struct rb_node *rb;
 	unsigned long flags;
 
-	GEM_TRACE("%s\n", engine->name);
+	ENGINE_TRACE(engine, "\n");
 
 	/*
 	 * Before we call engine->cancel_requests(), we should have exclusive
@@ -3259,8 +3251,8 @@ static void execlists_reset_finish(struct intel_engine_cs *engine)
 	if (__tasklet_enable(&execlists->tasklet))
 		/* And kick in case we missed a new request submission. */
 		tasklet_hi_schedule(&execlists->tasklet);
-	GEM_TRACE("%s: depth->%d\n", engine->name,
-		  atomic_read(&execlists->tasklet.count));
+	ENGINE_TRACE(engine, "depth->%d\n",
+		     atomic_read(&execlists->tasklet.count));
 }
 
 static int gen8_emit_bb_start(struct i915_request *rq,
@@ -4309,10 +4301,9 @@ static intel_engine_mask_t virtual_submission_mask(struct virtual_engine *ve)
 		mask = ve->siblings[0]->mask;
 	}
 
-	GEM_TRACE("%s: rq=%llx:%lld, mask=%x, prio=%d\n",
-		  ve->base.name,
-		  rq->fence.context, rq->fence.seqno,
-		  mask, ve->base.execlists.queue_priority_hint);
+	ENGINE_TRACE(&ve->base, "rq=%llx:%lld, mask=%x, prio=%d\n",
+		     rq->fence.context, rq->fence.seqno,
+		     mask, ve->base.execlists.queue_priority_hint);
 
 	return mask;
 }
@@ -4403,10 +4394,9 @@ static void virtual_submit_request(struct i915_request *rq)
 	struct i915_request *old;
 	unsigned long flags;
 
-	GEM_TRACE("%s: rq=%llx:%lld\n",
-		  ve->base.name,
-		  rq->fence.context,
-		  rq->fence.seqno);
+	ENGINE_TRACE(&ve->base, "rq=%llx:%lld\n",
+		     rq->fence.context,
+		     rq->fence.seqno);
 
 	GEM_BUG_ON(ve->base.submit_request != virtual_submit_request);
 
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 8408cb84e52c..f5b2e7c7e6c8 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1089,7 +1089,7 @@ int intel_engine_reset(struct intel_engine_cs *engine, const char *msg)
 	bool uses_guc = intel_engine_in_guc_submission_mode(engine);
 	int ret;
 
-	GEM_TRACE("%s flags=%lx\n", engine->name, gt->reset.flags);
+	ENGINE_TRACE(engine, "flags=%lx\n", gt->reset.flags);
 	GEM_BUG_ON(!test_bit(I915_RESET_ENGINE + engine->id, &gt->reset.flags));
 
 	if (!intel_engine_pm_get_if_awake(engine))
diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
index 5c22ca6f998a..32334476cd77 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
@@ -632,8 +632,8 @@ static int xcs_resume(struct intel_engine_cs *engine)
 	struct intel_ring *ring = engine->legacy.ring;
 	int ret = 0;
 
-	GEM_TRACE("%s: ring:{HEAD:%04x, TAIL:%04x}\n",
-		  engine->name, ring->head, ring->tail);
+	ENGINE_TRACE(engine, "ring:{HEAD:%04x, TAIL:%04x}\n",
+		     ring->head, ring->tail);
 
 	intel_uncore_forcewake_get(engine->uncore, FORCEWAKE_ALL);
 
@@ -746,10 +746,10 @@ static void reset_prepare(struct intel_engine_cs *engine)
 	 *
 	 * FIXME: Wa for more modern gens needs to be validated
 	 */
-	GEM_TRACE("%s\n", engine->name);
+	ENGINE_TRACE(engine, "\n");
 
 	if (intel_engine_stop_cs(engine))
-		GEM_TRACE("%s: timed out on STOP_RING\n", engine->name);
+		ENGINE_TRACE(engine, "timed out on STOP_RING\n");
 
 	intel_uncore_write_fw(uncore,
 			      RING_HEAD(base),
@@ -765,8 +765,7 @@ static void reset_prepare(struct intel_engine_cs *engine)
 
 	/* Check acts as a post */
 	if (intel_uncore_read_fw(uncore, RING_HEAD(base)))
-		GEM_TRACE("%s: ring head [%x] not parked\n",
-			  engine->name,
+		ENGINE_TRACE(engine, "ring head [%x] not parked\n",
 			  intel_uncore_read_fw(uncore, RING_HEAD(base)));
 }
 
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 172220e83079..af04ed6e48d9 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -375,7 +375,7 @@ static void guc_reset_prepare(struct intel_engine_cs *engine)
 {
 	struct intel_engine_execlists * const execlists = &engine->execlists;
 
-	GEM_TRACE("%s\n", engine->name);
+	ENGINE_TRACE(engine, "\n");
 
 	/*
 	 * Prevent request submission to the hardware until we have
@@ -434,7 +434,7 @@ static void guc_cancel_requests(struct intel_engine_cs *engine)
 	struct rb_node *rb;
 	unsigned long flags;
 
-	GEM_TRACE("%s\n", engine->name);
+	ENGINE_TRACE(engine, "\n");
 
 	/*
 	 * Before we call engine->cancel_requests(), we should have exclusive
@@ -495,8 +495,8 @@ static void guc_reset_finish(struct intel_engine_cs *engine)
 		/* And kick in case we missed a new request submission. */
 		tasklet_hi_schedule(&execlists->tasklet);
 
-	GEM_TRACE("%s: depth->%d\n", engine->name,
-		  atomic_read(&execlists->tasklet.count));
+	ENGINE_TRACE(engine, "depth->%d\n",
+		     atomic_read(&execlists->tasklet.count));
 }
 
 /*
-- 
2.24.0

---------------------------------------------------------------------
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Registered Office: Pipers Way, Swindon SN3 1RJ
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^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/perf: Register sysctl path globally (rev2)
  2019-12-12  7:35 [Intel-gfx] [PATCH 1/2] drm/i915/perf: Register sysctl path globally Venkata Sandeep Dhanalakota
  2019-12-12  7:35 ` [Intel-gfx] [PATCH 2/2] drm/i915: Tag GEM_TRACE with device name Venkata Sandeep Dhanalakota
@ 2019-12-12  9:37 ` Patchwork
  2019-12-12 10:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2019-12-12  9:37 UTC (permalink / raw
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915/perf: Register sysctl path globally (rev2)
URL   : https://patchwork.freedesktop.org/series/70802/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
bea21235639b drm/i915/perf: Register sysctl path globally
9755ac8c9861 drm/i915: Tag GEM_TRACE with device name
-:21: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'e__' - possible side-effects?
#21: FILE: drivers/gpu/drm/i915/gt/intel_engine.h:32:
+#define ENGINE_TRACE(e__, fmt, ...) do {				\
+	typecheck(struct intel_engine_cs, *(e__));			\
+	GEM_TRACE("%s %s: " fmt, 					\
+		  dev_name((e__)->i915->drm.dev),			\
+		  (e__)->name,						\
+		  ##__VA_ARGS__);					\
+} while (0)

-:23: WARNING:SPACE_BEFORE_TAB: please, no space before tabs
#23: FILE: drivers/gpu/drm/i915/gt/intel_engine.h:34:
+^IGEM_TRACE("%s %s: " fmt, ^I^I^I^I^I\$

-:364: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#364: FILE: drivers/gpu/drm/i915/gt/intel_ring_submission.c:769:
+		ENGINE_TRACE(engine, "ring head [%x] not parked\n",
 			  intel_uncore_read_fw(uncore, RING_HEAD(base)));

-:399: ERROR:MISSING_SIGN_OFF: Missing Signed-off-by: line(s)

total: 1 errors, 1 warnings, 2 checks, 329 lines checked

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/perf: Register sysctl path globally (rev2)
  2019-12-12  7:35 [Intel-gfx] [PATCH 1/2] drm/i915/perf: Register sysctl path globally Venkata Sandeep Dhanalakota
  2019-12-12  7:35 ` [Intel-gfx] [PATCH 2/2] drm/i915: Tag GEM_TRACE with device name Venkata Sandeep Dhanalakota
  2019-12-12  9:37 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/perf: Register sysctl path globally (rev2) Patchwork
@ 2019-12-12 10:30 ` Patchwork
  2019-12-12 20:40 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
  2019-12-12 21:34 ` [Intel-gfx] [PATCH 1/2] drm/i915/perf: Register sysctl path globally Lucas De Marchi
  4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2019-12-12 10:30 UTC (permalink / raw
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915/perf: Register sysctl path globally (rev2)
URL   : https://patchwork.freedesktop.org/series/70802/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7549 -> Patchwork_15710
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/index.html

Known issues
------------

  Here are the changes found in Patchwork_15710 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_gem_contexts:
    - fi-byt-n2820:       [PASS][1] -> [INCOMPLETE][2] ([i915#45])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html

  
#### Possible fixes ####

  * igt@i915_selftest@live_blt:
    - fi-ivb-3770:        [DMESG-FAIL][3] ([i915#563]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/fi-ivb-3770/igt@i915_selftest@live_blt.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/fi-ivb-3770/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_hangcheck:
    - fi-icl-u3:          [INCOMPLETE][5] ([fdo#108569] / [i915#140]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/fi-icl-u3/igt@i915_selftest@live_hangcheck.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/fi-icl-u3/igt@i915_selftest@live_hangcheck.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][7] ([fdo#111096] / [i915#323]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
#### Warnings ####

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-kbl-x1275:       [DMESG-WARN][9] ([fdo#107139] / [i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][10] ([fdo#107139] / [i915#62] / [i915#92])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/fi-kbl-x1275/igt@gem_exec_suspend@basic-s4-devices.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/fi-kbl-x1275/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@kms_flip@basic-flip-vs-modeset:
    - fi-kbl-x1275:       [DMESG-WARN][11] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][12] ([i915#62] / [i915#92]) +4 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-modeset.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-modeset.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - fi-kbl-x1275:       [DMESG-WARN][13] ([i915#62] / [i915#92]) -> [DMESG-WARN][14] ([i915#62] / [i915#92] / [i915#95]) +2 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/fi-kbl-x1275/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/fi-kbl-x1275/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#107139]: https://bugs.freedesktop.org/show_bug.cgi?id=107139
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [i915#140]: https://gitlab.freedesktop.org/drm/intel/issues/140
  [i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
  [i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
  [i915#476]: https://gitlab.freedesktop.org/drm/intel/issues/476
  [i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (48 -> 42)
------------------------------

  Missing    (6): fi-ilk-m540 fi-bsw-n3050 fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7549 -> Patchwork_15710

  CI-20190529: 20190529
  CI_DRM_7549: 9573e1b7d1cb54cc984cf5c4f93a743641d868da @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5346: 466b0e6cbcbaccff012b484d1fd7676364b37b93 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15710: 9755ac8c986102b27ad0c5e22d9ec1660c716f64 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

9755ac8c9861 drm/i915: Tag GEM_TRACE with device name
bea21235639b drm/i915/perf: Register sysctl path globally

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/perf: Register sysctl path globally (rev2)
  2019-12-12  7:35 [Intel-gfx] [PATCH 1/2] drm/i915/perf: Register sysctl path globally Venkata Sandeep Dhanalakota
                   ` (2 preceding siblings ...)
  2019-12-12 10:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2019-12-12 20:40 ` Patchwork
  2019-12-12 21:34 ` [Intel-gfx] [PATCH 1/2] drm/i915/perf: Register sysctl path globally Lucas De Marchi
  4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2019-12-12 20:40 UTC (permalink / raw
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915/perf: Register sysctl path globally (rev2)
URL   : https://patchwork.freedesktop.org/series/70802/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7549_full -> Patchwork_15710_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_15710_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@bcs0-s3:
    - shard-apl:          [PASS][1] -> [DMESG-WARN][2] ([i915#180]) +2 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-apl8/igt@gem_ctx_isolation@bcs0-s3.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-apl1/igt@gem_ctx_isolation@bcs0-s3.html

  * igt@gem_ctx_persistence@vcs1-mixed:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#109276] / [fdo#112080])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-iclb1/igt@gem_ctx_persistence@vcs1-mixed.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-iclb5/igt@gem_ctx_persistence@vcs1-mixed.html

  * igt@gem_ctx_shared@q-smoketest-all:
    - shard-tglb:         [PASS][5] -> [INCOMPLETE][6] ([fdo#111735])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-tglb8/igt@gem_ctx_shared@q-smoketest-all.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-tglb6/igt@gem_ctx_shared@q-smoketest-all.html

  * igt@gem_eio@suspend:
    - shard-tglb:         [PASS][7] -> [INCOMPLETE][8] ([i915#460])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-tglb1/igt@gem_eio@suspend.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-tglb2/igt@gem_eio@suspend.html

  * igt@gem_exec_parallel@vcs1-fds:
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([fdo#112080]) +3 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-iclb4/igt@gem_exec_parallel@vcs1-fds.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-iclb8/igt@gem_exec_parallel@vcs1-fds.html

  * igt@gem_exec_parse_blt@allowed-all:
    - shard-glk:          [PASS][11] -> [DMESG-WARN][12] ([i915#716])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-glk6/igt@gem_exec_parse_blt@allowed-all.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-glk2/igt@gem_exec_parse_blt@allowed-all.html

  * igt@gem_exec_schedule@preempt-queue-chain-bsd:
    - shard-iclb:         [PASS][13] -> [SKIP][14] ([fdo#112146]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-iclb8/igt@gem_exec_schedule@preempt-queue-chain-bsd.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-iclb1/igt@gem_exec_schedule@preempt-queue-chain-bsd.html

  * igt@gem_exec_schedule@promotion-bsd1:
    - shard-iclb:         [PASS][15] -> [SKIP][16] ([fdo#109276]) +4 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-iclb4/igt@gem_exec_schedule@promotion-bsd1.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-iclb7/igt@gem_exec_schedule@promotion-bsd1.html

  * igt@gem_exec_suspend@basic-s0:
    - shard-iclb:         [PASS][17] -> [DMESG-WARN][18] ([fdo#111764])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-iclb1/igt@gem_exec_suspend@basic-s0.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-iclb7/igt@gem_exec_suspend@basic-s0.html

  * igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive:
    - shard-hsw:          [PASS][19] -> [TIMEOUT][20] ([i915#530])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-hsw5/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-hsw5/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-glk:          [PASS][21] -> [FAIL][22] ([i915#644])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-glk7/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-glk6/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_sync@basic-each:
    - shard-tglb:         [PASS][23] -> [INCOMPLETE][24] ([i915#472] / [i915#707])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-tglb2/igt@gem_sync@basic-each.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-tglb2/igt@gem_sync@basic-each.html

  * igt@kms_color@pipe-b-ctm-blue-to-red:
    - shard-skl:          [PASS][25] -> [DMESG-WARN][26] ([i915#109]) +1 similar issue
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-skl9/igt@kms_color@pipe-b-ctm-blue-to-red.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-skl1/igt@kms_color@pipe-b-ctm-blue-to-red.html

  * igt@kms_cursor_crc@pipe-c-cursor-256x85-random:
    - shard-tglb:         [PASS][27] -> [DMESG-WARN][28] ([i915#667])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-tglb8/igt@kms_cursor_crc@pipe-c-cursor-256x85-random.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-tglb8/igt@kms_cursor_crc@pipe-c-cursor-256x85-random.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-skl:          [PASS][29] -> [FAIL][30] ([IGT#5])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-gtt-ytiled:
    - shard-skl:          [PASS][31] -> [FAIL][32] ([i915#52] / [i915#54])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-skl8/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-gtt-ytiled.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-skl6/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-gtt-ytiled.html

  * igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-untiled:
    - shard-skl:          [PASS][33] -> [FAIL][34] ([i915#177] / [i915#52] / [i915#54])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-skl7/igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-untiled.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-skl4/igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-untiled.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-skl:          [PASS][35] -> [INCOMPLETE][36] ([i915#221])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-skl4/igt@kms_flip@flip-vs-suspend.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-skl10/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [PASS][37] -> [DMESG-WARN][38] ([i915#180]) +5 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
    - shard-tglb:         [PASS][39] -> [FAIL][40] ([i915#49]) +1 similar issue
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-tglb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-tglb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - shard-tglb:         [PASS][41] -> [INCOMPLETE][42] ([i915#456] / [i915#460])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-tglb2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-tglb3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [PASS][43] -> [FAIL][44] ([fdo#108145]) +1 similar issue
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][45] -> [FAIL][46] ([fdo#108145] / [i915#265])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_psr2_su@page_flip:
    - shard-iclb:         [PASS][47] -> [SKIP][48] ([fdo#109642] / [fdo#111068])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-iclb2/igt@kms_psr2_su@page_flip.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-iclb1/igt@kms_psr2_su@page_flip.html

  * igt@kms_psr@psr2_sprite_mmap_gtt:
    - shard-iclb:         [PASS][49] -> [SKIP][50] ([fdo#109441])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-iclb1/igt@kms_psr@psr2_sprite_mmap_gtt.html

  * igt@kms_psr@psr2_suspend:
    - shard-tglb:         [PASS][51] -> [DMESG-WARN][52] ([i915#402])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-tglb2/igt@kms_psr@psr2_suspend.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-tglb7/igt@kms_psr@psr2_suspend.html

  * igt@kms_setmode@basic:
    - shard-apl:          [PASS][53] -> [FAIL][54] ([i915#31])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-apl1/igt@kms_setmode@basic.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-apl7/igt@kms_setmode@basic.html

  
#### Possible fixes ####

  * igt@gem_ctx_persistence@vcs1-queued:
    - shard-iclb:         [SKIP][55] ([fdo#109276] / [fdo#112080]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-iclb8/igt@gem_ctx_persistence@vcs1-queued.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-iclb4/igt@gem_ctx_persistence@vcs1-queued.html

  * igt@gem_eio@reset-stress:
    - shard-snb:          [FAIL][57] ([i915#232]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-snb2/igt@gem_eio@reset-stress.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-snb1/igt@gem_eio@reset-stress.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][59] ([fdo#110854]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-iclb8/igt@gem_exec_balancer@smoke.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-iclb1/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_parallel@vcs1:
    - shard-tglb:         [INCOMPLETE][61] ([fdo#111593]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-tglb1/igt@gem_exec_parallel@vcs1.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-tglb7/igt@gem_exec_parallel@vcs1.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [SKIP][63] ([fdo#112146]) -> [PASS][64] +1 similar issue
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-iclb1/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-iclb5/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_exec_schedule@preempt-queue-bsd1:
    - shard-iclb:         [SKIP][65] ([fdo#109276]) -> [PASS][66] +10 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-iclb8/igt@gem_exec_schedule@preempt-queue-bsd1.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-iclb1/igt@gem_exec_schedule@preempt-queue-bsd1.html

  * igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive:
    - shard-snb:          [TIMEOUT][67] ([i915#530]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-snb1/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-snb7/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-hsw:          [FAIL][69] ([i915#520]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-hsw4/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-hsw1/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_persistent_relocs@forked-thrashing:
    - shard-iclb:         [TIMEOUT][71] ([i915#530]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-iclb6/igt@gem_persistent_relocs@forked-thrashing.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-iclb4/igt@gem_persistent_relocs@forked-thrashing.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-kbl:          [FAIL][73] ([i915#644]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-kbl4/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-kbl7/igt@gem_ppgtt@flink-and-close-vma-leak.html
    - shard-iclb:         [FAIL][75] ([i915#644]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-iclb1/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-iclb7/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_softpin@noreloc-s3:
    - shard-skl:          [INCOMPLETE][77] ([i915#69]) -> [PASS][78] +1 similar issue
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-skl8/igt@gem_softpin@noreloc-s3.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-skl3/igt@gem_softpin@noreloc-s3.html

  * igt@i915_pm_rpm@system-suspend-devices:
    - shard-tglb:         [INCOMPLETE][79] ([i915#456] / [i915#460]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-tglb8/igt@i915_pm_rpm@system-suspend-devices.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-tglb2/igt@i915_pm_rpm@system-suspend-devices.html

  * igt@i915_selftest@mock_sanitycheck:
    - shard-snb:          [DMESG-WARN][81] ([i915#747]) -> [PASS][82]
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-snb1/igt@i915_selftest@mock_sanitycheck.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-snb5/igt@i915_selftest@mock_sanitycheck.html

  * igt@kms_color@pipe-b-ctm-max:
    - shard-skl:          [DMESG-WARN][83] ([i915#109]) -> [PASS][84] +1 similar issue
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-skl1/igt@kms_color@pipe-b-ctm-max.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-skl2/igt@kms_color@pipe-b-ctm-max.html

  * igt@kms_cursor_crc@pipe-b-cursor-256x256-sliding:
    - shard-skl:          [FAIL][85] ([i915#54]) -> [PASS][86]
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-skl2/igt@kms_cursor_crc@pipe-b-cursor-256x256-sliding.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-skl3/igt@kms_cursor_crc@pipe-b-cursor-256x256-sliding.html

  * igt@kms_cursor_crc@pipe-b-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][87] ([i915#180]) -> [PASS][88]
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-kbl1/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-kbl2/igt@kms_cursor_crc@pipe-b-cursor-suspend.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-skl:          [FAIL][89] ([IGT#5]) -> [PASS][90]
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-skl4/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-apl:          [DMESG-WARN][91] ([i915#180]) -> [PASS][92] +1 similar issue
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible.html
    - shard-snb:          [DMESG-WARN][93] ([i915#42]) -> [PASS][94]
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-snb2/igt@kms_flip@flip-vs-suspend-interruptible.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-snb4/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip@plain-flip-interruptible:
    - shard-kbl:          [INCOMPLETE][95] ([fdo#103665]) -> [PASS][96]
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-kbl7/igt@kms_flip@plain-flip-interruptible.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-kbl4/igt@kms_flip@plain-flip-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-tglb:         [INCOMPLETE][97] ([i915#456] / [i915#460] / [i915#474]) -> [PASS][98]
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt:
    - shard-tglb:         [INCOMPLETE][99] ([i915#474] / [i915#667]) -> [PASS][100] +1 similar issue
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-tglb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt.html

  * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
    - shard-kbl:          [INCOMPLETE][101] ([fdo#103665] / [i915#435] / [i915#648] / [i915#667]) -> [PASS][102]
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-kbl1/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-kbl3/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [SKIP][103] ([fdo#109441]) -> [PASS][104] +2 similar issues
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-iclb3/igt@kms_psr@psr2_primary_mmap_cpu.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html

  * igt@kms_setmode@basic:
    - shard-kbl:          [FAIL][105] ([i915#31]) -> [PASS][106]
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-kbl7/igt@kms_setmode@basic.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-kbl2/igt@kms_setmode@basic.html

  * igt@kms_vblank@pipe-d-ts-continuation-dpms-suspend:
    - shard-tglb:         [INCOMPLETE][107] ([i915#460]) -> [PASS][108]
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-tglb1/igt@kms_vblank@pipe-d-ts-continuation-dpms-suspend.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-tglb7/igt@kms_vblank@pipe-d-ts-continuation-dpms-suspend.html

  * igt@perf@sysctl-defaults:
    - shard-snb:          [SKIP][109] ([fdo#109271]) -> [PASS][110]
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-snb7/igt@perf@sysctl-defaults.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-snb7/igt@perf@sysctl-defaults.html

  * igt@perf_pmu@busy-no-semaphores-vcs1:
    - shard-iclb:         [SKIP][111] ([fdo#112080]) -> [PASS][112] +5 similar issues
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-iclb5/igt@perf_pmu@busy-no-semaphores-vcs1.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-iclb2/igt@perf_pmu@busy-no-semaphores-vcs1.html

  
#### Warnings ####

  * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
    - shard-skl:          [INCOMPLETE][113] ([fdo#112391] / [i915#648] / [i915#667]) -> [INCOMPLETE][114] ([fdo#112347] / [i915#648] / [i915#667])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7549/shard-skl3/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/shard-skl5/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#5]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/5
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111593]: https://bugs.freedesktop.org/show_bug.cgi?id=111593
  [fdo#111735]: https://bugs.freedesktop.org/show_bug.cgi?id=111735
  [fdo#111764]: https://bugs.freedesktop.org/show_bug.cgi?id=111764
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [fdo#112347]: https://bugs.freedesktop.org/show_bug.cgi?id=112347
  [fdo#112391]: https://bugs.freedesktop.org/show_bug.cgi?id=112391
  [i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109
  [i915#177]: https://gitlab.freedesktop.org/drm/intel/issues/177
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#221]: https://gitlab.freedesktop.org/drm/intel/issues/221
  [i915#232]: https://gitlab.freedesktop.org/drm/intel/issues/232
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
  [i915#42]: https://gitlab.freedesktop.org/drm/intel/issues/42
  [i915#435]: https://gitlab.freedesktop.org/drm/intel/issues/435
  [i915#456]: https://gitlab.freedesktop.org/drm/intel/issues/456
  [i915#460]: https://gitlab.freedesktop.org/drm/intel/issues/460
  [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
  [i915#474]: https://gitlab.freedesktop.org/drm/intel/issues/474
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52
  [i915#520]: https://gitlab.freedesktop.org/drm/intel/issues/520
  [i915#530]: https://gitlab.freedesktop.org/drm/intel/issues/530
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
  [i915#648]: https://gitlab.freedesktop.org/drm/intel/issues/648
  [i915#667]: https://gitlab.freedesktop.org/drm/intel/issues/667
  [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
  [i915#707]: https://gitlab.freedesktop.org/drm/intel/issues/707
  [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
  [i915#747]: https://gitlab.freedesktop.org/drm/intel/issues/747


Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7549 -> Patchwork_15710

  CI-20190529: 20190529
  CI_DRM_7549: 9573e1b7d1cb54cc984cf5c4f93a743641d868da @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5346: 466b0e6cbcbaccff012b484d1fd7676364b37b93 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15710: 9755ac8c986102b27ad0c5e22d9ec1660c716f64 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15710/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Tag GEM_TRACE with device name
  2019-12-12  8:30   ` Chris Wilson
@ 2019-12-12 21:14     ` Lucas De Marchi
  0 siblings, 0 replies; 9+ messages in thread
From: Lucas De Marchi @ 2019-12-12 21:14 UTC (permalink / raw
  To: Chris Wilson; +Cc: intel-gfx

On Thu, Dec 12, 2019 at 08:30:20AM +0000, Chris Wilson wrote:
>Quoting Venkata Sandeep Dhanalakota (2019-12-12 07:35:22)
>> Adding device name to trace makes debugging easier,
>> when dealing with multiple gpus.
>
>I'm not going to type that by hand, so let's try a little bit of
>ingenuity.
>
>---
> drivers/gpu/drm/i915/gt/intel_engine.h        |   8 ++
> drivers/gpu/drm/i915/gt/intel_engine_cs.c     |   6 +-
> drivers/gpu/drm/i915/gt/intel_engine_pm.c     |   6 +-
> drivers/gpu/drm/i915/gt/intel_lrc.c           | 106 ++++++++----------
> drivers/gpu/drm/i915/gt/intel_reset.c         |   2 +-
> .../gpu/drm/i915/gt/intel_ring_submission.c   |  11 +-
> .../gpu/drm/i915/gt/uc/intel_guc_submission.c |   8 +-
> 7 files changed, 72 insertions(+), 75 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h b/drivers/gpu/drm/i915/gt/intel_engine.h
>index c294ea80605e..d9c7121fa09e 100644
>--- a/drivers/gpu/drm/i915/gt/intel_engine.h
>+++ b/drivers/gpu/drm/i915/gt/intel_engine.h
>@@ -29,6 +29,14 @@ struct intel_gt;
> #define CACHELINE_BYTES 64
> #define CACHELINE_DWORDS (CACHELINE_BYTES / sizeof(u32))
>
>+#define ENGINE_TRACE(e__, fmt, ...) do {				\
>+	typecheck(struct intel_engine_cs, *(e__));			\
>+	GEM_TRACE("%s %s: " fmt, 					\
>+		  dev_name((e__)->i915->drm.dev),			\
>+		  (e__)->name,						\
>+		  ##__VA_ARGS__);					\
>+} while (0)

yeah, looks better. For this version:

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>

Lucas De Marchi

>+
> /*
>  * The register defines to be used with the following macros need to accept a
>  * base param, e.g:
>diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
>index 49473c25916c..3d1d48bf90cf 100644
>--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
>+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
>@@ -912,7 +912,7 @@ int intel_engine_stop_cs(struct intel_engine_cs *engine)
> 	if (INTEL_GEN(engine->i915) < 3)
> 		return -ENODEV;
>
>-	GEM_TRACE("%s\n", engine->name);
>+	ENGINE_TRACE(engine, "\n");
>
> 	intel_uncore_write_fw(uncore, mode, _MASKED_BIT_ENABLE(STOP_RING));
>
>@@ -921,7 +921,7 @@ int intel_engine_stop_cs(struct intel_engine_cs *engine)
> 					 mode, MODE_IDLE, MODE_IDLE,
> 					 1000, stop_timeout(engine),
> 					 NULL)) {
>-		GEM_TRACE("%s: timed out on STOP_RING -> IDLE\n", engine->name);
>+		ENGINE_TRACE(engine, "timed out on STOP_RING -> IDLE\n");
> 		err = -ETIMEDOUT;
> 	}
>
>@@ -933,7 +933,7 @@ int intel_engine_stop_cs(struct intel_engine_cs *engine)
>
> void intel_engine_cancel_stop_cs(struct intel_engine_cs *engine)
> {
>-	GEM_TRACE("%s\n", engine->name);
>+	ENGINE_TRACE(engine, "\n");
>
> 	ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING));
> }
>diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
>index 889eb37e386a..bcbda8e52d41 100644
>--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
>+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
>@@ -21,7 +21,7 @@ static int __engine_unpark(struct intel_wakeref *wf)
> 		container_of(wf, typeof(*engine), wakeref);
> 	void *map;
>
>-	GEM_TRACE("%s\n", engine->name);
>+	ENGINE_TRACE(engine, "\n");
>
> 	intel_gt_pm_get(engine->gt);
>
>@@ -80,7 +80,7 @@ __queue_and_release_pm(struct i915_request *rq,
> {
> 	struct intel_gt_timelines *timelines = &engine->gt->timelines;
>
>-	GEM_TRACE("%s\n", engine->name);
>+	ENGINE_TRACE(engine, "\n");
>
> 	/*
> 	 * We have to serialise all potential retirement paths with our
>@@ -204,7 +204,7 @@ static int __engine_park(struct intel_wakeref *wf)
> 	if (!switch_to_kernel_context(engine))
> 		return -EBUSY;
>
>-	GEM_TRACE("%s\n", engine->name);
>+	ENGINE_TRACE(engine, "\n");
>
> 	call_idle_barriers(engine); /* cleanup after wedging */
>
>diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
>index 929f6bae4eba..e402b3b28150 100644
>--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
>+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
>@@ -1069,8 +1069,8 @@ static void reset_active(struct i915_request *rq,
> 	 * remain correctly ordered. And we defer to __i915_request_submit()
> 	 * so that all asynchronous waits are correctly handled.
> 	 */
>-	GEM_TRACE("%s(%s): { rq=%llx:%lld }\n",
>-		  __func__, engine->name, rq->fence.context, rq->fence.seqno);
>+	ENGINE_TRACE(engine, "{ rq=%llx:%lld }\n",
>+		     rq->fence.context, rq->fence.seqno);
>
> 	/* On resubmission of the active request, payload will be scrubbed */
> 	if (i915_request_completed(rq))
>@@ -1274,15 +1274,14 @@ trace_ports(const struct intel_engine_execlists *execlists,
> 	if (!ports[0])
> 		return;
>
>-	GEM_TRACE("%s: %s { %llx:%lld%s, %llx:%lld }\n",
>-		  engine->name, msg,
>-		  ports[0]->fence.context,
>-		  ports[0]->fence.seqno,
>-		  i915_request_completed(ports[0]) ? "!" :
>-		  i915_request_started(ports[0]) ? "*" :
>-		  "",
>-		  ports[1] ? ports[1]->fence.context : 0,
>-		  ports[1] ? ports[1]->fence.seqno : 0);
>+	ENGINE_TRACE(engine, "%s { %llx:%lld%s, %llx:%lld }\n", msg,
>+		     ports[0]->fence.context,
>+		     ports[0]->fence.seqno,
>+		     i915_request_completed(ports[0]) ? "!" :
>+		     i915_request_started(ports[0]) ? "*" :
>+		     "",
>+		     ports[1] ? ports[1]->fence.context : 0,
>+		     ports[1] ? ports[1]->fence.seqno : 0);
> }
>
> static __maybe_unused bool
>@@ -1700,12 +1699,11 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
> 	last = last_active(execlists);
> 	if (last) {
> 		if (need_preempt(engine, last, rb)) {
>-			GEM_TRACE("%s: preempting last=%llx:%lld, prio=%d, hint=%d\n",
>-				  engine->name,
>-				  last->fence.context,
>-				  last->fence.seqno,
>-				  last->sched.attr.priority,
>-				  execlists->queue_priority_hint);
>+			ENGINE_TRACE(engine, "preempting last=%llx:%lld, prio=%d, hint=%d\n",
>+				     last->fence.context,
>+				     last->fence.seqno,
>+				     last->sched.attr.priority,
>+				     execlists->queue_priority_hint);
> 			record_preemption(execlists);
>
> 			/*
>@@ -1735,12 +1733,12 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
> 			last = NULL;
> 		} else if (need_timeslice(engine, last) &&
> 			   timer_expired(&engine->execlists.timer)) {
>-			GEM_TRACE("%s: expired last=%llx:%lld, prio=%d, hint=%d\n",
>-				  engine->name,
>-				  last->fence.context,
>-				  last->fence.seqno,
>-				  last->sched.attr.priority,
>-				  execlists->queue_priority_hint);
>+			ENGINE_TRACE(engine,
>+				     "expired last=%llx:%lld, prio=%d, hint=%d\n",
>+				     last->fence.context,
>+				     last->fence.seqno,
>+				     last->sched.attr.priority,
>+				     execlists->queue_priority_hint);
>
> 			ring_set_paused(engine, 1);
> 			defer_active(engine);
>@@ -1817,14 +1815,13 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
> 				return; /* leave this for another */
> 			}
>
>-			GEM_TRACE("%s: virtual rq=%llx:%lld%s, new engine? %s\n",
>-				  engine->name,
>-				  rq->fence.context,
>-				  rq->fence.seqno,
>-				  i915_request_completed(rq) ? "!" :
>-				  i915_request_started(rq) ? "*" :
>-				  "",
>-				  yesno(engine != ve->siblings[0]));
>+			ENGINE_TRACE(engine, "virtual rq=%llx:%lld%s, new engine? %s\n",
>+				     rq->fence.context,
>+				     rq->fence.seqno,
>+				     i915_request_completed(rq) ? "!" :
>+				     i915_request_started(rq) ? "*" :
>+				     "",
>+				     yesno(engine != ve->siblings[0]));
>
> 			ve->request = NULL;
> 			ve->base.execlists.queue_priority_hint = INT_MIN;
>@@ -1980,9 +1977,6 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
> 	 * interrupt for secondary ports).
> 	 */
> 	execlists->queue_priority_hint = queue_prio(execlists);
>-	GEM_TRACE("%s: queue_priority_hint:%d, submit:%s\n",
>-		  engine->name, execlists->queue_priority_hint,
>-		  yesno(submit));
>
> 	if (submit) {
> 		*port = execlists_schedule_in(last, port - execlists->pending);
>@@ -2131,7 +2125,7 @@ static void process_csb(struct intel_engine_cs *engine)
> 	 */
> 	head = execlists->csb_head;
> 	tail = READ_ONCE(*execlists->csb_write);
>-	GEM_TRACE("%s cs-irq head=%d, tail=%d\n", engine->name, head, tail);
>+	ENGINE_TRACE(engine, "cs-irq head=%d, tail=%d\n", head, tail);
> 	if (unlikely(head == tail))
> 		return;
>
>@@ -2169,9 +2163,8 @@ static void process_csb(struct intel_engine_cs *engine)
> 		 * status notifier.
> 		 */
>
>-		GEM_TRACE("%s csb[%d]: status=0x%08x:0x%08x\n",
>-			  engine->name, head,
>-			  buf[2 * head + 0], buf[2 * head + 1]);
>+		ENGINE_TRACE(engine, "csb[%d]: status=0x%08x:0x%08x\n",
>+			     head, buf[2 * head + 0], buf[2 * head + 1]);
>
> 		if (INTEL_GEN(engine->i915) >= 12)
> 			promote = gen12_csb_parse(execlists, buf + 2 * head);
>@@ -2262,10 +2255,9 @@ static noinline void preempt_reset(struct intel_engine_cs *engine)
> 	/* Mark this tasklet as disabled to avoid waiting for it to complete */
> 	tasklet_disable_nosync(&engine->execlists.tasklet);
>
>-	GEM_TRACE("%s: preempt timeout %lu+%ums\n",
>-		  engine->name,
>-		  READ_ONCE(engine->props.preempt_timeout_ms),
>-		  jiffies_to_msecs(jiffies - engine->execlists.preempt.expires));
>+	ENGINE_TRACE(engine, "preempt timeout %lu+%ums\n",
>+		     READ_ONCE(engine->props.preempt_timeout_ms),
>+		     jiffies_to_msecs(jiffies - engine->execlists.preempt.expires));
> 	intel_engine_reset(engine, "preemption time out");
>
> 	tasklet_enable(&engine->execlists.tasklet);
>@@ -2971,8 +2963,8 @@ static void execlists_reset_prepare(struct intel_engine_cs *engine)
> 	struct intel_engine_execlists * const execlists = &engine->execlists;
> 	unsigned long flags;
>
>-	GEM_TRACE("%s: depth<-%d\n", engine->name,
>-		  atomic_read(&execlists->tasklet.count));
>+	ENGINE_TRACE(engine, "depth<-%d\n",
>+		     atomic_read(&execlists->tasklet.count));
>
> 	/*
> 	 * Prevent request submission to the hardware until we have
>@@ -3134,8 +3126,8 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
> 	restore_default_state(ce, engine);
>
> out_replay:
>-	GEM_TRACE("%s replay {head:%04x, tail:%04x}\n",
>-		  engine->name, ce->ring->head, ce->ring->tail);
>+	ENGINE_TRACE(engine, "replay {head:%04x, tail:%04x}\n",
>+		     ce->ring->head, ce->ring->tail);
> 	intel_ring_update_space(ce->ring);
> 	__execlists_reset_reg_state(ce, engine);
> 	__execlists_update_reg_state(ce, engine);
>@@ -3151,7 +3143,7 @@ static void execlists_reset(struct intel_engine_cs *engine, bool stalled)
> {
> 	unsigned long flags;
>
>-	GEM_TRACE("%s\n", engine->name);
>+	ENGINE_TRACE(engine, "\n");
>
> 	spin_lock_irqsave(&engine->active.lock, flags);
>
>@@ -3172,7 +3164,7 @@ static void execlists_cancel_requests(struct intel_engine_cs *engine)
> 	struct rb_node *rb;
> 	unsigned long flags;
>
>-	GEM_TRACE("%s\n", engine->name);
>+	ENGINE_TRACE(engine, "\n");
>
> 	/*
> 	 * Before we call engine->cancel_requests(), we should have exclusive
>@@ -3259,8 +3251,8 @@ static void execlists_reset_finish(struct intel_engine_cs *engine)
> 	if (__tasklet_enable(&execlists->tasklet))
> 		/* And kick in case we missed a new request submission. */
> 		tasklet_hi_schedule(&execlists->tasklet);
>-	GEM_TRACE("%s: depth->%d\n", engine->name,
>-		  atomic_read(&execlists->tasklet.count));
>+	ENGINE_TRACE(engine, "depth->%d\n",
>+		     atomic_read(&execlists->tasklet.count));
> }
>
> static int gen8_emit_bb_start(struct i915_request *rq,
>@@ -4309,10 +4301,9 @@ static intel_engine_mask_t virtual_submission_mask(struct virtual_engine *ve)
> 		mask = ve->siblings[0]->mask;
> 	}
>
>-	GEM_TRACE("%s: rq=%llx:%lld, mask=%x, prio=%d\n",
>-		  ve->base.name,
>-		  rq->fence.context, rq->fence.seqno,
>-		  mask, ve->base.execlists.queue_priority_hint);
>+	ENGINE_TRACE(&ve->base, "rq=%llx:%lld, mask=%x, prio=%d\n",
>+		     rq->fence.context, rq->fence.seqno,
>+		     mask, ve->base.execlists.queue_priority_hint);
>
> 	return mask;
> }
>@@ -4403,10 +4394,9 @@ static void virtual_submit_request(struct i915_request *rq)
> 	struct i915_request *old;
> 	unsigned long flags;
>
>-	GEM_TRACE("%s: rq=%llx:%lld\n",
>-		  ve->base.name,
>-		  rq->fence.context,
>-		  rq->fence.seqno);
>+	ENGINE_TRACE(&ve->base, "rq=%llx:%lld\n",
>+		     rq->fence.context,
>+		     rq->fence.seqno);
>
> 	GEM_BUG_ON(ve->base.submit_request != virtual_submit_request);
>
>diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
>index 8408cb84e52c..f5b2e7c7e6c8 100644
>--- a/drivers/gpu/drm/i915/gt/intel_reset.c
>+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
>@@ -1089,7 +1089,7 @@ int intel_engine_reset(struct intel_engine_cs *engine, const char *msg)
> 	bool uses_guc = intel_engine_in_guc_submission_mode(engine);
> 	int ret;
>
>-	GEM_TRACE("%s flags=%lx\n", engine->name, gt->reset.flags);
>+	ENGINE_TRACE(engine, "flags=%lx\n", gt->reset.flags);
> 	GEM_BUG_ON(!test_bit(I915_RESET_ENGINE + engine->id, &gt->reset.flags));
>
> 	if (!intel_engine_pm_get_if_awake(engine))
>diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
>index 5c22ca6f998a..32334476cd77 100644
>--- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
>+++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
>@@ -632,8 +632,8 @@ static int xcs_resume(struct intel_engine_cs *engine)
> 	struct intel_ring *ring = engine->legacy.ring;
> 	int ret = 0;
>
>-	GEM_TRACE("%s: ring:{HEAD:%04x, TAIL:%04x}\n",
>-		  engine->name, ring->head, ring->tail);
>+	ENGINE_TRACE(engine, "ring:{HEAD:%04x, TAIL:%04x}\n",
>+		     ring->head, ring->tail);
>
> 	intel_uncore_forcewake_get(engine->uncore, FORCEWAKE_ALL);
>
>@@ -746,10 +746,10 @@ static void reset_prepare(struct intel_engine_cs *engine)
> 	 *
> 	 * FIXME: Wa for more modern gens needs to be validated
> 	 */
>-	GEM_TRACE("%s\n", engine->name);
>+	ENGINE_TRACE(engine, "\n");
>
> 	if (intel_engine_stop_cs(engine))
>-		GEM_TRACE("%s: timed out on STOP_RING\n", engine->name);
>+		ENGINE_TRACE(engine, "timed out on STOP_RING\n");
>
> 	intel_uncore_write_fw(uncore,
> 			      RING_HEAD(base),
>@@ -765,8 +765,7 @@ static void reset_prepare(struct intel_engine_cs *engine)
>
> 	/* Check acts as a post */
> 	if (intel_uncore_read_fw(uncore, RING_HEAD(base)))
>-		GEM_TRACE("%s: ring head [%x] not parked\n",
>-			  engine->name,
>+		ENGINE_TRACE(engine, "ring head [%x] not parked\n",
> 			  intel_uncore_read_fw(uncore, RING_HEAD(base)));
> }
>
>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>index 172220e83079..af04ed6e48d9 100644
>--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>@@ -375,7 +375,7 @@ static void guc_reset_prepare(struct intel_engine_cs *engine)
> {
> 	struct intel_engine_execlists * const execlists = &engine->execlists;
>
>-	GEM_TRACE("%s\n", engine->name);
>+	ENGINE_TRACE(engine, "\n");
>
> 	/*
> 	 * Prevent request submission to the hardware until we have
>@@ -434,7 +434,7 @@ static void guc_cancel_requests(struct intel_engine_cs *engine)
> 	struct rb_node *rb;
> 	unsigned long flags;
>
>-	GEM_TRACE("%s\n", engine->name);
>+	ENGINE_TRACE(engine, "\n");
>
> 	/*
> 	 * Before we call engine->cancel_requests(), we should have exclusive
>@@ -495,8 +495,8 @@ static void guc_reset_finish(struct intel_engine_cs *engine)
> 		/* And kick in case we missed a new request submission. */
> 		tasklet_hi_schedule(&execlists->tasklet);
>
>-	GEM_TRACE("%s: depth->%d\n", engine->name,
>-		  atomic_read(&execlists->tasklet.count));
>+	ENGINE_TRACE(engine, "depth->%d\n",
>+		     atomic_read(&execlists->tasklet.count));
> }
>
> /*
>-- 
>2.24.0
>
>---------------------------------------------------------------------
>Intel Corporation (UK) Limited
>Registered No. 1134945 (England)
>Registered Office: Pipers Way, Swindon SN3 1RJ
>VAT No: 860 2173 47
>
>This e-mail and any attachments may contain confidential material for
>the sole use of the intended recipient(s). Any review or distribution
>by others is strictly prohibited. If you are not the intended
>recipient, please contact the sender and delete all copies.
>_______________________________________________
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_______________________________________________
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^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [Intel-gfx] [PATCH 1/2] drm/i915/perf: Register sysctl path globally
  2019-12-12  7:35 [Intel-gfx] [PATCH 1/2] drm/i915/perf: Register sysctl path globally Venkata Sandeep Dhanalakota
                   ` (3 preceding siblings ...)
  2019-12-12 20:40 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2019-12-12 21:34 ` Lucas De Marchi
  2019-12-13  5:07   ` Venkata Sandeep Dhanalakota
  4 siblings, 1 reply; 9+ messages in thread
From: Lucas De Marchi @ 2019-12-12 21:34 UTC (permalink / raw
  To: Venkata Sandeep Dhanalakota; +Cc: intel-gfx, chris.p.wilson

On Wed, Dec 11, 2019 at 11:35:21PM -0800, Venkata Sandeep Dhanalakota wrote:
>We do not require to register the sysctl paths per instance,
>so making registration global.
>
>v2: make sysctl path register and unregister function driver
>    specific (Tvrtko and Lucas).
>
>Cc: Sudeep Dutt <sudeep.dutt@intel.com>
>Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
>Cc: Chris Wilson <chris@chris-wilson.co.uk>
>Cc: Jani Nikula <jani.nikula@intel.com>
>Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
>---
> drivers/gpu/drm/i915/i915_pci.c        |  6 ++++++
> drivers/gpu/drm/i915/i915_perf.c       | 19 ++++++++++++++++---
> drivers/gpu/drm/i915/i915_perf.h       |  2 ++
> drivers/gpu/drm/i915/i915_perf_types.h |  1 -
> 4 files changed, 24 insertions(+), 4 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
>index bba6b50e6beb..c5a2bb5e87fe 100644
>--- a/drivers/gpu/drm/i915/i915_pci.c
>+++ b/drivers/gpu/drm/i915/i915_pci.c
>@@ -30,6 +30,7 @@
> #include "display/intel_fbdev.h"
>
> #include "i915_drv.h"
>+#include "i915_perf.h"
> #include "i915_globals.h"
> #include "i915_selftest.h"
>
>@@ -1051,6 +1052,10 @@ static int __init i915_init(void)
> 		return 0;
> 	}
>
>+	err = i915_perf_sysctl_register();
>+	if (err)
>+		return err;
>+
> 	return pci_register_driver(&i915_pci_driver);
> }
>
>@@ -1059,6 +1064,7 @@ static void __exit i915_exit(void)
> 	if (!i915_pci_driver.driver.owner)
> 		return;
>
>+	i915_perf_sysctl_unregister();

honoring  the init order means to unregister this after
pci_unregister_driver()

> 	pci_unregister_driver(&i915_pci_driver);
> 	i915_globals_exit();
> }
>diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
>index 8d2e37949f46..f039beed1771 100644
>--- a/drivers/gpu/drm/i915/i915_perf.c
>+++ b/drivers/gpu/drm/i915/i915_perf.c
>@@ -387,6 +387,8 @@ struct i915_oa_config_bo {
> 	struct i915_vma *vma;
> };
>
>+static struct ctl_table_header *sysctl_header;
>+
> static enum hrtimer_restart oa_poll_check_timer_cb(struct hrtimer *hrtimer);
>
> void i915_oa_config_release(struct kref *ref)
>@@ -4345,7 +4347,6 @@ void i915_perf_init(struct drm_i915_private *i915)
>
> 		oa_sample_rate_hard_limit = 1000 *
> 			(RUNTIME_INFO(i915)->cs_timestamp_frequency_khz / 2);
>-		perf->sysctl_header = register_sysctl_table(dev_root);

doc for this function also needs an update with
s/module load/module bind/

>
> 		mutex_init(&perf->metrics_lock);
> 		idr_init(&perf->metrics_idr);
>@@ -4381,6 +4382,20 @@ static int destroy_config(int id, void *p, void *data)
> 	return 0;
> }
>
>+int i915_perf_sysctl_register(void)
>+{
>+	sysctl_header = register_sysctl_table(dev_root);
>+	if (!sysctl_header)
>+		return -ENOMEM;

Not sure about this return code here. grepping other drivers, this seems
to be common, but checking register_sysctl_table() it can actually fail
for other reasons.

The previous behavior was to ignore it and not fail the entire thing...
just living without this sysctl. I'd say to keep that behavior.

Lucas De Marchi

>+
>+	return 0;
>+}
>+
>+void i915_perf_sysctl_unregister(void)
>+{
>+	unregister_sysctl_table(sysctl_header);
>+}
>+
> /**
>  * i915_perf_fini - Counter part to i915_perf_init()
>  * @i915: i915 device instance
>@@ -4395,8 +4410,6 @@ void i915_perf_fini(struct drm_i915_private *i915)
> 	idr_for_each(&perf->metrics_idr, destroy_config, perf);
> 	idr_destroy(&perf->metrics_idr);
>
>-	unregister_sysctl_table(perf->sysctl_header);
>-
> 	memset(&perf->ops, 0, sizeof(perf->ops));
> 	perf->i915 = NULL;
> }
>diff --git a/drivers/gpu/drm/i915/i915_perf.h b/drivers/gpu/drm/i915/i915_perf.h
>index 4ceebce72060..1d1329e5af3a 100644
>--- a/drivers/gpu/drm/i915/i915_perf.h
>+++ b/drivers/gpu/drm/i915/i915_perf.h
>@@ -23,6 +23,8 @@ void i915_perf_fini(struct drm_i915_private *i915);
> void i915_perf_register(struct drm_i915_private *i915);
> void i915_perf_unregister(struct drm_i915_private *i915);
> int i915_perf_ioctl_version(void);
>+int i915_perf_sysctl_register(void);
>+void i915_perf_sysctl_unregister(void);
>
> int i915_perf_open_ioctl(struct drm_device *dev, void *data,
> 			 struct drm_file *file);
>diff --git a/drivers/gpu/drm/i915/i915_perf_types.h b/drivers/gpu/drm/i915/i915_perf_types.h
>index 74ddc20a0d37..45e581455f5d 100644
>--- a/drivers/gpu/drm/i915/i915_perf_types.h
>+++ b/drivers/gpu/drm/i915/i915_perf_types.h
>@@ -380,7 +380,6 @@ struct i915_perf {
> 	struct drm_i915_private *i915;
>
> 	struct kobject *metrics_kobj;
>-	struct ctl_table_header *sysctl_header;
>
> 	/*
> 	 * Lock associated with adding/modifying/removing OA configs
>-- 
>2.21.0.5.gaeb582a983
>
>_______________________________________________
>Intel-gfx mailing list
>Intel-gfx@lists.freedesktop.org
>https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [Intel-gfx] [PATCH 1/2] drm/i915/perf: Register sysctl path globally
  2019-12-12 21:34 ` [Intel-gfx] [PATCH 1/2] drm/i915/perf: Register sysctl path globally Lucas De Marchi
@ 2019-12-13  5:07   ` Venkata Sandeep Dhanalakota
  0 siblings, 0 replies; 9+ messages in thread
From: Venkata Sandeep Dhanalakota @ 2019-12-13  5:07 UTC (permalink / raw
  To: Lucas De Marchi; +Cc: intel-gfx, chris.p.wilson

On 19/12/12 01:34, Lucas De Marchi wrote:
> On Wed, Dec 11, 2019 at 11:35:21PM -0800, Venkata Sandeep Dhanalakota wrote:
> > We do not require to register the sysctl paths per instance,
> > so making registration global.
> > 
> > v2: make sysctl path register and unregister function driver
> >    specific (Tvrtko and Lucas).
> > 
> > Cc: Sudeep Dutt <sudeep.dutt@intel.com>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_pci.c        |  6 ++++++
> > drivers/gpu/drm/i915/i915_perf.c       | 19 ++++++++++++++++---
> > drivers/gpu/drm/i915/i915_perf.h       |  2 ++
> > drivers/gpu/drm/i915/i915_perf_types.h |  1 -
> > 4 files changed, 24 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > index bba6b50e6beb..c5a2bb5e87fe 100644
> > --- a/drivers/gpu/drm/i915/i915_pci.c
> > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > @@ -30,6 +30,7 @@
> > #include "display/intel_fbdev.h"
> > 
> > #include "i915_drv.h"
> > +#include "i915_perf.h"
> > #include "i915_globals.h"
> > #include "i915_selftest.h"
> > 
> > @@ -1051,6 +1052,10 @@ static int __init i915_init(void)
> > 		return 0;
> > 	}
> > 
> > +	err = i915_perf_sysctl_register();
> > +	if (err)
> > +		return err;
> > +
> > 	return pci_register_driver(&i915_pci_driver);
> > }
> > 
> > @@ -1059,6 +1064,7 @@ static void __exit i915_exit(void)
> > 	if (!i915_pci_driver.driver.owner)
> > 		return;
> > 
> > +	i915_perf_sysctl_unregister();
> 
> honoring  the init order means to unregister this after
> pci_unregister_driver()
I think we should reverse the init order, because if we cannot
register pci driver successfully then we dont need to register
sysctl table.

> 
> > 	pci_unregister_driver(&i915_pci_driver);
> > 	i915_globals_exit();
> > }
> > diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> > index 8d2e37949f46..f039beed1771 100644
> > --- a/drivers/gpu/drm/i915/i915_perf.c
> > +++ b/drivers/gpu/drm/i915/i915_perf.c
> > @@ -387,6 +387,8 @@ struct i915_oa_config_bo {
> > 	struct i915_vma *vma;
> > };
> > 
> > +static struct ctl_table_header *sysctl_header;
> > +
> > static enum hrtimer_restart oa_poll_check_timer_cb(struct hrtimer *hrtimer);
> > 
> > void i915_oa_config_release(struct kref *ref)
> > @@ -4345,7 +4347,6 @@ void i915_perf_init(struct drm_i915_private *i915)
> > 
> > 		oa_sample_rate_hard_limit = 1000 *
> > 			(RUNTIME_INFO(i915)->cs_timestamp_frequency_khz / 2);
> > -		perf->sysctl_header = register_sysctl_table(dev_root);
> 
> doc for this function also needs an update with
> s/module load/module bind/
sure.
> 
> > 
> > 		mutex_init(&perf->metrics_lock);
> > 		idr_init(&perf->metrics_idr);
> > @@ -4381,6 +4382,20 @@ static int destroy_config(int id, void *p, void *data)
> > 	return 0;
> > }
> > 
> > +int i915_perf_sysctl_register(void)
> > +{
> > +	sysctl_header = register_sysctl_table(dev_root);
> > +	if (!sysctl_header)
> > +		return -ENOMEM;
> 
> Not sure about this return code here. grepping other drivers, this seems
> to be common, but checking register_sysctl_table() it can actually fail
> for other reasons.
> 
> The previous behavior was to ignore it and not fail the entire thing...
> just living without this sysctl. I'd say to keep that behavior.
> 
Sure, we could ignore the return code for now.
> Lucas De Marchi
> 
> > +
> > +	return 0;
> > +}
> > +
> > +void i915_perf_sysctl_unregister(void)
> > +{
> > +	unregister_sysctl_table(sysctl_header);
> > +}
> > +
> > /**
> >  * i915_perf_fini - Counter part to i915_perf_init()
> >  * @i915: i915 device instance
> > @@ -4395,8 +4410,6 @@ void i915_perf_fini(struct drm_i915_private *i915)
> > 	idr_for_each(&perf->metrics_idr, destroy_config, perf);
> > 	idr_destroy(&perf->metrics_idr);
> > 
> > -	unregister_sysctl_table(perf->sysctl_header);
> > -
> > 	memset(&perf->ops, 0, sizeof(perf->ops));
> > 	perf->i915 = NULL;
> > }
> > diff --git a/drivers/gpu/drm/i915/i915_perf.h b/drivers/gpu/drm/i915/i915_perf.h
> > index 4ceebce72060..1d1329e5af3a 100644
> > --- a/drivers/gpu/drm/i915/i915_perf.h
> > +++ b/drivers/gpu/drm/i915/i915_perf.h
> > @@ -23,6 +23,8 @@ void i915_perf_fini(struct drm_i915_private *i915);
> > void i915_perf_register(struct drm_i915_private *i915);
> > void i915_perf_unregister(struct drm_i915_private *i915);
> > int i915_perf_ioctl_version(void);
> > +int i915_perf_sysctl_register(void);
> > +void i915_perf_sysctl_unregister(void);
> > 
> > int i915_perf_open_ioctl(struct drm_device *dev, void *data,
> > 			 struct drm_file *file);
> > diff --git a/drivers/gpu/drm/i915/i915_perf_types.h b/drivers/gpu/drm/i915/i915_perf_types.h
> > index 74ddc20a0d37..45e581455f5d 100644
> > --- a/drivers/gpu/drm/i915/i915_perf_types.h
> > +++ b/drivers/gpu/drm/i915/i915_perf_types.h
> > @@ -380,7 +380,6 @@ struct i915_perf {
> > 	struct drm_i915_private *i915;
> > 
> > 	struct kobject *metrics_kobj;
> > -	struct ctl_table_header *sysctl_header;
> > 
> > 	/*
> > 	 * Lock associated with adding/modifying/removing OA configs
> > -- 
> > 2.21.0.5.gaeb582a983
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2019-12-13  5:07 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-12-12  7:35 [Intel-gfx] [PATCH 1/2] drm/i915/perf: Register sysctl path globally Venkata Sandeep Dhanalakota
2019-12-12  7:35 ` [Intel-gfx] [PATCH 2/2] drm/i915: Tag GEM_TRACE with device name Venkata Sandeep Dhanalakota
2019-12-12  8:30   ` Chris Wilson
2019-12-12 21:14     ` Lucas De Marchi
2019-12-12  9:37 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/perf: Register sysctl path globally (rev2) Patchwork
2019-12-12 10:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2019-12-12 20:40 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2019-12-12 21:34 ` [Intel-gfx] [PATCH 1/2] drm/i915/perf: Register sysctl path globally Lucas De Marchi
2019-12-13  5:07   ` Venkata Sandeep Dhanalakota

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