* [PATCHi v3] drm/mediatek: adjust rdma fifo threshold calculate formula
@ 2021-07-11 6:53 ` Yongqiang Niu
0 siblings, 0 replies; 12+ messages in thread
From: Yongqiang Niu @ 2021-07-11 6:53 UTC (permalink / raw
To: Chun-Kuang Hu
Cc: Rob Herring, Matthias Brugger, Philipp Zabel, David Airlie,
Daniel Vetter, Jassi Brar, Yongqiang Niu, Fabien Parent,
Dennis YC Hsieh, devicetree, linux-arm-kernel, linux-mediatek,
linux-kernel, dri-devel, Project_Global_Chrome_Upstream_Group,
Hsin-Yi Wang
Change since v2:
- add more commit message
Yongqiang Niu (1):
drm/mediatek: adjust rdma fifo threshold calculate formula
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--
1.8.1.1.dirty
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCHi v3] drm/mediatek: adjust rdma fifo threshold calculate formula
@ 2021-07-11 6:53 ` Yongqiang Niu
0 siblings, 0 replies; 12+ messages in thread
From: Yongqiang Niu @ 2021-07-11 6:53 UTC (permalink / raw
To: Chun-Kuang Hu
Cc: devicetree, Project_Global_Chrome_Upstream_Group, David Airlie,
Jassi Brar, linux-kernel, dri-devel, Yongqiang Niu,
Dennis YC Hsieh, Fabien Parent, Rob Herring, linux-mediatek,
Hsin-Yi Wang, Matthias Brugger, linux-arm-kernel
Change since v2:
- add more commit message
Yongqiang Niu (1):
drm/mediatek: adjust rdma fifo threshold calculate formula
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--
1.8.1.1.dirty
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCHi v3] drm/mediatek: adjust rdma fifo threshold calculate formula
@ 2021-07-11 6:53 ` Yongqiang Niu
0 siblings, 0 replies; 12+ messages in thread
From: Yongqiang Niu @ 2021-07-11 6:53 UTC (permalink / raw
To: Chun-Kuang Hu
Cc: Rob Herring, Matthias Brugger, Philipp Zabel, David Airlie,
Daniel Vetter, Jassi Brar, Yongqiang Niu, Fabien Parent,
Dennis YC Hsieh, devicetree, linux-arm-kernel, linux-mediatek,
linux-kernel, dri-devel, Project_Global_Chrome_Upstream_Group,
Hsin-Yi Wang
Change since v2:
- add more commit message
Yongqiang Niu (1):
drm/mediatek: adjust rdma fifo threshold calculate formula
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--
1.8.1.1.dirty
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCHi v3] drm/mediatek: adjust rdma fifo threshold calculate formula
@ 2021-07-11 6:53 ` Yongqiang Niu
0 siblings, 0 replies; 12+ messages in thread
From: Yongqiang Niu @ 2021-07-11 6:53 UTC (permalink / raw
To: Chun-Kuang Hu
Cc: Rob Herring, Matthias Brugger, Philipp Zabel, David Airlie,
Daniel Vetter, Jassi Brar, Yongqiang Niu, Fabien Parent,
Dennis YC Hsieh, devicetree, linux-arm-kernel, linux-mediatek,
linux-kernel, dri-devel, Project_Global_Chrome_Upstream_Group,
Hsin-Yi Wang
Change since v2:
- add more commit message
Yongqiang Niu (1):
drm/mediatek: adjust rdma fifo threshold calculate formula
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--
1.8.1.1.dirty
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3] drm/mediatek: adjust rdma fifo threshold calculate formula
2021-07-11 6:53 ` Yongqiang Niu
(?)
(?)
@ 2021-07-11 6:53 ` Yongqiang Niu
-1 siblings, 0 replies; 12+ messages in thread
From: Yongqiang Niu @ 2021-07-11 6:53 UTC (permalink / raw
To: Chun-Kuang Hu
Cc: Rob Herring, Matthias Brugger, Philipp Zabel, David Airlie,
Daniel Vetter, Jassi Brar, Yongqiang Niu, Fabien Parent,
Dennis YC Hsieh, devicetree, linux-arm-kernel, linux-mediatek,
linux-kernel, dri-devel, Project_Global_Chrome_Upstream_Group,
Hsin-Yi Wang
the orginal formula will caused rdma fifo threshold config overflow
and no one could come out a solution for all SoC,
set threshold to 70% of max fifo size to make sure it will
not overflow, and 70% is a empirical vlaue
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
index f123fc0..f1f6a2e 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
@@ -164,10 +164,10 @@ void mtk_rdma_config(struct device *dev, unsigned int width,
/*
* Enable FIFO underflow since DSI and DPI can't be blocked.
* Keep the FIFO pseudo size reset default of 8 KiB. Set the
- * output threshold to 6 microseconds with 7/6 overhead to
- * account for blanking, and with a pixel depth of 4 bytes:
+ * output threshold to 70% of max fifo size to make sure the
+ * threhold will not overflow
*/
- threshold = width * height * vrefresh * 4 * 7 / 1000000;
+ threshold = rdma_fifo_size * 7 / 10;
reg = RDMA_FIFO_UNDERFLOW_EN |
RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
--
1.8.1.1.dirty
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3] drm/mediatek: adjust rdma fifo threshold calculate formula
@ 2021-07-11 6:53 ` Yongqiang Niu
0 siblings, 0 replies; 12+ messages in thread
From: Yongqiang Niu @ 2021-07-11 6:53 UTC (permalink / raw
To: Chun-Kuang Hu
Cc: devicetree, Project_Global_Chrome_Upstream_Group, David Airlie,
Jassi Brar, linux-kernel, dri-devel, Yongqiang Niu,
Dennis YC Hsieh, Fabien Parent, Rob Herring, linux-mediatek,
Hsin-Yi Wang, Matthias Brugger, linux-arm-kernel
the orginal formula will caused rdma fifo threshold config overflow
and no one could come out a solution for all SoC,
set threshold to 70% of max fifo size to make sure it will
not overflow, and 70% is a empirical vlaue
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
index f123fc0..f1f6a2e 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
@@ -164,10 +164,10 @@ void mtk_rdma_config(struct device *dev, unsigned int width,
/*
* Enable FIFO underflow since DSI and DPI can't be blocked.
* Keep the FIFO pseudo size reset default of 8 KiB. Set the
- * output threshold to 6 microseconds with 7/6 overhead to
- * account for blanking, and with a pixel depth of 4 bytes:
+ * output threshold to 70% of max fifo size to make sure the
+ * threhold will not overflow
*/
- threshold = width * height * vrefresh * 4 * 7 / 1000000;
+ threshold = rdma_fifo_size * 7 / 10;
reg = RDMA_FIFO_UNDERFLOW_EN |
RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
--
1.8.1.1.dirty
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3] drm/mediatek: adjust rdma fifo threshold calculate formula
@ 2021-07-11 6:53 ` Yongqiang Niu
0 siblings, 0 replies; 12+ messages in thread
From: Yongqiang Niu @ 2021-07-11 6:53 UTC (permalink / raw
To: Chun-Kuang Hu
Cc: Rob Herring, Matthias Brugger, Philipp Zabel, David Airlie,
Daniel Vetter, Jassi Brar, Yongqiang Niu, Fabien Parent,
Dennis YC Hsieh, devicetree, linux-arm-kernel, linux-mediatek,
linux-kernel, dri-devel, Project_Global_Chrome_Upstream_Group,
Hsin-Yi Wang
the orginal formula will caused rdma fifo threshold config overflow
and no one could come out a solution for all SoC,
set threshold to 70% of max fifo size to make sure it will
not overflow, and 70% is a empirical vlaue
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
index f123fc0..f1f6a2e 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
@@ -164,10 +164,10 @@ void mtk_rdma_config(struct device *dev, unsigned int width,
/*
* Enable FIFO underflow since DSI and DPI can't be blocked.
* Keep the FIFO pseudo size reset default of 8 KiB. Set the
- * output threshold to 6 microseconds with 7/6 overhead to
- * account for blanking, and with a pixel depth of 4 bytes:
+ * output threshold to 70% of max fifo size to make sure the
+ * threhold will not overflow
*/
- threshold = width * height * vrefresh * 4 * 7 / 1000000;
+ threshold = rdma_fifo_size * 7 / 10;
reg = RDMA_FIFO_UNDERFLOW_EN |
RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
--
1.8.1.1.dirty
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3] drm/mediatek: adjust rdma fifo threshold calculate formula
@ 2021-07-11 6:53 ` Yongqiang Niu
0 siblings, 0 replies; 12+ messages in thread
From: Yongqiang Niu @ 2021-07-11 6:53 UTC (permalink / raw
To: Chun-Kuang Hu
Cc: Rob Herring, Matthias Brugger, Philipp Zabel, David Airlie,
Daniel Vetter, Jassi Brar, Yongqiang Niu, Fabien Parent,
Dennis YC Hsieh, devicetree, linux-arm-kernel, linux-mediatek,
linux-kernel, dri-devel, Project_Global_Chrome_Upstream_Group,
Hsin-Yi Wang
the orginal formula will caused rdma fifo threshold config overflow
and no one could come out a solution for all SoC,
set threshold to 70% of max fifo size to make sure it will
not overflow, and 70% is a empirical vlaue
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
index f123fc0..f1f6a2e 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
@@ -164,10 +164,10 @@ void mtk_rdma_config(struct device *dev, unsigned int width,
/*
* Enable FIFO underflow since DSI and DPI can't be blocked.
* Keep the FIFO pseudo size reset default of 8 KiB. Set the
- * output threshold to 6 microseconds with 7/6 overhead to
- * account for blanking, and with a pixel depth of 4 bytes:
+ * output threshold to 70% of max fifo size to make sure the
+ * threhold will not overflow
*/
- threshold = width * height * vrefresh * 4 * 7 / 1000000;
+ threshold = rdma_fifo_size * 7 / 10;
reg = RDMA_FIFO_UNDERFLOW_EN |
RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
--
1.8.1.1.dirty
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v3] drm/mediatek: adjust rdma fifo threshold calculate formula
2021-07-11 6:53 ` Yongqiang Niu
(?)
(?)
@ 2021-07-12 14:47 ` Chun-Kuang Hu
-1 siblings, 0 replies; 12+ messages in thread
From: Chun-Kuang Hu @ 2021-07-12 14:47 UTC (permalink / raw
To: Yongqiang Niu
Cc: Chun-Kuang Hu, Project_Global_Chrome_Upstream_Group, DTML,
David Airlie, Jassi Brar, linux-kernel, DRI Development,
Dennis YC Hsieh, Fabien Parent, Rob Herring,
moderated list:ARM/Mediatek SoC support, Hsin-Yi Wang,
Matthias Brugger, Linux ARM
Hi, Yongqiang:
Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2021年7月11日 週日 下午2:54寫道：
>
> the orginal formula will caused rdma fifo threshold config overflow
> and no one could come out a solution for all SoC,
> set threshold to 70% of max fifo size to make sure it will
> not overflow, and 70% is a empirical value
Applied to mediatek-drm-next [1], thanks.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> index f123fc0..f1f6a2e 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> @@ -164,10 +164,10 @@ void mtk_rdma_config(struct device *dev, unsigned int width,
> /*
> * Enable FIFO underflow since DSI and DPI can't be blocked.
> * Keep the FIFO pseudo size reset default of 8 KiB. Set the
> - * output threshold to 6 microseconds with 7/6 overhead to
> - * account for blanking, and with a pixel depth of 4 bytes:
> + * output threshold to 70% of max fifo size to make sure the
> + * threhold will not overflow
> */
> - threshold = width * height * vrefresh * 4 * 7 / 1000000;
> + threshold = rdma_fifo_size * 7 / 10;
> reg = RDMA_FIFO_UNDERFLOW_EN |
> RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
> RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
> --
> 1.8.1.1.dirty
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3] drm/mediatek: adjust rdma fifo threshold calculate formula
@ 2021-07-12 14:47 ` Chun-Kuang Hu
0 siblings, 0 replies; 12+ messages in thread
From: Chun-Kuang Hu @ 2021-07-12 14:47 UTC (permalink / raw
To: Yongqiang Niu
Cc: Chun-Kuang Hu, Rob Herring, Matthias Brugger, Philipp Zabel,
David Airlie, Daniel Vetter, Jassi Brar, Fabien Parent,
Dennis YC Hsieh, DTML, Linux ARM,
moderated list:ARM/Mediatek SoC support, linux-kernel,
DRI Development, Project_Global_Chrome_Upstream_Group,
Hsin-Yi Wang
Hi, Yongqiang:
Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2021年7月11日 週日 下午2:54寫道：
>
> the orginal formula will caused rdma fifo threshold config overflow
> and no one could come out a solution for all SoC,
> set threshold to 70% of max fifo size to make sure it will
> not overflow, and 70% is a empirical value
Applied to mediatek-drm-next [1], thanks.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> index f123fc0..f1f6a2e 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> @@ -164,10 +164,10 @@ void mtk_rdma_config(struct device *dev, unsigned int width,
> /*
> * Enable FIFO underflow since DSI and DPI can't be blocked.
> * Keep the FIFO pseudo size reset default of 8 KiB. Set the
> - * output threshold to 6 microseconds with 7/6 overhead to
> - * account for blanking, and with a pixel depth of 4 bytes:
> + * output threshold to 70% of max fifo size to make sure the
> + * threhold will not overflow
> */
> - threshold = width * height * vrefresh * 4 * 7 / 1000000;
> + threshold = rdma_fifo_size * 7 / 10;
> reg = RDMA_FIFO_UNDERFLOW_EN |
> RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
> RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
> --
> 1.8.1.1.dirty
>
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3] drm/mediatek: adjust rdma fifo threshold calculate formula
@ 2021-07-12 14:47 ` Chun-Kuang Hu
0 siblings, 0 replies; 12+ messages in thread
From: Chun-Kuang Hu @ 2021-07-12 14:47 UTC (permalink / raw
To: Yongqiang Niu
Cc: Chun-Kuang Hu, Rob Herring, Matthias Brugger, Philipp Zabel,
David Airlie, Daniel Vetter, Jassi Brar, Fabien Parent,
Dennis YC Hsieh, DTML, Linux ARM,
moderated list:ARM/Mediatek SoC support, linux-kernel,
DRI Development, Project_Global_Chrome_Upstream_Group,
Hsin-Yi Wang
Hi, Yongqiang:
Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2021年7月11日 週日 下午2:54寫道：
>
> the orginal formula will caused rdma fifo threshold config overflow
> and no one could come out a solution for all SoC,
> set threshold to 70% of max fifo size to make sure it will
> not overflow, and 70% is a empirical value
Applied to mediatek-drm-next [1], thanks.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> index f123fc0..f1f6a2e 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> @@ -164,10 +164,10 @@ void mtk_rdma_config(struct device *dev, unsigned int width,
> /*
> * Enable FIFO underflow since DSI and DPI can't be blocked.
> * Keep the FIFO pseudo size reset default of 8 KiB. Set the
> - * output threshold to 6 microseconds with 7/6 overhead to
> - * account for blanking, and with a pixel depth of 4 bytes:
> + * output threshold to 70% of max fifo size to make sure the
> + * threhold will not overflow
> */
> - threshold = width * height * vrefresh * 4 * 7 / 1000000;
> + threshold = rdma_fifo_size * 7 / 10;
> reg = RDMA_FIFO_UNDERFLOW_EN |
> RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
> RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
> --
> 1.8.1.1.dirty
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3] drm/mediatek: adjust rdma fifo threshold calculate formula
@ 2021-07-12 14:47 ` Chun-Kuang Hu
0 siblings, 0 replies; 12+ messages in thread
From: Chun-Kuang Hu @ 2021-07-12 14:47 UTC (permalink / raw
To: Yongqiang Niu
Cc: Chun-Kuang Hu, Rob Herring, Matthias Brugger, Philipp Zabel,
David Airlie, Daniel Vetter, Jassi Brar, Fabien Parent,
Dennis YC Hsieh, DTML, Linux ARM,
moderated list:ARM/Mediatek SoC support, linux-kernel,
DRI Development, Project_Global_Chrome_Upstream_Group,
Hsin-Yi Wang
Hi, Yongqiang:
Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2021年7月11日 週日 下午2:54寫道：
>
> the orginal formula will caused rdma fifo threshold config overflow
> and no one could come out a solution for all SoC,
> set threshold to 70% of max fifo size to make sure it will
> not overflow, and 70% is a empirical value
Applied to mediatek-drm-next [1], thanks.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> index f123fc0..f1f6a2e 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> @@ -164,10 +164,10 @@ void mtk_rdma_config(struct device *dev, unsigned int width,
> /*
> * Enable FIFO underflow since DSI and DPI can't be blocked.
> * Keep the FIFO pseudo size reset default of 8 KiB. Set the
> - * output threshold to 6 microseconds with 7/6 overhead to
> - * account for blanking, and with a pixel depth of 4 bytes:
> + * output threshold to 70% of max fifo size to make sure the
> + * threhold will not overflow
> */
> - threshold = width * height * vrefresh * 4 * 7 / 1000000;
> + threshold = rdma_fifo_size * 7 / 10;
> reg = RDMA_FIFO_UNDERFLOW_EN |
> RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
> RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
> --
> 1.8.1.1.dirty
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2021-07-12 14:49 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2021-07-11 6:53 [PATCHi v3] drm/mediatek: adjust rdma fifo threshold calculate formula Yongqiang Niu
2021-07-11 6:53 ` Yongqiang Niu
2021-07-11 6:53 ` Yongqiang Niu
2021-07-11 6:53 ` Yongqiang Niu
2021-07-11 6:53 ` [PATCH " Yongqiang Niu
2021-07-11 6:53 ` Yongqiang Niu
2021-07-11 6:53 ` Yongqiang Niu
2021-07-11 6:53 ` Yongqiang Niu
2021-07-12 14:47 ` Chun-Kuang Hu
2021-07-12 14:47 ` Chun-Kuang Hu
2021-07-12 14:47 ` Chun-Kuang Hu
2021-07-12 14:47 ` Chun-Kuang Hu
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