From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44148) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z5IUL-0006Hv-Ek for qemu-devel@nongnu.org; Wed, 17 Jun 2015 14:55:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z5IUI-0008V7-NT for qemu-devel@nongnu.org; Wed, 17 Jun 2015 14:55:05 -0400 Received: from mx1.redhat.com ([209.132.183.28]:60730) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z5IUI-0008Ug-IZ for qemu-devel@nongnu.org; Wed, 17 Jun 2015 14:55:02 -0400 Date: Wed, 17 Jun 2015 20:54:58 +0200 From: "Michael S. Tsirkin" Message-ID: <20150617204828-mutt-send-email-mst@redhat.com> References: <1434545105-5811-1-git-send-email-lersek@redhat.com> <1434545105-5811-8-git-send-email-lersek@redhat.com> <20150617155237-mutt-send-email-mst@redhat.com> <20150617141820.GA11337@morn.localdomain> <55818819.3010107@redhat.com> <20150617150544.GA26500@redhat.com> <5581B97E.8020707@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <5581B97E.8020707@redhat.com> Subject: Re: [Qemu-devel] [PATCH v6 7/7] hw/pci-bridge: format SeaBIOS-compliant OFW device node for PXB List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Laszlo Ersek Cc: Marcel Apfelbaum , Kevin O'Connor , qemu-devel@nongnu.org, Markus Armbruster On Wed, Jun 17, 2015 at 08:16:30PM +0200, Laszlo Ersek wrote: > > We do need to agree about the correct paths however, this is host/guest > > interface which we have to maintain forever, and it's important to get > > it right. I kept hoping we can come up with something saner than > > the sequence # but oh well. Do you disagree with the statement > > that seabios path is currently incorrect? Kevin seems to agree. > > As discussed earlier, there are two questions to consider about the OFW > devpath pattern > > /pci-root@N/pci@i0cf8/... > > that SeaBIOS currently recognizes for devices that reside behind extra > PCI root buses. > > Q1: everything in that pattern that is not "N" > Q2: what goes into N > > These are independent questions. Right. But what I was discussing is a different issue. The point is that it does not make sense to have /pci@i0cf8 under two hierarchies: it's the same register. What happens is that you access /pci@i0cf8 and then *through that* you access another pci root. Not the other way around. The proposal thus is to switch to /pci@i0cf8/pci-root@N in seabios, unconditionally - not if (QEMU). And I thought Kevin agreed it's a good idea. Kevin - is this a good summary of your opinion? -- MST