From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753454AbbGXKwe (ORCPT ); Fri, 24 Jul 2015 06:52:34 -0400 Received: from mezzanine.sirena.org.uk ([106.187.55.193]:37675 "EHLO mezzanine.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752531AbbGXKw3 (ORCPT ); Fri, 24 Jul 2015 06:52:29 -0400 Date: Fri, 24 Jul 2015 11:52:09 +0100 From: Mark Brown To: Ranjit Abhimanyu Waghmode Cc: Michal Simek , Soren Brinkmann , "zajec5@gmail.com" , "marex@denx.de" , "shijie.huang@intel.com" , "juhosg@openwrt.org" , "ben@decadent.org.uk" , "linux-mtd@lists.infradead.org" , "linux-spi@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Harini Katakam , Punnaiah Choudary Kalluri , "ran27jit@gmail.com" , "dwmw2@infradead.org" , "computersforpeace@gmail.com" Message-ID: <20150724105209.GI11162@sirena.org.uk> References: <1436445895-25504-1-git-send-email-ranjit.waghmode@xilinx.com> <20150714164005.GE11162@sirena.org.uk> <7CFCFE83B8145347A1D424EC939F1C3CA7E53D@XAP-PVEXMBX01.xlnx.xilinx.com> <20150715160146.GS11162@sirena.org.uk> <7CFCFE83B8145347A1D424EC939F1C3CA7E758@XAP-PVEXMBX01.xlnx.xilinx.com> <20150716085739.GT11162@sirena.org.uk> <7CFCFE83B8145347A1D424EC939F1C3CA81D12@XAP-PVEXMBX01.xlnx.xilinx.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="JUbEFkz87vQcUeYo" Content-Disposition: inline In-Reply-To: <7CFCFE83B8145347A1D424EC939F1C3CA81D12@XAP-PVEXMBX01.xlnx.xilinx.com> X-Cookie: Stay together, drag each other down. User-Agent: Mutt/1.5.23 (2014-03-12) X-SA-Exim-Connect-IP: 94.175.94.161 X-SA-Exim-Mail-From: broonie@sirena.org.uk Subject: Re: [RFC PATCH 0/2] spi: add dual parallel & stacked mode support in Zynq MPSoC GQSPI controller X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:24:06 +0000) X-SA-Exim-Scanned: Yes (on mezzanine.sirena.org.uk) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --JUbEFkz87vQcUeYo Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Jul 24, 2015 at 10:42:35AM +0000, Ranjit Abhimanyu Waghmode wrote: As I think you've been asked before please fix your mail client to word wrap within paragraphs so your mails are more legible. > To support the dual parallel mode in this controller, following minor > things can be added to the driver. > 1) Controller needs to know in which mode it is working, then it's > obvious to set the appropriate flag for the same > 2) There are more than one chip selects, so need to set the same >=20 > So kindly suggest your view on the above request. I'm not entirely sure what you're asking here from the point of view of SPI, sorry - what exactly are you requesting? If you want to add support for new SPI bus modes please go ahead and do that, you need to clearly document what any new modes you're adding are so that other people can understand them. --JUbEFkz87vQcUeYo Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQEcBAEBCAAGBQJVshjYAAoJECTWi3JdVIfQrTwH/iGW8B+wWVA8yv3usL08Iand PDOjYuDmwKik1jA0tvglRXq8lnaGi36GYi241O77SMuadpwNC/pp7+oYzLULexUl feGMHfc0rCcvDRsNR/ovaHmPp+WGzu7dAmfonkh/+CYgCWnz+gdPVeL/6b2YlaKr a6CxDx+tHHJtrEF2bpEM7sn+ZCU2D8qJbMmG9TBlSpRL/Mhg3mpZwHeJhhMvnOOt UAab8dFIeKpyUT1yuQLvQCbI3Px3AXXK0AtQSCPHUXmGAgJ2v/MusF9KjWnLCn6X Gum78OqCUsMzuYNvLV0RJfTGGPr3Debkiv4UJpUNJn88OcViLbCd8CaBYEsiZ+M= =fYFJ -----END PGP SIGNATURE----- --JUbEFkz87vQcUeYo-- From mboxrd@z Thu Jan 1 00:00:00 1970 From: broonie@kernel.org (Mark Brown) Date: Fri, 24 Jul 2015 11:52:09 +0100 Subject: [RFC PATCH 0/2] spi: add dual parallel & stacked mode support in Zynq MPSoC GQSPI controller In-Reply-To: <7CFCFE83B8145347A1D424EC939F1C3CA81D12@XAP-PVEXMBX01.xlnx.xilinx.com> References: <1436445895-25504-1-git-send-email-ranjit.waghmode@xilinx.com> <20150714164005.GE11162@sirena.org.uk> <7CFCFE83B8145347A1D424EC939F1C3CA7E53D@XAP-PVEXMBX01.xlnx.xilinx.com> <20150715160146.GS11162@sirena.org.uk> <7CFCFE83B8145347A1D424EC939F1C3CA7E758@XAP-PVEXMBX01.xlnx.xilinx.com> <20150716085739.GT11162@sirena.org.uk> <7CFCFE83B8145347A1D424EC939F1C3CA81D12@XAP-PVEXMBX01.xlnx.xilinx.com> Message-ID: <20150724105209.GI11162@sirena.org.uk> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, Jul 24, 2015 at 10:42:35AM +0000, Ranjit Abhimanyu Waghmode wrote: As I think you've been asked before please fix your mail client to word wrap within paragraphs so your mails are more legible. > To support the dual parallel mode in this controller, following minor > things can be added to the driver. > 1) Controller needs to know in which mode it is working, then it's > obvious to set the appropriate flag for the same > 2) There are more than one chip selects, so need to set the same > > So kindly suggest your view on the above request. I'm not entirely sure what you're asking here from the point of view of SPI, sorry - what exactly are you requesting? If you want to add support for new SPI bus modes please go ahead and do that, you need to clearly document what any new modes you're adding are so that other people can understand them. -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 473 bytes Desc: Digital signature URL: