From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755485AbbIBXds (ORCPT ); Wed, 2 Sep 2015 19:33:48 -0400 Received: from mga01.intel.com ([192.55.52.88]:50202 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754888AbbIBXba (ORCPT ); Wed, 2 Sep 2015 19:31:30 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,457,1437462000"; d="scan'208";a="761195058" Subject: [PATCH 10/15] x86, fpu: rework MPX 'xstate' types To: dave@sr71.net Cc: dave.hansen@linux.intel.com, mingo@redhat.com, x86@kernel.org, bp@alien8.de, fenghua.yu@intel.com, tim.c.chen@linux.intel.com, linux-kernel@vger.kernel.org From: Dave Hansen Date: Wed, 02 Sep 2015 16:31:29 -0700 References: <20150902233123.3A7E5FB0@viggo.jf.intel.com> In-Reply-To: <20150902233123.3A7E5FB0@viggo.jf.intel.com> Message-Id: <20150902233129.384B73EB@viggo.jf.intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Dave Hansen MPX includes two separate "extended state components". There is no real need to have an 'mpx_struct' because we never really manage the states together. We also separate out the actual data in 'mpx_bndcsr_state' from the padding. We will shortly be checking the state sizes against our structures and need them to match. For consistency, we also ensure to prefix these types with 'mpx_'. Lastly, we add some comments to mirror some of the descriptions in the Intel documents (SDM) of the various state components. Signed-off-by: Dave Hansen Cc: Ingo Molnar Cc: x86@kernel.org Cc: Borislav Petkov Cc: Fenghua Yu Cc: Tim Chen Cc: linux-kernel@vger.kernel.org --- b/arch/x86/include/asm/fpu/types.h | 29 +++++++++++++++++++++++------ b/arch/x86/include/asm/trace/mpx.h | 7 ++++--- b/arch/x86/kernel/traps.c | 2 +- b/arch/x86/mm/mpx.c | 9 +++++---- 4 files changed, 33 insertions(+), 14 deletions(-) diff -puN arch/x86/include/asm/fpu/types.h~x86-fpu-rework-mpx-types arch/x86/include/asm/fpu/types.h --- a/arch/x86/include/asm/fpu/types.h~x86-fpu-rework-mpx-types 2015-09-02 15:52:55.416140884 -0700 +++ b/arch/x86/include/asm/fpu/types.h 2015-09-02 16:24:41.457752090 -0700 @@ -141,20 +141,37 @@ struct ymmh_struct { }; /* Intel MPX support: */ -struct bndreg { + +struct mpx_bndreg { u64 lower_bound; u64 upper_bound; } __packed; +/* + * State component 3 is used for the 4 128-bit bounds registers + */ +struct mpx_bndreg_state { + struct mpx_bndreg bndreg[4]; +} __packed; -struct bndcsr { +/* + * State component 4 is used for the 64-bit user-mode MPX + * configuration register BNDCFGU and the 64-bit MPX status + * register BNDSTATUS. We call the pair "BNDCSR". + */ +struct mpx_bndcsr { u64 bndcfgu; u64 bndstatus; } __packed; -struct mpx_struct { - struct bndreg bndreg[4]; - struct bndcsr bndcsr; -}; +/* + * The BNDCSR state is padded out to be 64-bytes in size. + */ +struct mpx_bndcsr_state { + union { + struct mpx_bndcsr bndcsr; + u8 pad_to_64_bytes[64]; + }; +} __packed; struct xstate_header { u64 xfeatures; diff -puN arch/x86/include/asm/trace/mpx.h~x86-fpu-rework-mpx-types arch/x86/include/asm/trace/mpx.h --- a/arch/x86/include/asm/trace/mpx.h~x86-fpu-rework-mpx-types 2015-09-02 15:52:55.417140929 -0700 +++ b/arch/x86/include/asm/trace/mpx.h 2015-09-02 15:52:55.424141248 -0700 @@ -11,7 +11,7 @@ TRACE_EVENT(mpx_bounds_register_exception, TP_PROTO(void *addr_referenced, - const struct bndreg *bndreg), + const struct mpx_bndreg *bndreg), TP_ARGS(addr_referenced, bndreg), TP_STRUCT__entry( @@ -44,7 +44,7 @@ TRACE_EVENT(mpx_bounds_register_exceptio TRACE_EVENT(bounds_exception_mpx, - TP_PROTO(const struct bndcsr *bndcsr), + TP_PROTO(const struct mpx_bndcsr *bndcsr), TP_ARGS(bndcsr), TP_STRUCT__entry( @@ -116,7 +116,8 @@ TRACE_EVENT(mpx_new_bounds_table, /* * This gets used outside of MPX-specific code, so we need a stub. */ -static inline void trace_bounds_exception_mpx(const struct bndcsr *bndcsr) +static inline +void trace_bounds_exception_mpx(const struct mpx_bndcsr *bndcsr) { } diff -puN arch/x86/kernel/traps.c~x86-fpu-rework-mpx-types arch/x86/kernel/traps.c --- a/arch/x86/kernel/traps.c~x86-fpu-rework-mpx-types 2015-09-02 15:52:55.419141021 -0700 +++ b/arch/x86/kernel/traps.c 2015-09-02 15:52:55.425141294 -0700 @@ -372,7 +372,7 @@ dotraplinkage void do_double_fault(struc dotraplinkage void do_bounds(struct pt_regs *regs, long error_code) { enum ctx_state prev_state; - const struct bndcsr *bndcsr; + const struct mpx_bndcsr *bndcsr; siginfo_t *info; prev_state = exception_enter(); diff -puN arch/x86/mm/mpx.c~x86-fpu-rework-mpx-types arch/x86/mm/mpx.c --- a/arch/x86/mm/mpx.c~x86-fpu-rework-mpx-types 2015-09-02 15:52:55.421141112 -0700 +++ b/arch/x86/mm/mpx.c 2015-09-02 15:52:55.426141340 -0700 @@ -274,7 +274,8 @@ bad_opcode: */ siginfo_t *mpx_generate_siginfo(struct pt_regs *regs) { - const struct bndreg *bndregs, *bndreg; + const struct mpx_bndreg_state *bndregs; + const struct mpx_bndreg *bndreg; siginfo_t *info = NULL; struct insn insn; uint8_t bndregno; @@ -301,7 +302,7 @@ siginfo_t *mpx_generate_siginfo(struct p goto err_out; } /* now go select the individual register in the set of 4 */ - bndreg = &bndregs[bndregno]; + bndreg = &bndregs->bndreg[bndregno]; info = kzalloc(sizeof(*info), GFP_KERNEL); if (!info) { @@ -343,7 +344,7 @@ err_out: static __user void *mpx_get_bounds_dir(void) { - const struct bndcsr *bndcsr; + const struct mpx_bndcsr *bndcsr; if (!cpu_feature_enabled(X86_FEATURE_MPX)) return MPX_INVALID_BOUNDS_DIR; @@ -526,7 +527,7 @@ out_unmap: static int do_mpx_bt_fault(void) { unsigned long bd_entry, bd_base; - const struct bndcsr *bndcsr; + const struct mpx_bndcsr *bndcsr; struct mm_struct *mm = current->mm; bndcsr = get_xsave_field_ptr(XFEATURE_MASK_BNDCSR); _