From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753810AbbIKR5s (ORCPT ); Fri, 11 Sep 2015 13:57:48 -0400 Received: from mail-wi0-f177.google.com ([209.85.212.177]:38909 "EHLO mail-wi0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753517AbbIKR5q (ORCPT ); Fri, 11 Sep 2015 13:57:46 -0400 Date: Fri, 11 Sep 2015 18:57:42 +0100 From: Lee Jones To: Peter Griffin Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, srinivas.kandagatla@gmail.com, maxime.coquelin@st.com, patrice.chotard@st.com, devicetree@vger.kernel.org, "M'boumba Cedric Madianga" Subject: Re: [PATCH 09/11] ARM: DT: STiH407: Add pinconfig for IRB UHF and IRB TX Message-ID: <20150911175742.GI18779@x1> References: <1441991194-11948-1-git-send-email-peter.griffin@linaro.org> <1441991194-11948-10-git-send-email-peter.griffin@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1441991194-11948-10-git-send-email-peter.griffin@linaro.org> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 11 Sep 2015, Peter Griffin wrote: > This patch adds the pinconfig for IRB TX and IRB UHF. > > Signed-off-by: M'boumba Cedric Madianga > Acked-by: Patrice Chotard > Signed-off-by: Patrice Chotard I'd take out the Ack here. > Signed-off-by: Peter Griffin > --- > arch/arm/boot/dts/stih407-pinctrl.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi > index 3cd7e2a..473f2ea 100644 > --- a/arch/arm/boot/dts/stih407-pinctrl.dtsi > +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi > @@ -121,6 +121,24 @@ > ir = <&pio4 0 ALT2 IN>; > }; > }; > + > + pinctrl_uhf: uhf0 { > + st,pins { > + ir = <&pio4 1 ALT2 IN>; > + }; > + }; > + > + pinctrl_tx: tx0 { > + st,pins { > + tx = <&pio4 2 ALT2 OUT>; > + }; > + }; > + > + pinctrl_tx_od: tx_od0 { > + st,pins { > + tx_od = <&pio4 3 ALT2 OUT>; > + }; > + }; > }; > > /* SBC_ASC0 - UART10 */ -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog From mboxrd@z Thu Jan 1 00:00:00 1970 From: lee.jones@linaro.org (Lee Jones) Date: Fri, 11 Sep 2015 18:57:42 +0100 Subject: [PATCH 09/11] ARM: DT: STiH407: Add pinconfig for IRB UHF and IRB TX In-Reply-To: <1441991194-11948-10-git-send-email-peter.griffin@linaro.org> References: <1441991194-11948-1-git-send-email-peter.griffin@linaro.org> <1441991194-11948-10-git-send-email-peter.griffin@linaro.org> Message-ID: <20150911175742.GI18779@x1> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, 11 Sep 2015, Peter Griffin wrote: > This patch adds the pinconfig for IRB TX and IRB UHF. > > Signed-off-by: M'boumba Cedric Madianga > Acked-by: Patrice Chotard > Signed-off-by: Patrice Chotard I'd take out the Ack here. > Signed-off-by: Peter Griffin > --- > arch/arm/boot/dts/stih407-pinctrl.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi > index 3cd7e2a..473f2ea 100644 > --- a/arch/arm/boot/dts/stih407-pinctrl.dtsi > +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi > @@ -121,6 +121,24 @@ > ir = <&pio4 0 ALT2 IN>; > }; > }; > + > + pinctrl_uhf: uhf0 { > + st,pins { > + ir = <&pio4 1 ALT2 IN>; > + }; > + }; > + > + pinctrl_tx: tx0 { > + st,pins { > + tx = <&pio4 2 ALT2 OUT>; > + }; > + }; > + > + pinctrl_tx_od: tx_od0 { > + st,pins { > + tx_od = <&pio4 3 ALT2 OUT>; > + }; > + }; > }; > > /* SBC_ASC0 - UART10 */ -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog