From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753666AbbIKSBK (ORCPT ); Fri, 11 Sep 2015 14:01:10 -0400 Received: from mail-wi0-f182.google.com ([209.85.212.182]:37866 "EHLO mail-wi0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751960AbbIKSBI (ORCPT ); Fri, 11 Sep 2015 14:01:08 -0400 Date: Fri, 11 Sep 2015 19:01:04 +0100 From: Lee Jones To: Peter Griffin Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, srinivas.kandagatla@gmail.com, maxime.coquelin@st.com, patrice.chotard@st.com, devicetree@vger.kernel.org, Christophe Kerello Subject: Re: [PATCH 06/11] ARM: DT: STiH407: Add NAND flash controller pin configuration Message-ID: <20150911180104.GL18779@x1> References: <1441991194-11948-1-git-send-email-peter.griffin@linaro.org> <1441991194-11948-7-git-send-email-peter.griffin@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1441991194-11948-7-git-send-email-peter.griffin@linaro.org> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 11 Sep 2015, Peter Griffin wrote: > This patch adds NAND flash support controller pin configuration > for STiH407 family silicon. > > Signed-off-by: Patrice Chotard > Signed-off-by: Christophe Kerello > Signed-off-by: Peter Griffin > --- > arch/arm/boot/dts/stih407-pinctrl.dtsi | 23 +++++++++++++++++++++++ > 1 file changed, 23 insertions(+) Acked-by: Lee Jones > diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi > index d0f5fdd..cde776b 100644 > --- a/arch/arm/boot/dts/stih407-pinctrl.dtsi > +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi > @@ -885,6 +885,29 @@ > }; > }; > }; > + > + nand { > + pinctrl_nand: nand { > + st,pins { > + nand_cs1 = <&pio40 6 ALT3 OUT>; > + nand_cs0 = <&pio40 7 ALT3 OUT>; > + nand_d0 = <&pio41 0 ALT3 BIDIR>; > + nand_d1 = <&pio41 1 ALT3 BIDIR>; > + nand_d2 = <&pio41 2 ALT3 BIDIR>; > + nand_d3 = <&pio41 3 ALT3 BIDIR>; > + nand_d4 = <&pio41 4 ALT3 BIDIR>; > + nand_d5 = <&pio41 5 ALT3 BIDIR>; > + nand_d6 = <&pio41 6 ALT3 BIDIR>; > + nand_d7 = <&pio41 7 ALT3 BIDIR>; > + nand_we = <&pio42 0 ALT3 OUT>; > + nand_dqs = <&pio42 1 ALT3 OUT>; > + nand_ale = <&pio42 2 ALT3 OUT>; > + nand_cle = <&pio42 3 ALT3 OUT>; > + nand_rnb = <&pio42 4 ALT3 IN>; > + nand_oe = <&pio42 5 ALT3 OUT>; > + }; > + }; > + }; > }; > }; > }; -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lee Jones Subject: Re: [PATCH 06/11] ARM: DT: STiH407: Add NAND flash controller pin configuration Date: Fri, 11 Sep 2015 19:01:04 +0100 Message-ID: <20150911180104.GL18779@x1> References: <1441991194-11948-1-git-send-email-peter.griffin@linaro.org> <1441991194-11948-7-git-send-email-peter.griffin@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: Content-Disposition: inline In-Reply-To: <1441991194-11948-7-git-send-email-peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Peter Griffin Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, srinivas.kandagatla-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, maxime.coquelin-qxv4g6HH51o@public.gmane.org, patrice.chotard-qxv4g6HH51o@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Christophe Kerello List-Id: devicetree@vger.kernel.org On Fri, 11 Sep 2015, Peter Griffin wrote: > This patch adds NAND flash support controller pin configuration > for STiH407 family silicon. >=20 > Signed-off-by: Patrice Chotard > Signed-off-by: Christophe Kerello > Signed-off-by: Peter Griffin > --- > arch/arm/boot/dts/stih407-pinctrl.dtsi | 23 +++++++++++++++++++++++ > 1 file changed, 23 insertions(+) Acked-by: Lee Jones > diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/d= ts/stih407-pinctrl.dtsi > index d0f5fdd..cde776b 100644 > --- a/arch/arm/boot/dts/stih407-pinctrl.dtsi > +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi > @@ -885,6 +885,29 @@ > }; > }; > }; > + > + nand { > + pinctrl_nand: nand { > + st,pins { > + nand_cs1 =3D <&pio40 6 ALT3 OUT>; > + nand_cs0 =3D <&pio40 7 ALT3 OUT>; > + nand_d0 =3D <&pio41 0 ALT3 BIDIR>; > + nand_d1 =3D <&pio41 1 ALT3 BIDIR>; > + nand_d2 =3D <&pio41 2 ALT3 BIDIR>; > + nand_d3 =3D <&pio41 3 ALT3 BIDIR>; > + nand_d4 =3D <&pio41 4 ALT3 BIDIR>; > + nand_d5 =3D <&pio41 5 ALT3 BIDIR>; > + nand_d6 =3D <&pio41 6 ALT3 BIDIR>; > + nand_d7 =3D <&pio41 7 ALT3 BIDIR>; > + nand_we =3D <&pio42 0 ALT3 OUT>; > + nand_dqs =3D <&pio42 1 ALT3 OUT>; > + nand_ale =3D <&pio42 2 ALT3 OUT>; > + nand_cle =3D <&pio42 3 ALT3 OUT>; > + nand_rnb =3D <&pio42 4 ALT3 IN>; > + nand_oe =3D <&pio42 5 ALT3 OUT>; > + }; > + }; > + }; > }; > }; > }; --=20 Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org =E2=94=82 Open source software for ARM SoCs =46ollow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line "unsubscribe devicetree" i= n the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: lee.jones@linaro.org (Lee Jones) Date: Fri, 11 Sep 2015 19:01:04 +0100 Subject: [PATCH 06/11] ARM: DT: STiH407: Add NAND flash controller pin configuration In-Reply-To: <1441991194-11948-7-git-send-email-peter.griffin@linaro.org> References: <1441991194-11948-1-git-send-email-peter.griffin@linaro.org> <1441991194-11948-7-git-send-email-peter.griffin@linaro.org> Message-ID: <20150911180104.GL18779@x1> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, 11 Sep 2015, Peter Griffin wrote: > This patch adds NAND flash support controller pin configuration > for STiH407 family silicon. > > Signed-off-by: Patrice Chotard > Signed-off-by: Christophe Kerello > Signed-off-by: Peter Griffin > --- > arch/arm/boot/dts/stih407-pinctrl.dtsi | 23 +++++++++++++++++++++++ > 1 file changed, 23 insertions(+) Acked-by: Lee Jones > diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi > index d0f5fdd..cde776b 100644 > --- a/arch/arm/boot/dts/stih407-pinctrl.dtsi > +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi > @@ -885,6 +885,29 @@ > }; > }; > }; > + > + nand { > + pinctrl_nand: nand { > + st,pins { > + nand_cs1 = <&pio40 6 ALT3 OUT>; > + nand_cs0 = <&pio40 7 ALT3 OUT>; > + nand_d0 = <&pio41 0 ALT3 BIDIR>; > + nand_d1 = <&pio41 1 ALT3 BIDIR>; > + nand_d2 = <&pio41 2 ALT3 BIDIR>; > + nand_d3 = <&pio41 3 ALT3 BIDIR>; > + nand_d4 = <&pio41 4 ALT3 BIDIR>; > + nand_d5 = <&pio41 5 ALT3 BIDIR>; > + nand_d6 = <&pio41 6 ALT3 BIDIR>; > + nand_d7 = <&pio41 7 ALT3 BIDIR>; > + nand_we = <&pio42 0 ALT3 OUT>; > + nand_dqs = <&pio42 1 ALT3 OUT>; > + nand_ale = <&pio42 2 ALT3 OUT>; > + nand_cle = <&pio42 3 ALT3 OUT>; > + nand_rnb = <&pio42 4 ALT3 IN>; > + nand_oe = <&pio42 5 ALT3 OUT>; > + }; > + }; > + }; > }; > }; > }; -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog