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Date: Fri, 11 Sep 2015 15:27:44 -0700
From: Davidlohr Bueso <dave@stgolabs.net>
To: Waiman Long <Waiman.Long@hpe.com>
Cc: Peter Zijlstra <peterz@infradead.org>, Ingo Molnar <mingo@redhat.com>,
        Thomas Gleixner <tglx@linutronix.de>, "H. Peter Anvin" <hpa@zytor.com>,
        x86@kernel.org, linux-kernel@vger.kernel.org,
        Scott J Norton <scott.norton@hp.com>,
        Douglas Hatch <doug.hatch@hp.com>
Subject: Re: [PATCH v6 1/6] locking/qspinlock: relaxes cmpxchg & xchg ops in
 native code
Message-ID: <20150911222744.GC19736@linux-q0g1.site>
References: <1441996658-62854-1-git-send-email-Waiman.Long@hpe.com>
 <1441996658-62854-2-git-send-email-Waiman.Long@hpe.com>
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On Fri, 11 Sep 2015, Waiman Long wrote:

>@@ -46,7 +46,7 @@ static inline bool virt_queued_spin_lock(struct qspinlock *lock)
> 	if (!static_cpu_has(X86_FEATURE_HYPERVISOR))
> 		return false;
>
>-	while (atomic_cmpxchg(&lock->val, 0, _Q_LOCKED_VAL) != 0)
>+	while (atomic_cmpxchg_acquire(&lock->val, 0, _Q_LOCKED_VAL) != 0)
> 		cpu_relax();

This code has changed with Peter's recent ccas fix. And the whole virt_queued_spin_lock()
thing will now be under pv configs. So this doesn't apply to native code anymore, so it
looks like it should be dropped altogether.

Thanks,
Davidlohr