From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36118) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eWB6L-0001Y1-L1 for qemu-devel@nongnu.org; Mon, 01 Jan 2018 20:10:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eWB6I-00056q-9P for qemu-devel@nongnu.org; Mon, 01 Jan 2018 20:10:45 -0500 Received: from mout.kundenserver.de ([212.227.126.131]:57888) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eWB6H-00055H-VO for qemu-devel@nongnu.org; Mon, 01 Jan 2018 20:10:42 -0500 From: Laurent Vivier Date: Tue, 2 Jan 2018 02:10:26 +0100 Message-Id: <20180102011032.30056-12-laurent@vivier.eu> In-Reply-To: <20180102011032.30056-1-laurent@vivier.eu> References: <20180102011032.30056-1-laurent@vivier.eu> Subject: [Qemu-devel] [PATCH v5 11/17] target/m68k: add reset List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Thomas Huth , Laurent Vivier The instruction traps if the CPU is not in Supervisor state but the helper is empty because there is no easy way to reset all the peripherals without resetting the CPU itself. Signed-off-by: Laurent Vivier --- target/m68k/helper.c | 7 +++++++ target/m68k/helper.h | 4 ++++ target/m68k/translate.c | 13 +++++++++++++ 3 files changed, 24 insertions(+) diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 7e50ff5871..f8bd456145 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -707,3 +707,10 @@ void HELPER(set_mac_extu)(CPUM68KState *env, uint32_t val, uint32_t acc) res |= (uint64_t)(val & 0xffff0000) << 16; env->macc[acc + 1] = res; } + +#if defined(CONFIG_SOFTMMU) +void HELPER(reset)(CPUM68KState *env) +{ + /* FIXME: reset all except CPU */ +} +#endif diff --git a/target/m68k/helper.h b/target/m68k/helper.h index eebe52dae5..8d0cad7c6b 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -94,3 +94,7 @@ DEF_HELPER_FLAGS_4(bfchg_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32) DEF_HELPER_FLAGS_4(bfclr_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32) DEF_HELPER_FLAGS_4(bfset_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32) DEF_HELPER_FLAGS_4(bfffo_mem, TCG_CALL_NO_WG, i64, env, i32, s32, i32) + +#if defined(CONFIG_SOFTMMU) +DEF_HELPER_FLAGS_1(reset, TCG_CALL_NO_RWG, void, env) +#endif diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 2a9a9c8e42..68b67bc0a3 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -2762,6 +2762,18 @@ DISAS_INSN(unlk) tcg_temp_free(src); } +#if defined(CONFIG_SOFTMMU) +DISAS_INSN(reset) +{ + if (IS_USER(s)) { + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + return; + } + + gen_helper_reset(cpu_env); +} +#endif + DISAS_INSN(nop) { } @@ -5634,6 +5646,7 @@ void register_m68k_insns (CPUM68KState *env) #if defined(CONFIG_SOFTMMU) INSN(move_to_usp, 4e60, fff8, USP); INSN(move_from_usp, 4e68, fff8, USP); + INSN(reset, 4e70, ffff, M68000); BASE(stop, 4e72, ffff); BASE(rte, 4e73, ffff); INSN(movec, 4e7b, ffff, CF_ISA_A); -- 2.14.3