* [Qemu-devel] [PATCH] hw/arm/smmuv3: Fix decoding of ID register range
@ 2019-05-24 12:48 Peter Maydell
2019-05-24 13:59 ` Auger Eric
0 siblings, 1 reply; 2+ messages in thread
From: Peter Maydell @ 2019-05-24 12:48 UTC (permalink / raw
To: qemu-arm, qemu-devel; +Cc: Eric Auger
The SMMUv3 ID registers cover an area 0x30 bytes in size
(12 registers, 4 bytes each). We were incorrectly decoding
only the first 0x20 bytes.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/smmuv3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index fd8ec7860ee..e96d5beb9a8 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -1232,7 +1232,7 @@ static MemTxResult smmu_readl(SMMUv3State *s, hwaddr offset,
uint64_t *data, MemTxAttrs attrs)
{
switch (offset) {
- case A_IDREGS ... A_IDREGS + 0x1f:
+ case A_IDREGS ... A_IDREGS + 0x2f:
*data = smmuv3_idreg(offset - A_IDREGS);
return MEMTX_OK;
case A_IDR0 ... A_IDR5:
--
2.20.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] [PATCH] hw/arm/smmuv3: Fix decoding of ID register range
2019-05-24 12:48 [Qemu-devel] [PATCH] hw/arm/smmuv3: Fix decoding of ID register range Peter Maydell
@ 2019-05-24 13:59 ` Auger Eric
0 siblings, 0 replies; 2+ messages in thread
From: Auger Eric @ 2019-05-24 13:59 UTC (permalink / raw
To: Peter Maydell, qemu-arm, qemu-devel
Hi Peter,
On 5/24/19 2:48 PM, Peter Maydell wrote:
> The SMMUv3 ID registers cover an area 0x30 bytes in size
> (12 registers, 4 bytes each). We were incorrectly decoding
> only the first 0x20 bytes.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Thank you for the fix.
Eric
> ---
> hw/arm/smmuv3.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
> index fd8ec7860ee..e96d5beb9a8 100644
> --- a/hw/arm/smmuv3.c
> +++ b/hw/arm/smmuv3.c
> @@ -1232,7 +1232,7 @@ static MemTxResult smmu_readl(SMMUv3State *s, hwaddr offset,
> uint64_t *data, MemTxAttrs attrs)
> {
> switch (offset) {
> - case A_IDREGS ... A_IDREGS + 0x1f:
> + case A_IDREGS ... A_IDREGS + 0x2f:
> *data = smmuv3_idreg(offset - A_IDREGS);
> return MEMTX_OK;
> case A_IDR0 ... A_IDR5:
>
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2019-05-24 14:19 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-05-24 12:48 [Qemu-devel] [PATCH] hw/arm/smmuv3: Fix decoding of ID register range Peter Maydell
2019-05-24 13:59 ` Auger Eric
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.