* [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements
@ 2020-05-16 17:45 Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 01/18] target/mips: fpu: Demacro ADD.<D|S|PS> Aleksandar Markovic
` (17 more replies)
0 siblings, 18 replies; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
This series contains mostly cosmetic FPU cleanups aimed to
make source code recognition easier for tools like gdb, gcov,
calgrind, and others.
There is also a patch that refactors conversion from ieee to
mips fp exception flags. This refactoring will improve the
performance of almost all fp-related mips instructions, albait
very modestly (less that one percent).
There is a patch that introduces some logging in mips_malta.c.
Finally, there is a change of Aleksandar Rikalo's email.
v2->v3:
- changed Malta patch to perform logging
- added change of Aleksandar Rikalo's email
v1->v2:
- added more demacroing
Aleksandar Markovic (18):
target/mips: fpu: Demacro ADD.<D|S|PS>
target/mips: fpu: Demacro SUB.<D|S|PS>
target/mips: fpu: Demacro MUL.<D|S|PS>
target/mips: fpu: Demacro DIV.<D|S|PS>
target/mips: fpu: Remove now unused macro FLOAT_BINOP
target/mips: fpu: Demacro MADD.<D|S|PS>
target/mips: fpu: Demacro MSUB.<D|S|PS>
target/mips: fpu: Demacro NMADD.<D|S|PS>
target/mips: fpu: Demacro NMSUB.<D|S|PS>
target/mips: fpu: Remove now unused UNFUSED_FMA and FLOAT_FMA macros
target/mips: fpu: Demacro CLASS.<D|S>
target/mips: fpu: Remove now unused FLOAT_CLASS macro
target/mips: fpu: Demacro RINT.<D|S>
target/mips: fpu: Remove now unused FLOAT_RINT macro
target/mips: fpu: Name better paired-single variables
target/mips: fpu: Refactor conversion from ieee to mips exception
flags
hw/mips: Add some logging for bad register offset cases
MAINTAINERS: Change Aleksandar Rikalo's email address
.mailmap | 3 +-
MAINTAINERS | 12 +-
hw/mips/mips_malta.c | 14 +-
target/mips/fpu_helper.c | 658 +++++++++++++++++++++++++++------------
target/mips/internal.h | 1 -
target/mips/msa_helper.c | 77 +++--
6 files changed, 519 insertions(+), 246 deletions(-)
--
2.20.1
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 01/18] target/mips: fpu: Demacro ADD.<D|S|PS>
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 02/18] target/mips: fpu: Demacro SUB.<D|S|PS> Aleksandar Markovic
` (16 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/fpu_helper.c | 38 +++++++++++++++++++++++++++++++++++++-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index 5287c86c61..984f3f4dfb 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -1208,12 +1208,48 @@ uint64_t helper_float_ ## name ## _ps(CPUMIPSState *env, \
return ((uint64_t)wth2 << 32) | wt2; \
}
-FLOAT_BINOP(add)
FLOAT_BINOP(sub)
FLOAT_BINOP(mul)
FLOAT_BINOP(div)
#undef FLOAT_BINOP
+uint64_t helper_float_add_d(CPUMIPSState *env,
+ uint64_t fdt0, uint64_t fdt1)
+{
+ uint64_t dt2;
+
+ dt2 = float64_add(fdt0, fdt1, &env->active_fpu.fp_status);
+ update_fcr31(env, GETPC());
+ return dt2;
+}
+
+uint32_t helper_float_add_s(CPUMIPSState *env,
+ uint32_t fst0, uint32_t fst1)
+{
+ uint32_t wt2;
+
+ wt2 = float32_sub(fst0, fst1, &env->active_fpu.fp_status);
+ update_fcr31(env, GETPC());
+ return wt2;
+}
+
+uint64_t helper_float_add_ps(CPUMIPSState *env,
+ uint64_t fdt0, uint64_t fdt1)
+{
+ uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
+ uint32_t fsth0 = fdt0 >> 32;
+ uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
+ uint32_t fsth1 = fdt1 >> 32;
+ uint32_t wtl2;
+ uint32_t wth2;
+
+ wtl2 = float32_add(fstl0, fstl1, &env->active_fpu.fp_status);
+ wth2 = float32_add(fsth0, fsth1, &env->active_fpu.fp_status);
+ update_fcr31(env, GETPC());
+ return ((uint64_t)wth2 << 32) | wtl2;
+}
+
+
/* MIPS specific binary operations */
uint64_t helper_float_recip2_d(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt2)
{
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 02/18] target/mips: fpu: Demacro SUB.<D|S|PS>
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 01/18] target/mips: fpu: Demacro ADD.<D|S|PS> Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 03/18] target/mips: fpu: Demacro MUL.<D|S|PS> Aleksandar Markovic
` (15 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/fpu_helper.c | 37 ++++++++++++++++++++++++++++++++++++-
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index 984f3f4dfb..715a872cae 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -1208,7 +1208,6 @@ uint64_t helper_float_ ## name ## _ps(CPUMIPSState *env, \
return ((uint64_t)wth2 << 32) | wt2; \
}
-FLOAT_BINOP(sub)
FLOAT_BINOP(mul)
FLOAT_BINOP(div)
#undef FLOAT_BINOP
@@ -1249,6 +1248,42 @@ uint64_t helper_float_add_ps(CPUMIPSState *env,
return ((uint64_t)wth2 << 32) | wtl2;
}
+uint64_t helper_float_sub_d(CPUMIPSState *env,
+ uint64_t fdt0, uint64_t fdt1)
+{
+ uint64_t dt2;
+
+ dt2 = float64_sub(fdt0, fdt1, &env->active_fpu.fp_status);
+ update_fcr31(env, GETPC());
+ return dt2;
+}
+
+uint32_t helper_float_sub_s(CPUMIPSState *env,
+ uint32_t fst0, uint32_t fst1)
+{
+ uint32_t wt2;
+
+ wt2 = float32_sub(fst0, fst1, &env->active_fpu.fp_status);
+ update_fcr31(env, GETPC());
+ return wt2;
+}
+
+uint64_t helper_float_sub_ps(CPUMIPSState *env,
+ uint64_t fdt0, uint64_t fdt1)
+{
+ uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
+ uint32_t fsth0 = fdt0 >> 32;
+ uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
+ uint32_t fsth1 = fdt1 >> 32;
+ uint32_t wtl2;
+ uint32_t wth2;
+
+ wtl2 = float32_sub(fstl0, fstl1, &env->active_fpu.fp_status);
+ wth2 = float32_sub(fsth0, fsth1, &env->active_fpu.fp_status);
+ update_fcr31(env, GETPC());
+ return ((uint64_t)wth2 << 32) | wtl2;
+}
+
/* MIPS specific binary operations */
uint64_t helper_float_recip2_d(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt2)
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 03/18] target/mips: fpu: Demacro MUL.<D|S|PS>
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 01/18] target/mips: fpu: Demacro ADD.<D|S|PS> Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 02/18] target/mips: fpu: Demacro SUB.<D|S|PS> Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 04/18] target/mips: fpu: Demacro DIV.<D|S|PS> Aleksandar Markovic
` (14 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/fpu_helper.c | 37 ++++++++++++++++++++++++++++++++++++-
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index 715a872cae..449e945166 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -1208,7 +1208,6 @@ uint64_t helper_float_ ## name ## _ps(CPUMIPSState *env, \
return ((uint64_t)wth2 << 32) | wt2; \
}
-FLOAT_BINOP(mul)
FLOAT_BINOP(div)
#undef FLOAT_BINOP
@@ -1284,6 +1283,42 @@ uint64_t helper_float_sub_ps(CPUMIPSState *env,
return ((uint64_t)wth2 << 32) | wtl2;
}
+uint64_t helper_float_mul_d(CPUMIPSState *env,
+ uint64_t fdt0, uint64_t fdt1)
+{
+ uint64_t dt2;
+
+ dt2 = float64_mul(fdt0, fdt1, &env->active_fpu.fp_status);
+ update_fcr31(env, GETPC());
+ return dt2;
+}
+
+uint32_t helper_float_mul_s(CPUMIPSState *env,
+ uint32_t fst0, uint32_t fst1)
+{
+ uint32_t wt2;
+
+ wt2 = float32_mul(fst0, fst1, &env->active_fpu.fp_status);
+ update_fcr31(env, GETPC());
+ return wt2;
+}
+
+uint64_t helper_float_mul_ps(CPUMIPSState *env,
+ uint64_t fdt0, uint64_t fdt1)
+{
+ uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
+ uint32_t fsth0 = fdt0 >> 32;
+ uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
+ uint32_t fsth1 = fdt1 >> 32;
+ uint32_t wtl2;
+ uint32_t wth2;
+
+ wtl2 = float32_mul(fstl0, fstl1, &env->active_fpu.fp_status);
+ wth2 = float32_mul(fsth0, fsth1, &env->active_fpu.fp_status);
+ update_fcr31(env, GETPC());
+ return ((uint64_t)wth2 << 32) | wtl2;
+}
+
/* MIPS specific binary operations */
uint64_t helper_float_recip2_d(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt2)
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 04/18] target/mips: fpu: Demacro DIV.<D|S|PS>
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
` (2 preceding siblings ...)
2020-05-16 17:45 ` [PATCH v3 03/18] target/mips: fpu: Demacro MUL.<D|S|PS> Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 05/18] target/mips: fpu: Remove now unused macro FLOAT_BINOP Aleksandar Markovic
` (13 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/fpu_helper.c | 37 ++++++++++++++++++++++++++++++++++++-
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index 449e945166..2759c9989d 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -1208,7 +1208,6 @@ uint64_t helper_float_ ## name ## _ps(CPUMIPSState *env, \
return ((uint64_t)wth2 << 32) | wt2; \
}
-FLOAT_BINOP(div)
#undef FLOAT_BINOP
uint64_t helper_float_add_d(CPUMIPSState *env,
@@ -1319,6 +1318,42 @@ uint64_t helper_float_mul_ps(CPUMIPSState *env,
return ((uint64_t)wth2 << 32) | wtl2;
}
+uint64_t helper_float_div_d(CPUMIPSState *env,
+ uint64_t fdt0, uint64_t fdt1)
+{
+ uint64_t dt2;
+
+ dt2 = float64_div(fdt0, fdt1, &env->active_fpu.fp_status);
+ update_fcr31(env, GETPC());
+ return dt2;
+}
+
+uint32_t helper_float_div_s(CPUMIPSState *env,
+ uint32_t fst0, uint32_t fst1)
+{
+ uint32_t wt2;
+
+ wt2 = float32_div(fst0, fst1, &env->active_fpu.fp_status);
+ update_fcr31(env, GETPC());
+ return wt2;
+}
+
+uint64_t helper_float_div_ps(CPUMIPSState *env,
+ uint64_t fdt0, uint64_t fdt1)
+{
+ uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
+ uint32_t fsth0 = fdt0 >> 32;
+ uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
+ uint32_t fsth1 = fdt1 >> 32;
+ uint32_t wtl2;
+ uint32_t wth2;
+
+ wtl2 = float32_div(fstl0, fstl1, &env->active_fpu.fp_status);
+ wth2 = float32_div(fsth0, fsth1, &env->active_fpu.fp_status);
+ update_fcr31(env, GETPC());
+ return ((uint64_t)wth2 << 32) | wtl2;
+}
+
/* MIPS specific binary operations */
uint64_t helper_float_recip2_d(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt2)
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 05/18] target/mips: fpu: Remove now unused macro FLOAT_BINOP
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
` (3 preceding siblings ...)
2020-05-16 17:45 ` [PATCH v3 04/18] target/mips: fpu: Demacro DIV.<D|S|PS> Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 06/18] target/mips: fpu: Demacro MADD.<D|S|PS> Aleksandar Markovic
` (12 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
After demacroing <ADD|SUB|MUL|DIV>.<D|S|PS>, this macro is not
needed anymore.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/fpu_helper.c | 39 ---------------------------------------
1 file changed, 39 deletions(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index 2759c9989d..a3a39681f8 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -1170,45 +1170,6 @@ FLOAT_CLASS(class_d, 64)
#undef FLOAT_CLASS
/* binary operations */
-#define FLOAT_BINOP(name) \
-uint64_t helper_float_ ## name ## _d(CPUMIPSState *env, \
- uint64_t fdt0, uint64_t fdt1) \
-{ \
- uint64_t dt2; \
- \
- dt2 = float64_ ## name(fdt0, fdt1, &env->active_fpu.fp_status);\
- update_fcr31(env, GETPC()); \
- return dt2; \
-} \
- \
-uint32_t helper_float_ ## name ## _s(CPUMIPSState *env, \
- uint32_t fst0, uint32_t fst1) \
-{ \
- uint32_t wt2; \
- \
- wt2 = float32_ ## name(fst0, fst1, &env->active_fpu.fp_status);\
- update_fcr31(env, GETPC()); \
- return wt2; \
-} \
- \
-uint64_t helper_float_ ## name ## _ps(CPUMIPSState *env, \
- uint64_t fdt0, \
- uint64_t fdt1) \
-{ \
- uint32_t fst0 = fdt0 & 0XFFFFFFFF; \
- uint32_t fsth0 = fdt0 >> 32; \
- uint32_t fst1 = fdt1 & 0XFFFFFFFF; \
- uint32_t fsth1 = fdt1 >> 32; \
- uint32_t wt2; \
- uint32_t wth2; \
- \
- wt2 = float32_ ## name(fst0, fst1, &env->active_fpu.fp_status); \
- wth2 = float32_ ## name(fsth0, fsth1, &env->active_fpu.fp_status); \
- update_fcr31(env, GETPC()); \
- return ((uint64_t)wth2 << 32) | wt2; \
-}
-
-#undef FLOAT_BINOP
uint64_t helper_float_add_d(CPUMIPSState *env,
uint64_t fdt0, uint64_t fdt1)
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 06/18] target/mips: fpu: Demacro MADD.<D|S|PS>
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
` (4 preceding siblings ...)
2020-05-16 17:45 ` [PATCH v3 05/18] target/mips: fpu: Remove now unused macro FLOAT_BINOP Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 07/18] target/mips: fpu: Demacro MSUB.<D|S|PS> Aleksandar Markovic
` (11 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/fpu_helper.c | 41 +++++++++++++++++++++++++++++++++++++++-
1 file changed, 40 insertions(+), 1 deletion(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index a3a39681f8..c070081cbc 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -1495,12 +1495,51 @@ uint64_t helper_float_ ## name ## _ps(CPUMIPSState *env, \
update_fcr31(env, GETPC()); \
return ((uint64_t)fsth0 << 32) | fst0; \
}
-FLOAT_FMA(madd, 0)
FLOAT_FMA(msub, float_muladd_negate_c)
FLOAT_FMA(nmadd, float_muladd_negate_result)
FLOAT_FMA(nmsub, float_muladd_negate_result | float_muladd_negate_c)
#undef FLOAT_FMA
+uint64_t helper_float_madd_d(CPUMIPSState *env, uint64_t fst0,
+ uint64_t fst1, uint64_t fst2)
+{
+ fst0 = float64_mul(fst0, fst1, &env->active_fpu.fp_status);
+ fst0 = float64_add(fst0, fst2, &env->active_fpu.fp_status);
+
+ update_fcr31(env, GETPC());
+ return fst0;
+}
+
+uint32_t helper_float_madd_s(CPUMIPSState *env, uint32_t fst0,
+ uint32_t fst1, uint32_t fst2)
+{
+ fst0 = float32_mul(fst0, fst1, &env->active_fpu.fp_status);
+ fst0 = float32_add(fst0, fst2, &env->active_fpu.fp_status);
+
+ update_fcr31(env, GETPC());
+ return fst0;
+}
+
+uint64_t helper_float_madd_ps(CPUMIPSState *env, uint64_t fdt0,
+ uint64_t fdt1, uint64_t fdt2)
+{
+ uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
+ uint32_t fsth0 = fdt0 >> 32;
+ uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
+ uint32_t fsth1 = fdt1 >> 32;
+ uint32_t fstl2 = fdt2 & 0XFFFFFFFF;
+ uint32_t fsth2 = fdt2 >> 32;
+
+ fstl0 = float32_mul(fstl0, fstl1, &env->active_fpu.fp_status);
+ fstl0 = float32_add(fstl0, fstl2, &env->active_fpu.fp_status);
+ fsth0 = float32_mul(fsth0, fsth1, &env->active_fpu.fp_status);
+ fsth0 = float32_add(fsth0, fsth2, &env->active_fpu.fp_status);
+
+ update_fcr31(env, GETPC());
+ return ((uint64_t)fsth0 << 32) | fstl0;
+}
+
+
#define FLOAT_FMADDSUB(name, bits, muladd_arg) \
uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
uint ## bits ## _t fs, \
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 07/18] target/mips: fpu: Demacro MSUB.<D|S|PS>
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
` (5 preceding siblings ...)
2020-05-16 17:45 ` [PATCH v3 06/18] target/mips: fpu: Demacro MADD.<D|S|PS> Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 08/18] target/mips: fpu: Demacro NMADD.<D|S|PS> Aleksandar Markovic
` (10 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/fpu_helper.c | 40 +++++++++++++++++++++++++++++++++++++++-
1 file changed, 39 insertions(+), 1 deletion(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index c070081cbc..e37fc4075d 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -1495,7 +1495,6 @@ uint64_t helper_float_ ## name ## _ps(CPUMIPSState *env, \
update_fcr31(env, GETPC()); \
return ((uint64_t)fsth0 << 32) | fst0; \
}
-FLOAT_FMA(msub, float_muladd_negate_c)
FLOAT_FMA(nmadd, float_muladd_negate_result)
FLOAT_FMA(nmsub, float_muladd_negate_result | float_muladd_negate_c)
#undef FLOAT_FMA
@@ -1539,6 +1538,45 @@ uint64_t helper_float_madd_ps(CPUMIPSState *env, uint64_t fdt0,
return ((uint64_t)fsth0 << 32) | fstl0;
}
+uint64_t helper_float_msub_d(CPUMIPSState *env, uint64_t fst0,
+ uint64_t fst1, uint64_t fst2)
+{
+ fst0 = float64_mul(fst0, fst1, &env->active_fpu.fp_status);
+ fst0 = float64_sub(fst0, fst2, &env->active_fpu.fp_status);
+
+ update_fcr31(env, GETPC());
+ return fst0;
+}
+
+uint32_t helper_float_msub_s(CPUMIPSState *env, uint32_t fst0,
+ uint32_t fst1, uint32_t fst2)
+{
+ fst0 = float32_mul(fst0, fst1, &env->active_fpu.fp_status);
+ fst0 = float32_sub(fst0, fst2, &env->active_fpu.fp_status);
+
+ update_fcr31(env, GETPC());
+ return fst0;
+}
+
+uint64_t helper_float_msub_ps(CPUMIPSState *env, uint64_t fdt0,
+ uint64_t fdt1, uint64_t fdt2)
+{
+ uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
+ uint32_t fsth0 = fdt0 >> 32;
+ uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
+ uint32_t fsth1 = fdt1 >> 32;
+ uint32_t fstl2 = fdt2 & 0XFFFFFFFF;
+ uint32_t fsth2 = fdt2 >> 32;
+
+ fstl0 = float32_mul(fstl0, fstl1, &env->active_fpu.fp_status);
+ fstl0 = float32_sub(fstl0, fstl2, &env->active_fpu.fp_status);
+ fsth0 = float32_mul(fsth0, fsth1, &env->active_fpu.fp_status);
+ fsth0 = float32_sub(fsth0, fsth2, &env->active_fpu.fp_status);
+
+ update_fcr31(env, GETPC());
+ return ((uint64_t)fsth0 << 32) | fstl0;
+}
+
#define FLOAT_FMADDSUB(name, bits, muladd_arg) \
uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 08/18] target/mips: fpu: Demacro NMADD.<D|S|PS>
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
` (6 preceding siblings ...)
2020-05-16 17:45 ` [PATCH v3 07/18] target/mips: fpu: Demacro MSUB.<D|S|PS> Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 09/18] target/mips: fpu: Demacro NMSUB.<D|S|PS> Aleksandar Markovic
` (9 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/fpu_helper.c | 44 +++++++++++++++++++++++++++++++++++++++-
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index e37fc4075d..d4c065f281 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -1495,7 +1495,6 @@ uint64_t helper_float_ ## name ## _ps(CPUMIPSState *env, \
update_fcr31(env, GETPC()); \
return ((uint64_t)fsth0 << 32) | fst0; \
}
-FLOAT_FMA(nmadd, float_muladd_negate_result)
FLOAT_FMA(nmsub, float_muladd_negate_result | float_muladd_negate_c)
#undef FLOAT_FMA
@@ -1577,6 +1576,49 @@ uint64_t helper_float_msub_ps(CPUMIPSState *env, uint64_t fdt0,
return ((uint64_t)fsth0 << 32) | fstl0;
}
+uint64_t helper_float_nmadd_d(CPUMIPSState *env, uint64_t fst0,
+ uint64_t fst1, uint64_t fst2)
+{
+ fst0 = float64_mul(fst0, fst1, &env->active_fpu.fp_status);
+ fst0 = float64_add(fst0, fst2, &env->active_fpu.fp_status);
+ fst0 = float64_chs(fst0);
+
+ update_fcr31(env, GETPC());
+ return fst0;
+}
+
+uint32_t helper_float_nmadd_s(CPUMIPSState *env, uint32_t fst0,
+ uint32_t fst1, uint32_t fst2)
+{
+ fst0 = float32_mul(fst0, fst1, &env->active_fpu.fp_status);
+ fst0 = float32_add(fst0, fst2, &env->active_fpu.fp_status);
+ fst0 = float32_chs(fst0);
+
+ update_fcr31(env, GETPC());
+ return fst0;
+}
+
+uint64_t helper_float_nmadd_ps(CPUMIPSState *env, uint64_t fdt0,
+ uint64_t fdt1, uint64_t fdt2)
+{
+ uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
+ uint32_t fsth0 = fdt0 >> 32;
+ uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
+ uint32_t fsth1 = fdt1 >> 32;
+ uint32_t fstl2 = fdt2 & 0XFFFFFFFF;
+ uint32_t fsth2 = fdt2 >> 32;
+
+ fstl0 = float32_mul(fstl0, fstl1, &env->active_fpu.fp_status);
+ fstl0 = float32_add(fstl0, fstl2, &env->active_fpu.fp_status);
+ fstl0 = float32_chs(fstl0);
+ fsth0 = float32_mul(fsth0, fsth1, &env->active_fpu.fp_status);
+ fsth0 = float32_add(fsth0, fsth2, &env->active_fpu.fp_status);
+ fsth0 = float32_chs(fsth0);
+
+ update_fcr31(env, GETPC());
+ return ((uint64_t)fsth0 << 32) | fstl0;
+}
+
#define FLOAT_FMADDSUB(name, bits, muladd_arg) \
uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 09/18] target/mips: fpu: Demacro NMSUB.<D|S|PS>
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
` (7 preceding siblings ...)
2020-05-16 17:45 ` [PATCH v3 08/18] target/mips: fpu: Demacro NMADD.<D|S|PS> Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 10/18] target/mips: fpu: Remove now unused UNFUSED_FMA and FLOAT_FMA macros Aleksandar Markovic
` (8 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/fpu_helper.c | 44 +++++++++++++++++++++++++++++++++++++++-
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index d4c065f281..927bac24ac 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -1495,7 +1495,6 @@ uint64_t helper_float_ ## name ## _ps(CPUMIPSState *env, \
update_fcr31(env, GETPC()); \
return ((uint64_t)fsth0 << 32) | fst0; \
}
-FLOAT_FMA(nmsub, float_muladd_negate_result | float_muladd_negate_c)
#undef FLOAT_FMA
uint64_t helper_float_madd_d(CPUMIPSState *env, uint64_t fst0,
@@ -1619,6 +1618,49 @@ uint64_t helper_float_nmadd_ps(CPUMIPSState *env, uint64_t fdt0,
return ((uint64_t)fsth0 << 32) | fstl0;
}
+uint64_t helper_float_nmsub_d(CPUMIPSState *env, uint64_t fst0,
+ uint64_t fst1, uint64_t fst2)
+{
+ fst0 = float64_mul(fst0, fst1, &env->active_fpu.fp_status);
+ fst0 = float64_sub(fst0, fst2, &env->active_fpu.fp_status);
+ fst0 = float64_chs(fst0);
+
+ update_fcr31(env, GETPC());
+ return fst0;
+}
+
+uint32_t helper_float_nmsub_s(CPUMIPSState *env, uint32_t fst0,
+ uint32_t fst1, uint32_t fst2)
+{
+ fst0 = float32_mul(fst0, fst1, &env->active_fpu.fp_status);
+ fst0 = float32_sub(fst0, fst2, &env->active_fpu.fp_status);
+ fst0 = float32_chs(fst0);
+
+ update_fcr31(env, GETPC());
+ return fst0;
+}
+
+uint64_t helper_float_nmsub_ps(CPUMIPSState *env, uint64_t fdt0,
+ uint64_t fdt1, uint64_t fdt2)
+{
+ uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
+ uint32_t fsth0 = fdt0 >> 32;
+ uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
+ uint32_t fsth1 = fdt1 >> 32;
+ uint32_t fstl2 = fdt2 & 0XFFFFFFFF;
+ uint32_t fsth2 = fdt2 >> 32;
+
+ fstl0 = float32_mul(fstl0, fstl1, &env->active_fpu.fp_status);
+ fstl0 = float32_sub(fstl0, fstl2, &env->active_fpu.fp_status);
+ fstl0 = float32_chs(fstl0);
+ fsth0 = float32_mul(fsth0, fsth1, &env->active_fpu.fp_status);
+ fsth0 = float32_sub(fsth0, fsth2, &env->active_fpu.fp_status);
+ fsth0 = float32_chs(fsth0);
+
+ update_fcr31(env, GETPC());
+ return ((uint64_t)fsth0 << 32) | fstl0;
+}
+
#define FLOAT_FMADDSUB(name, bits, muladd_arg) \
uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 10/18] target/mips: fpu: Remove now unused UNFUSED_FMA and FLOAT_FMA macros
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
` (8 preceding siblings ...)
2020-05-16 17:45 ` [PATCH v3 09/18] target/mips: fpu: Demacro NMSUB.<D|S|PS> Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 11/18] target/mips: fpu: Demacro CLASS.<D|S> Aleksandar Markovic
` (7 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
After demacroing <MADD|MSUB|NMADD|NMSUB>.<D|S|PS>, these macros
are not needed anymore.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/fpu_helper.c | 50 ----------------------------------------
1 file changed, 50 deletions(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index 927bac24ac..e8e50e4bc0 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -1446,56 +1446,6 @@ FLOAT_MINMAX(mina_d, 64, minnummag)
#undef FLOAT_MINMAX
/* ternary operations */
-#define UNFUSED_FMA(prefix, a, b, c, flags) \
-{ \
- a = prefix##_mul(a, b, &env->active_fpu.fp_status); \
- if ((flags) & float_muladd_negate_c) { \
- a = prefix##_sub(a, c, &env->active_fpu.fp_status); \
- } else { \
- a = prefix##_add(a, c, &env->active_fpu.fp_status); \
- } \
- if ((flags) & float_muladd_negate_result) { \
- a = prefix##_chs(a); \
- } \
-}
-
-/* FMA based operations */
-#define FLOAT_FMA(name, type) \
-uint64_t helper_float_ ## name ## _d(CPUMIPSState *env, \
- uint64_t fdt0, uint64_t fdt1, \
- uint64_t fdt2) \
-{ \
- UNFUSED_FMA(float64, fdt0, fdt1, fdt2, type); \
- update_fcr31(env, GETPC()); \
- return fdt0; \
-} \
- \
-uint32_t helper_float_ ## name ## _s(CPUMIPSState *env, \
- uint32_t fst0, uint32_t fst1, \
- uint32_t fst2) \
-{ \
- UNFUSED_FMA(float32, fst0, fst1, fst2, type); \
- update_fcr31(env, GETPC()); \
- return fst0; \
-} \
- \
-uint64_t helper_float_ ## name ## _ps(CPUMIPSState *env, \
- uint64_t fdt0, uint64_t fdt1, \
- uint64_t fdt2) \
-{ \
- uint32_t fst0 = fdt0 & 0XFFFFFFFF; \
- uint32_t fsth0 = fdt0 >> 32; \
- uint32_t fst1 = fdt1 & 0XFFFFFFFF; \
- uint32_t fsth1 = fdt1 >> 32; \
- uint32_t fst2 = fdt2 & 0XFFFFFFFF; \
- uint32_t fsth2 = fdt2 >> 32; \
- \
- UNFUSED_FMA(float32, fst0, fst1, fst2, type); \
- UNFUSED_FMA(float32, fsth0, fsth1, fsth2, type); \
- update_fcr31(env, GETPC()); \
- return ((uint64_t)fsth0 << 32) | fst0; \
-}
-#undef FLOAT_FMA
uint64_t helper_float_madd_d(CPUMIPSState *env, uint64_t fst0,
uint64_t fst1, uint64_t fst2)
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 11/18] target/mips: fpu: Demacro CLASS.<D|S>
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
` (9 preceding siblings ...)
2020-05-16 17:45 ` [PATCH v3 10/18] target/mips: fpu: Remove now unused UNFUSED_FMA and FLOAT_FMA macros Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 12/18] target/mips: fpu: Remove now unused FLOAT_CLASS macro Aleksandar Markovic
` (6 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/fpu_helper.c | 70 ++++++++++++++++++++++++++++++++++++++--
1 file changed, 68 insertions(+), 2 deletions(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index e8e50e4bc0..b3903f5357 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -1165,10 +1165,76 @@ uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
return float_ ## name(arg, &env->active_fpu.fp_status); \
}
-FLOAT_CLASS(class_s, 32)
-FLOAT_CLASS(class_d, 64)
#undef FLOAT_CLASS
+uint64_t float_class_d(uint64_t arg, float_status *status)
+{
+ if (float64_is_signaling_nan(arg, status)) {
+ return FLOAT_CLASS_SIGNALING_NAN;
+ } else if (float64_is_quiet_nan(arg, status)) {
+ return FLOAT_CLASS_QUIET_NAN;
+ } else if (float64_is_neg(arg)) {
+ if (float64_is_infinity(arg)) {
+ return FLOAT_CLASS_NEGATIVE_INFINITY;
+ } else if (float64_is_zero(arg)) {
+ return FLOAT_CLASS_NEGATIVE_ZERO;
+ } else if (float64_is_zero_or_denormal(arg)) {
+ return FLOAT_CLASS_NEGATIVE_SUBNORMAL;
+ } else {
+ return FLOAT_CLASS_NEGATIVE_NORMAL;
+ }
+ } else {
+ if (float64_is_infinity(arg)) {
+ return FLOAT_CLASS_POSITIVE_INFINITY;
+ } else if (float64_is_zero(arg)) {
+ return FLOAT_CLASS_POSITIVE_ZERO;
+ } else if (float64_is_zero_or_denormal(arg)) {
+ return FLOAT_CLASS_POSITIVE_SUBNORMAL;
+ } else {
+ return FLOAT_CLASS_POSITIVE_NORMAL;
+ }
+ }
+}
+
+uint64_t helper_float_class_d(CPUMIPSState *env, uint64_t arg)
+{
+ return float_class_d(arg, &env->active_fpu.fp_status);
+}
+
+uint32_t float_class_s(uint32_t arg, float_status *status)
+{
+ if (float32_is_signaling_nan(arg, status)) {
+ return FLOAT_CLASS_SIGNALING_NAN;
+ } else if (float32_is_quiet_nan(arg, status)) {
+ return FLOAT_CLASS_QUIET_NAN;
+ } else if (float32_is_neg(arg)) {
+ if (float32_is_infinity(arg)) {
+ return FLOAT_CLASS_NEGATIVE_INFINITY;
+ } else if (float32_is_zero(arg)) {
+ return FLOAT_CLASS_NEGATIVE_ZERO;
+ } else if (float32_is_zero_or_denormal(arg)) {
+ return FLOAT_CLASS_NEGATIVE_SUBNORMAL;
+ } else {
+ return FLOAT_CLASS_NEGATIVE_NORMAL;
+ }
+ } else {
+ if (float32_is_infinity(arg)) {
+ return FLOAT_CLASS_POSITIVE_INFINITY;
+ } else if (float32_is_zero(arg)) {
+ return FLOAT_CLASS_POSITIVE_ZERO;
+ } else if (float32_is_zero_or_denormal(arg)) {
+ return FLOAT_CLASS_POSITIVE_SUBNORMAL;
+ } else {
+ return FLOAT_CLASS_POSITIVE_NORMAL;
+ }
+ }
+}
+
+uint32_t helper_float_class_s(CPUMIPSState *env, uint32_t arg)
+{
+ return float_class_s(arg, &env->active_fpu.fp_status);
+}
+
/* binary operations */
uint64_t helper_float_add_d(CPUMIPSState *env,
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 12/18] target/mips: fpu: Remove now unused FLOAT_CLASS macro
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
` (10 preceding siblings ...)
2020-05-16 17:45 ` [PATCH v3 11/18] target/mips: fpu: Demacro CLASS.<D|S> Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 13/18] target/mips: fpu: Demacro RINT.<D|S> Aleksandar Markovic
` (5 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
After demacroing CLASS.<D|S>, this macro is not needed anymore.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/fpu_helper.c | 39 ---------------------------------------
1 file changed, 39 deletions(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index b3903f5357..e227e53f70 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -1128,45 +1128,6 @@ FLOAT_RINT(rint_d, 64)
#define FLOAT_CLASS_POSITIVE_SUBNORMAL 0x100
#define FLOAT_CLASS_POSITIVE_ZERO 0x200
-#define FLOAT_CLASS(name, bits) \
-uint ## bits ## _t float_ ## name(uint ## bits ## _t arg, \
- float_status *status) \
-{ \
- if (float ## bits ## _is_signaling_nan(arg, status)) { \
- return FLOAT_CLASS_SIGNALING_NAN; \
- } else if (float ## bits ## _is_quiet_nan(arg, status)) { \
- return FLOAT_CLASS_QUIET_NAN; \
- } else if (float ## bits ## _is_neg(arg)) { \
- if (float ## bits ## _is_infinity(arg)) { \
- return FLOAT_CLASS_NEGATIVE_INFINITY; \
- } else if (float ## bits ## _is_zero(arg)) { \
- return FLOAT_CLASS_NEGATIVE_ZERO; \
- } else if (float ## bits ## _is_zero_or_denormal(arg)) { \
- return FLOAT_CLASS_NEGATIVE_SUBNORMAL; \
- } else { \
- return FLOAT_CLASS_NEGATIVE_NORMAL; \
- } \
- } else { \
- if (float ## bits ## _is_infinity(arg)) { \
- return FLOAT_CLASS_POSITIVE_INFINITY; \
- } else if (float ## bits ## _is_zero(arg)) { \
- return FLOAT_CLASS_POSITIVE_ZERO; \
- } else if (float ## bits ## _is_zero_or_denormal(arg)) { \
- return FLOAT_CLASS_POSITIVE_SUBNORMAL; \
- } else { \
- return FLOAT_CLASS_POSITIVE_NORMAL; \
- } \
- } \
-} \
- \
-uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
- uint ## bits ## _t arg) \
-{ \
- return float_ ## name(arg, &env->active_fpu.fp_status); \
-}
-
-#undef FLOAT_CLASS
-
uint64_t float_class_d(uint64_t arg, float_status *status)
{
if (float64_is_signaling_nan(arg, status)) {
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 13/18] target/mips: fpu: Demacro RINT.<D|S>
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
` (11 preceding siblings ...)
2020-05-16 17:45 ` [PATCH v3 12/18] target/mips: fpu: Remove now unused FLOAT_CLASS macro Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 14/18] target/mips: fpu: Remove now unused FLOAT_RINT macro Aleksandar Markovic
` (4 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/fpu_helper.c | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index e227e53f70..dae1331f23 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -1113,10 +1113,26 @@ uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
return fdret; \
}
-FLOAT_RINT(rint_s, 32)
-FLOAT_RINT(rint_d, 64)
#undef FLOAT_RINT
+uint64_t helper_float_rint_d(CPUMIPSState *env, uint64_t fs)
+{
+ uint64_t fdret;
+
+ fdret = float64_round_to_int(fs, &env->active_fpu.fp_status);
+ update_fcr31(env, GETPC());
+ return fdret;
+}
+
+uint32_t helper_float_rint_s(CPUMIPSState *env, uint32_t fs)
+{
+ uint32_t fdret;
+
+ fdret = float32_round_to_int(fs, &env->active_fpu.fp_status);
+ update_fcr31(env, GETPC());
+ return fdret;
+}
+
#define FLOAT_CLASS_SIGNALING_NAN 0x001
#define FLOAT_CLASS_QUIET_NAN 0x002
#define FLOAT_CLASS_NEGATIVE_INFINITY 0x004
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 14/18] target/mips: fpu: Remove now unused FLOAT_RINT macro
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
` (12 preceding siblings ...)
2020-05-16 17:45 ` [PATCH v3 13/18] target/mips: fpu: Demacro RINT.<D|S> Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 15/18] target/mips: fpu: Name better paired-single variables Aleksandar Markovic
` (3 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
After demacroing RINT.<D|S>, this macro is not needed anymore.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/fpu_helper.c | 13 -------------
1 file changed, 13 deletions(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index dae1331f23..56ba49104e 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -1102,19 +1102,6 @@ uint64_t helper_float_rsqrt1_ps(CPUMIPSState *env, uint64_t fdt0)
return ((uint64_t)fsth2 << 32) | fst2;
}
-#define FLOAT_RINT(name, bits) \
-uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
- uint ## bits ## _t fs) \
-{ \
- uint ## bits ## _t fdret; \
- \
- fdret = float ## bits ## _round_to_int(fs, &env->active_fpu.fp_status); \
- update_fcr31(env, GETPC()); \
- return fdret; \
-}
-
-#undef FLOAT_RINT
-
uint64_t helper_float_rint_d(CPUMIPSState *env, uint64_t fs)
{
uint64_t fdret;
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 15/18] target/mips: fpu: Name better paired-single variables
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
` (13 preceding siblings ...)
2020-05-16 17:45 ` [PATCH v3 14/18] target/mips: fpu: Remove now unused FLOAT_RINT macro Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 16/18] target/mips: fpu: Refactor conversion from ieee to mips exception flags Aleksandar Markovic
` (2 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
Use consistently 'l' and 'h' for low and high halves.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/fpu_helper.c | 62 ++++++++++++++++++++--------------------
1 file changed, 31 insertions(+), 31 deletions(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index 56ba49104e..dbb8ca5692 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -1059,14 +1059,14 @@ uint32_t helper_float_recip1_s(CPUMIPSState *env, uint32_t fst0)
uint64_t helper_float_recip1_ps(CPUMIPSState *env, uint64_t fdt0)
{
- uint32_t fst2;
+ uint32_t fstl2;
uint32_t fsth2;
- fst2 = float32_div(float32_one, fdt0 & 0XFFFFFFFF,
- &env->active_fpu.fp_status);
+ fstl2 = float32_div(float32_one, fdt0 & 0XFFFFFFFF,
+ &env->active_fpu.fp_status);
fsth2 = float32_div(float32_one, fdt0 >> 32, &env->active_fpu.fp_status);
update_fcr31(env, GETPC());
- return ((uint64_t)fsth2 << 32) | fst2;
+ return ((uint64_t)fsth2 << 32) | fstl2;
}
uint64_t helper_float_rsqrt1_d(CPUMIPSState *env, uint64_t fdt0)
@@ -1091,15 +1091,15 @@ uint32_t helper_float_rsqrt1_s(CPUMIPSState *env, uint32_t fst0)
uint64_t helper_float_rsqrt1_ps(CPUMIPSState *env, uint64_t fdt0)
{
- uint32_t fst2;
+ uint32_t fstl2;
uint32_t fsth2;
- fst2 = float32_sqrt(fdt0 & 0XFFFFFFFF, &env->active_fpu.fp_status);
+ fstl2 = float32_sqrt(fdt0 & 0XFFFFFFFF, &env->active_fpu.fp_status);
fsth2 = float32_sqrt(fdt0 >> 32, &env->active_fpu.fp_status);
- fst2 = float32_div(float32_one, fst2, &env->active_fpu.fp_status);
+ fstl2 = float32_div(float32_one, fstl2, &env->active_fpu.fp_status);
fsth2 = float32_div(float32_one, fsth2, &env->active_fpu.fp_status);
update_fcr31(env, GETPC());
- return ((uint64_t)fsth2 << 32) | fst2;
+ return ((uint64_t)fsth2 << 32) | fstl2;
}
uint64_t helper_float_rint_d(CPUMIPSState *env, uint64_t fs)
@@ -1367,19 +1367,19 @@ uint32_t helper_float_recip2_s(CPUMIPSState *env, uint32_t fst0, uint32_t fst2)
uint64_t helper_float_recip2_ps(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt2)
{
- uint32_t fst0 = fdt0 & 0XFFFFFFFF;
+ uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
uint32_t fsth0 = fdt0 >> 32;
- uint32_t fst2 = fdt2 & 0XFFFFFFFF;
+ uint32_t fstl2 = fdt2 & 0XFFFFFFFF;
uint32_t fsth2 = fdt2 >> 32;
- fst2 = float32_mul(fst0, fst2, &env->active_fpu.fp_status);
+ fstl2 = float32_mul(fstl0, fstl2, &env->active_fpu.fp_status);
fsth2 = float32_mul(fsth0, fsth2, &env->active_fpu.fp_status);
- fst2 = float32_chs(float32_sub(fst2, float32_one,
+ fstl2 = float32_chs(float32_sub(fstl2, float32_one,
&env->active_fpu.fp_status));
fsth2 = float32_chs(float32_sub(fsth2, float32_one,
&env->active_fpu.fp_status));
update_fcr31(env, GETPC());
- return ((uint64_t)fsth2 << 32) | fst2;
+ return ((uint64_t)fsth2 << 32) | fstl2;
}
uint64_t helper_float_rsqrt2_d(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt2)
@@ -1404,51 +1404,51 @@ uint32_t helper_float_rsqrt2_s(CPUMIPSState *env, uint32_t fst0, uint32_t fst2)
uint64_t helper_float_rsqrt2_ps(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt2)
{
- uint32_t fst0 = fdt0 & 0XFFFFFFFF;
+ uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
uint32_t fsth0 = fdt0 >> 32;
- uint32_t fst2 = fdt2 & 0XFFFFFFFF;
+ uint32_t fstl2 = fdt2 & 0XFFFFFFFF;
uint32_t fsth2 = fdt2 >> 32;
- fst2 = float32_mul(fst0, fst2, &env->active_fpu.fp_status);
+ fstl2 = float32_mul(fstl0, fstl2, &env->active_fpu.fp_status);
fsth2 = float32_mul(fsth0, fsth2, &env->active_fpu.fp_status);
- fst2 = float32_sub(fst2, float32_one, &env->active_fpu.fp_status);
+ fstl2 = float32_sub(fstl2, float32_one, &env->active_fpu.fp_status);
fsth2 = float32_sub(fsth2, float32_one, &env->active_fpu.fp_status);
- fst2 = float32_chs(float32_div(fst2, FLOAT_TWO32,
+ fstl2 = float32_chs(float32_div(fstl2, FLOAT_TWO32,
&env->active_fpu.fp_status));
fsth2 = float32_chs(float32_div(fsth2, FLOAT_TWO32,
&env->active_fpu.fp_status));
update_fcr31(env, GETPC());
- return ((uint64_t)fsth2 << 32) | fst2;
+ return ((uint64_t)fsth2 << 32) | fstl2;
}
uint64_t helper_float_addr_ps(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt1)
{
- uint32_t fst0 = fdt0 & 0XFFFFFFFF;
+ uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
uint32_t fsth0 = fdt0 >> 32;
- uint32_t fst1 = fdt1 & 0XFFFFFFFF;
+ uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
uint32_t fsth1 = fdt1 >> 32;
- uint32_t fst2;
+ uint32_t fstl2;
uint32_t fsth2;
- fst2 = float32_add(fst0, fsth0, &env->active_fpu.fp_status);
- fsth2 = float32_add(fst1, fsth1, &env->active_fpu.fp_status);
+ fstl2 = float32_add(fstl0, fsth0, &env->active_fpu.fp_status);
+ fsth2 = float32_add(fstl1, fsth1, &env->active_fpu.fp_status);
update_fcr31(env, GETPC());
- return ((uint64_t)fsth2 << 32) | fst2;
+ return ((uint64_t)fsth2 << 32) | fstl2;
}
uint64_t helper_float_mulr_ps(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt1)
{
- uint32_t fst0 = fdt0 & 0XFFFFFFFF;
+ uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
uint32_t fsth0 = fdt0 >> 32;
- uint32_t fst1 = fdt1 & 0XFFFFFFFF;
+ uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
uint32_t fsth1 = fdt1 >> 32;
- uint32_t fst2;
+ uint32_t fstl2;
uint32_t fsth2;
- fst2 = float32_mul(fst0, fsth0, &env->active_fpu.fp_status);
- fsth2 = float32_mul(fst1, fsth1, &env->active_fpu.fp_status);
+ fstl2 = float32_mul(fstl0, fsth0, &env->active_fpu.fp_status);
+ fsth2 = float32_mul(fstl1, fsth1, &env->active_fpu.fp_status);
update_fcr31(env, GETPC());
- return ((uint64_t)fsth2 << 32) | fst2;
+ return ((uint64_t)fsth2 << 32) | fstl2;
}
#define FLOAT_MINMAX(name, bits, minmaxfunc) \
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 16/18] target/mips: fpu: Refactor conversion from ieee to mips exception flags
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
` (14 preceding siblings ...)
2020-05-16 17:45 ` [PATCH v3 15/18] target/mips: fpu: Name better paired-single variables Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 17/18] hw/mips: Add some logging for bad register offset cases Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 18/18] MAINTAINERS: Change Aleksandar Rikalo's email address Aleksandar Markovic
17 siblings, 0 replies; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
The original coversion function is used for regular and MSA floating
point instructions handling. Since there are some nuanced differences
between regular and MSA floatin point excetion handling, provide two
instances of the conversion function, rather than just a common one.
Inline both of these function instances for the sake of performance.
Improve variable naming in surrounding code for clarity.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/fpu_helper.c | 55 +++++++++++++++-------------
target/mips/internal.h | 1 -
target/mips/msa_helper.c | 77 +++++++++++++++++++++++++++-------------
3 files changed, 82 insertions(+), 51 deletions(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index dbb8ca5692..7a3a61cab3 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -189,43 +189,48 @@ void helper_ctc1(CPUMIPSState *env, target_ulong arg1, uint32_t fs, uint32_t rt)
}
}
-int ieee_ex_to_mips(int xcpt)
+static inline int ieee_to_mips_xcpt(int ieee_xcpt)
{
- int ret = 0;
- if (xcpt) {
- if (xcpt & float_flag_invalid) {
- ret |= FP_INVALID;
- }
- if (xcpt & float_flag_overflow) {
- ret |= FP_OVERFLOW;
- }
- if (xcpt & float_flag_underflow) {
- ret |= FP_UNDERFLOW;
- }
- if (xcpt & float_flag_divbyzero) {
- ret |= FP_DIV0;
- }
- if (xcpt & float_flag_inexact) {
- ret |= FP_INEXACT;
- }
+ int mips_xcpt = 0;
+
+ if (ieee_xcpt & float_flag_invalid) {
+ mips_xcpt |= FP_INVALID;
+ }
+ if (ieee_xcpt & float_flag_overflow) {
+ mips_xcpt |= FP_OVERFLOW;
}
- return ret;
+ if (ieee_xcpt & float_flag_underflow) {
+ mips_xcpt |= FP_UNDERFLOW;
+ }
+ if (ieee_xcpt & float_flag_divbyzero) {
+ mips_xcpt |= FP_DIV0;
+ }
+ if (ieee_xcpt & float_flag_inexact) {
+ mips_xcpt |= FP_INEXACT;
+ }
+
+ return mips_xcpt;
}
static inline void update_fcr31(CPUMIPSState *env, uintptr_t pc)
{
- int tmp = ieee_ex_to_mips(get_float_exception_flags(
- &env->active_fpu.fp_status));
+ int ieee_exception_flags = get_float_exception_flags(
+ &env->active_fpu.fp_status);
+ int mips_exception_flags = 0;
+
+ if (ieee_exception_flags) {
+ mips_exception_flags = ieee_to_mips_xcpt(ieee_exception_flags);
+ }
- SET_FP_CAUSE(env->active_fpu.fcr31, tmp);
+ SET_FP_CAUSE(env->active_fpu.fcr31, mips_exception_flags);
- if (tmp) {
+ if (mips_exception_flags) {
set_float_exception_flags(0, &env->active_fpu.fp_status);
- if (GET_FP_ENABLE(env->active_fpu.fcr31) & tmp) {
+ if (GET_FP_ENABLE(env->active_fpu.fcr31) & mips_exception_flags) {
do_raise_exception(env, EXCP_FPE, pc);
} else {
- UPDATE_FP_FLAGS(env->active_fpu.fcr31, tmp);
+ UPDATE_FP_FLAGS(env->active_fpu.fcr31, mips_exception_flags);
}
}
}
diff --git a/target/mips/internal.h b/target/mips/internal.h
index 1bf274b3ef..684356e309 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -224,7 +224,6 @@ uint32_t float_class_s(uint32_t arg, float_status *fst);
uint64_t float_class_d(uint64_t arg, float_status *fst);
extern unsigned int ieee_rm[];
-int ieee_ex_to_mips(int xcpt);
void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask);
static inline void restore_rounding_mode(CPUMIPSState *env)
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index 4065cfe4f7..c520405929 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -5419,54 +5419,81 @@ static inline void check_msacsr_cause(CPUMIPSState *env, uintptr_t retaddr)
#define CLEAR_IS_INEXACT 2
#define RECIPROCAL_INEXACT 4
-static inline int update_msacsr(CPUMIPSState *env, int action, int denormal)
+
+static inline int ieee_to_mips_xcpt_msa(int ieee_xcpt)
{
- int ieee_ex;
+ int mips_xcpt = 0;
- int c;
+ if (ieee_xcpt & float_flag_invalid) {
+ mips_xcpt |= FP_INVALID;
+ }
+ if (ieee_xcpt & float_flag_overflow) {
+ mips_xcpt |= FP_OVERFLOW;
+ }
+ if (ieee_xcpt & float_flag_underflow) {
+ mips_xcpt |= FP_UNDERFLOW;
+ }
+ if (ieee_xcpt & float_flag_divbyzero) {
+ mips_xcpt |= FP_DIV0;
+ }
+ if (ieee_xcpt & float_flag_inexact) {
+ mips_xcpt |= FP_INEXACT;
+ }
+
+ return mips_xcpt;
+}
+
+static inline int update_msacsr(CPUMIPSState *env, int action, int denormal)
+{
+ int ieee_exception_flags;
+ int mips_exception_flags = 0;
int cause;
int enable;
- ieee_ex = get_float_exception_flags(&env->active_tc.msa_fp_status);
+ ieee_exception_flags = get_float_exception_flags(
+ &env->active_tc.msa_fp_status);
/* QEMU softfloat does not signal all underflow cases */
if (denormal) {
- ieee_ex |= float_flag_underflow;
+ ieee_exception_flags |= float_flag_underflow;
+ }
+ if (ieee_exception_flags) {
+ mips_exception_flags = ieee_to_mips_xcpt_msa(ieee_exception_flags);
}
-
- c = ieee_ex_to_mips(ieee_ex);
enable = GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED;
/* Set Inexact (I) when flushing inputs to zero */
- if ((ieee_ex & float_flag_input_denormal) &&
+ if ((ieee_exception_flags & float_flag_input_denormal) &&
(env->active_tc.msacsr & MSACSR_FS_MASK) != 0) {
if (action & CLEAR_IS_INEXACT) {
- c &= ~FP_INEXACT;
+ mips_exception_flags &= ~FP_INEXACT;
} else {
- c |= FP_INEXACT;
+ mips_exception_flags |= FP_INEXACT;
}
}
/* Set Inexact (I) and Underflow (U) when flushing outputs to zero */
- if ((ieee_ex & float_flag_output_denormal) &&
+ if ((ieee_exception_flags & float_flag_output_denormal) &&
(env->active_tc.msacsr & MSACSR_FS_MASK) != 0) {
- c |= FP_INEXACT;
+ mips_exception_flags |= FP_INEXACT;
if (action & CLEAR_FS_UNDERFLOW) {
- c &= ~FP_UNDERFLOW;
+ mips_exception_flags &= ~FP_UNDERFLOW;
} else {
- c |= FP_UNDERFLOW;
+ mips_exception_flags |= FP_UNDERFLOW;
}
}
/* Set Inexact (I) when Overflow (O) is not enabled */
- if ((c & FP_OVERFLOW) != 0 && (enable & FP_OVERFLOW) == 0) {
- c |= FP_INEXACT;
+ if ((mips_exception_flags & FP_OVERFLOW) != 0 &&
+ (enable & FP_OVERFLOW) == 0) {
+ mips_exception_flags |= FP_INEXACT;
}
/* Clear Exact Underflow when Underflow (U) is not enabled */
- if ((c & FP_UNDERFLOW) != 0 && (enable & FP_UNDERFLOW) == 0 &&
- (c & FP_INEXACT) == 0) {
- c &= ~FP_UNDERFLOW;
+ if ((mips_exception_flags & FP_UNDERFLOW) != 0 &&
+ (enable & FP_UNDERFLOW) == 0 &&
+ (mips_exception_flags & FP_INEXACT) == 0) {
+ mips_exception_flags &= ~FP_UNDERFLOW;
}
/*
@@ -5474,11 +5501,11 @@ static inline int update_msacsr(CPUMIPSState *env, int action, int denormal)
* divide by zero
*/
if ((action & RECIPROCAL_INEXACT) &&
- (c & (FP_INVALID | FP_DIV0)) == 0) {
- c = FP_INEXACT;
+ (mips_exception_flags & (FP_INVALID | FP_DIV0)) == 0) {
+ mips_exception_flags = FP_INEXACT;
}
- cause = c & enable; /* all current enabled exceptions */
+ cause = mips_exception_flags & enable; /* all current enabled exceptions */
if (cause == 0) {
/*
@@ -5486,7 +5513,7 @@ static inline int update_msacsr(CPUMIPSState *env, int action, int denormal)
* with all current exceptions
*/
SET_FP_CAUSE(env->active_tc.msacsr,
- (GET_FP_CAUSE(env->active_tc.msacsr) | c));
+ (GET_FP_CAUSE(env->active_tc.msacsr) | mips_exception_flags));
} else {
/* Current exceptions are enabled */
if ((env->active_tc.msacsr & MSACSR_NX_MASK) == 0) {
@@ -5495,11 +5522,11 @@ static inline int update_msacsr(CPUMIPSState *env, int action, int denormal)
* with all enabled exceptions
*/
SET_FP_CAUSE(env->active_tc.msacsr,
- (GET_FP_CAUSE(env->active_tc.msacsr) | c));
+ (GET_FP_CAUSE(env->active_tc.msacsr) | mips_exception_flags));
}
}
- return c;
+ return mips_exception_flags;
}
static inline int get_enabled_exceptions(const CPUMIPSState *env, int c)
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 17/18] hw/mips: Add some logging for bad register offset cases
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
` (15 preceding siblings ...)
2020-05-16 17:45 ` [PATCH v3 16/18] target/mips: fpu: Refactor conversion from ieee to mips exception flags Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 18:54 ` Philippe Mathieu-Daudé
2020-05-16 17:45 ` [PATCH v3 18/18] MAINTAINERS: Change Aleksandar Rikalo's email address Aleksandar Markovic
17 siblings, 1 reply; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel
Cc: aleksandar.rikalo, Aleksandar Markovic,
Philippe Mathieu-Daudé
Log the cases where a guest attempts read or write using bad
register offset.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
CC: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/mips/mips_malta.c | 14 ++++++--------
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index e4c4de1b4e..88869b828e 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -427,10 +427,9 @@ static uint64_t malta_fpga_read(void *opaque, hwaddr addr,
break;
default:
-#if 0
- printf("malta_fpga_read: Bad register offset 0x" TARGET_FMT_lx "\n",
- addr);
-#endif
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "malta_fpga_read: Bad register offset 0x"
+ TARGET_FMT_lx "\n", addr);
break;
}
return val;
@@ -515,10 +514,9 @@ static void malta_fpga_write(void *opaque, hwaddr addr,
break;
default:
-#if 0
- printf("malta_fpga_write: Bad register offset 0x" TARGET_FMT_lx "\n",
- addr);
-#endif
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "malta_fpga_write: Bad register offset 0x"
+ TARGET_FMT_lx "\n", addr);
break;
}
}
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 18/18] MAINTAINERS: Change Aleksandar Rikalo's email address
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
` (16 preceding siblings ...)
2020-05-16 17:45 ` [PATCH v3 17/18] hw/mips: Add some logging for bad register offset cases Aleksandar Markovic
@ 2020-05-16 17:45 ` Aleksandar Markovic
2020-05-16 18:55 ` Philippe Mathieu-Daudé
17 siblings, 1 reply; 21+ messages in thread
From: Aleksandar Markovic @ 2020-05-16 17:45 UTC (permalink / raw
To: qemu-devel; +Cc: aleksandar.rikalo, Aleksandar Markovic
Aleksandar Rikalo want to use a different email address
from now on.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
.mailmap | 3 ++-
MAINTAINERS | 12 ++++++------
2 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/.mailmap b/.mailmap
index 6412067bde..e3628c7a66 100644
--- a/.mailmap
+++ b/.mailmap
@@ -42,7 +42,8 @@ Justin Terry (VM) <juterry@microsoft.com> Justin Terry (VM) via Qemu-devel <qemu
Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> <aleksandar.markovic@mips.com>
Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> <aleksandar.markovic@imgtec.com>
Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> <amarkovic@wavecomp.com>
-Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com> <arikalo@wavecomp.com>
+Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> <arikalo@wavecomp.com>
+Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> <aleksandar.rikalo@rt-rk.com>
Anthony Liguori <anthony@codemonkey.ws> Anthony Liguori <aliguori@us.ibm.com>
James Hogan <jhogan@kernel.org> <james.hogan@imgtec.com>
Leif Lindholm <leif@nuviainc.com> <leif.lindholm@linaro.org>
diff --git a/MAINTAINERS b/MAINTAINERS
index 1f84e3ae2c..8d5562c5c7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -212,7 +212,7 @@ F: disas/microblaze.c
MIPS TCG CPUs
M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
R: Aurelien Jarno <aurelien@aurel32.net>
-R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
+R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
S: Maintained
F: target/mips/
F: default-configs/*mips*
@@ -1041,7 +1041,7 @@ MIPS Machines
-------------
Jazz
M: Hervé Poussineau <hpoussin@reactos.org>
-R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
+R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
S: Maintained
F: hw/mips/mips_jazz.c
F: hw/display/jazz_led.c
@@ -1062,7 +1062,7 @@ F: tests/acceptance/machine_mips_malta.py
Mipssim
M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
-R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
+R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
S: Odd Fixes
F: hw/mips/mips_mipssim.c
F: hw/net/mipsnet.c
@@ -1070,7 +1070,7 @@ F: hw/net/mipsnet.c
R4000
M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
R: Aurelien Jarno <aurelien@aurel32.net>
-R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
+R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
S: Obsolete
F: hw/mips/mips_r4k.c
@@ -1085,7 +1085,7 @@ F: include/hw/isa/vt82c686.h
Boston
M: Paul Burton <pburton@wavecomp.com>
-R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
+R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
S: Maintained
F: hw/core/loader-fit.c
F: hw/mips/boston.c
@@ -2582,7 +2582,7 @@ F: disas/i386.c
MIPS TCG target
M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
R: Aurelien Jarno <aurelien@aurel32.net>
-R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
+R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
S: Maintained
F: tcg/mips/
--
2.20.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v3 17/18] hw/mips: Add some logging for bad register offset cases
2020-05-16 17:45 ` [PATCH v3 17/18] hw/mips: Add some logging for bad register offset cases Aleksandar Markovic
@ 2020-05-16 18:54 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 21+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-16 18:54 UTC (permalink / raw
To: Aleksandar Markovic, qemu-devel; +Cc: aleksandar.rikalo
On 5/16/20 7:45 PM, Aleksandar Markovic wrote:
> Log the cases where a guest attempts read or write using bad
> register offset.
>
> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
> CC: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> hw/mips/mips_malta.c | 14 ++++++--------
> 1 file changed, 6 insertions(+), 8 deletions(-)
>
> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> index e4c4de1b4e..88869b828e 100644
> --- a/hw/mips/mips_malta.c
> +++ b/hw/mips/mips_malta.c
> @@ -427,10 +427,9 @@ static uint64_t malta_fpga_read(void *opaque, hwaddr addr,
> break;
>
> default:
> -#if 0
> - printf("malta_fpga_read: Bad register offset 0x" TARGET_FMT_lx "\n",
> - addr);
> -#endif
> + qemu_log_mask(LOG_GUEST_ERROR,
> + "malta_fpga_read: Bad register offset 0x"
> + TARGET_FMT_lx "\n", addr);
> break;
> }
> return val;
> @@ -515,10 +514,9 @@ static void malta_fpga_write(void *opaque, hwaddr addr,
> break;
>
> default:
> -#if 0
> - printf("malta_fpga_write: Bad register offset 0x" TARGET_FMT_lx "\n",
> - addr);
> -#endif
> + qemu_log_mask(LOG_GUEST_ERROR,
> + "malta_fpga_write: Bad register offset 0x"
> + TARGET_FMT_lx "\n", addr);
> break;
> }
> }
>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 18/18] MAINTAINERS: Change Aleksandar Rikalo's email address
2020-05-16 17:45 ` [PATCH v3 18/18] MAINTAINERS: Change Aleksandar Rikalo's email address Aleksandar Markovic
@ 2020-05-16 18:55 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 21+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-16 18:55 UTC (permalink / raw
To: Aleksandar Markovic, qemu-devel; +Cc: Aleksandar Rikalo
On 5/16/20 7:45 PM, Aleksandar Markovic wrote:
> Aleksandar Rikalo want to use a different email address
"wants"?
> from now on.
>
> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
> ---
> .mailmap | 3 ++-
> MAINTAINERS | 12 ++++++------
> 2 files changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/.mailmap b/.mailmap
> index 6412067bde..e3628c7a66 100644
> --- a/.mailmap
> +++ b/.mailmap
> @@ -42,7 +42,8 @@ Justin Terry (VM) <juterry@microsoft.com> Justin Terry (VM) via Qemu-devel <qemu
> Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> <aleksandar.markovic@mips.com>
> Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> <aleksandar.markovic@imgtec.com>
> Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> <amarkovic@wavecomp.com>
> -Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com> <arikalo@wavecomp.com>
> +Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> <arikalo@wavecomp.com>
> +Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> <aleksandar.rikalo@rt-rk.com>
> Anthony Liguori <anthony@codemonkey.ws> Anthony Liguori <aliguori@us.ibm.com>
> James Hogan <jhogan@kernel.org> <james.hogan@imgtec.com>
> Leif Lindholm <leif@nuviainc.com> <leif.lindholm@linaro.org>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 1f84e3ae2c..8d5562c5c7 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -212,7 +212,7 @@ F: disas/microblaze.c
> MIPS TCG CPUs
> M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
> R: Aurelien Jarno <aurelien@aurel32.net>
> -R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
> +R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
> S: Maintained
> F: target/mips/
> F: default-configs/*mips*
> @@ -1041,7 +1041,7 @@ MIPS Machines
> -------------
> Jazz
> M: Hervé Poussineau <hpoussin@reactos.org>
> -R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
> +R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
> S: Maintained
> F: hw/mips/mips_jazz.c
> F: hw/display/jazz_led.c
> @@ -1062,7 +1062,7 @@ F: tests/acceptance/machine_mips_malta.py
>
> Mipssim
> M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
> -R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
> +R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
> S: Odd Fixes
> F: hw/mips/mips_mipssim.c
> F: hw/net/mipsnet.c
> @@ -1070,7 +1070,7 @@ F: hw/net/mipsnet.c
> R4000
> M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
> R: Aurelien Jarno <aurelien@aurel32.net>
> -R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
> +R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
> S: Obsolete
> F: hw/mips/mips_r4k.c
>
> @@ -1085,7 +1085,7 @@ F: include/hw/isa/vt82c686.h
>
> Boston
> M: Paul Burton <pburton@wavecomp.com>
> -R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
> +R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
> S: Maintained
> F: hw/core/loader-fit.c
> F: hw/mips/boston.c
> @@ -2582,7 +2582,7 @@ F: disas/i386.c
> MIPS TCG target
> M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
> R: Aurelien Jarno <aurelien@aurel32.net>
> -R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
> +R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
> S: Maintained
> F: tcg/mips/
>
>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2020-05-16 18:56 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-05-16 17:45 [PATCH v3 00/18] target/mips: FPU and other cleanups and improvements Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 01/18] target/mips: fpu: Demacro ADD.<D|S|PS> Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 02/18] target/mips: fpu: Demacro SUB.<D|S|PS> Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 03/18] target/mips: fpu: Demacro MUL.<D|S|PS> Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 04/18] target/mips: fpu: Demacro DIV.<D|S|PS> Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 05/18] target/mips: fpu: Remove now unused macro FLOAT_BINOP Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 06/18] target/mips: fpu: Demacro MADD.<D|S|PS> Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 07/18] target/mips: fpu: Demacro MSUB.<D|S|PS> Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 08/18] target/mips: fpu: Demacro NMADD.<D|S|PS> Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 09/18] target/mips: fpu: Demacro NMSUB.<D|S|PS> Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 10/18] target/mips: fpu: Remove now unused UNFUSED_FMA and FLOAT_FMA macros Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 11/18] target/mips: fpu: Demacro CLASS.<D|S> Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 12/18] target/mips: fpu: Remove now unused FLOAT_CLASS macro Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 13/18] target/mips: fpu: Demacro RINT.<D|S> Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 14/18] target/mips: fpu: Remove now unused FLOAT_RINT macro Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 15/18] target/mips: fpu: Name better paired-single variables Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 16/18] target/mips: fpu: Refactor conversion from ieee to mips exception flags Aleksandar Markovic
2020-05-16 17:45 ` [PATCH v3 17/18] hw/mips: Add some logging for bad register offset cases Aleksandar Markovic
2020-05-16 18:54 ` Philippe Mathieu-Daudé
2020-05-16 17:45 ` [PATCH v3 18/18] MAINTAINERS: Change Aleksandar Rikalo's email address Aleksandar Markovic
2020-05-16 18:55 ` Philippe Mathieu-Daudé
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