From: Mauro Rossi <issor.oruam@gmail.com>
To: amd-gfx@lists.freedesktop.org
Cc: alexander.deucher@amd.com, Mauro Rossi <issor.oruam@gmail.com>,
harry.wentland@amd.com
Subject: [PATCH v3 19/27] drm/amdgpu: add some required DCE6 registers (v7)
Date: Thu, 16 Jul 2020 23:22:43 +0200 [thread overview]
Message-ID: <20200716212251.1539094-20-issor.oruam@gmail.com> (raw)
In-Reply-To: <20200716212251.1539094-1-issor.oruam@gmail.com>
v7: add SCL_HORZ_FILTER_INIT regs
---
.../gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h | 16 ++++++++++++++++
.../amd/include/asic_reg/dce/dce_6_0_sh_mask.h | 12 ++++++++++++
2 files changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h
index 74897b046006..9de01ae574c0 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h
@@ -4514,4 +4514,20 @@
#define mmLB4_VBLANK_STATUS 0x46EF
#define mmLB5_VBLANK_STATUS 0x49EF
+#define mmSCL_HORZ_FILTER_INIT_RGB_LUMA 0x1B4C
+#define mmSCL0_SCL_HORZ_FILTER_INIT_RGB_LUMA 0x1B4C
+#define mmSCL1_SCL_HORZ_FILTER_INIT_RGB_LUMA 0x1E4C
+#define mmSCL2_SCL_HORZ_FILTER_INIT_RGB_LUMA 0x414C
+#define mmSCL3_SCL_HORZ_FILTER_INIT_RGB_LUMA 0x444C
+#define mmSCL4_SCL_HORZ_FILTER_INIT_RGB_LUMA 0x474C
+#define mmSCL5_SCL_HORZ_FILTER_INIT_RGB_LUMA 0x4A4C
+
+#define mmSCL_HORZ_FILTER_INIT_CHROMA 0x1B4D
+#define mmSCL0_SCL_HORZ_FILTER_INIT_CHROMA 0x1B4D
+#define mmSCL1_SCL_HORZ_FILTER_INIT_CHROMA 0x1E4D
+#define mmSCL2_SCL_HORZ_FILTER_INIT_CHROMA 0x414D
+#define mmSCL3_SCL_HORZ_FILTER_INIT_CHROMA 0x444D
+#define mmSCL4_SCL_HORZ_FILTER_INIT_CHROMA 0x474D
+#define mmSCL5_SCL_HORZ_FILTER_INIT_CHROMA 0x4A4D
+
#endif
diff --git a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h
index bf262460b0b9..41c4a46ce357 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h
@@ -9926,5 +9926,17 @@
#define VBLANK_STATUS__VBLANK_INTERRUPT_TYPE_MASK 0x00020000L
#define VBLANK_STATUS__VBLANK_INTERRUPT_TYPE__SHIFT 0x00000011
+// SCL_HORZ_FILTER_INIT_RGB_LUMA
+#define SCL_HORZ_FILTER_INIT_RGB_LUMA__SCL_H_INIT_FRAC_RGB_Y_MASK 0x0000ffffL
+#define SCL_HORZ_FILTER_INIT_RGB_LUMA__SCL_H_INIT_FRAC_RGB_Y__SHIFT 0x00000000
+#define SCL_HORZ_FILTER_INIT_RGB_LUMA__SCL_H_INIT_INT_RGB_Y_MASK 0x000f0000L
+#define SCL_HORZ_FILTER_INIT_RGB_LUMA__SCL_H_INIT_INT_RGB_Y__SHIFT 0x00000010
+
+// SCL_HORZ_FILTER_INIT_CHROMA
+#define SCL_HORZ_FILTER_INIT_CHROMA__SCL_H_INIT_FRAC_CBCR_MASK 0x0000ffffL
+#define SCL_HORZ_FILTER_INIT_CHROMA__SCL_H_INIT_FRAC_CBCR__SHIFT 0x00000000
+#define SCL_HORZ_FILTER_INIT_CHROMA__SCL_H_INIT_INT_CBCR_MASK 0x00070000L
+#define SCL_HORZ_FILTER_INIT_CHROMA__SCL_H_INIT_INT_CBCR__SHIFT 0x00000010
+
#endif
--
2.25.1
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next prev parent reply other threads:[~2020-07-16 21:23 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-16 21:22 Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 01/27] drm/amdgpu: add some required DCE6 registers (v6) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 02/27] drm/amd/display: add asics info for SI parts Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 03/27] drm/amd/display: dc/dce: add initial DCE6 support (v9b) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 04/27] drm/amd/display: dc/core: add SI/DCE6 support (v2) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 05/27] drm/amd/display: dc/bios: add support for DCE6 Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 06/27] drm/amd/display: dc/gpio: add support for DCE6 (v2) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 07/27] drm/amd/display: dc/irq: add support for DCE6 (v4) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 08/27] drm/amd/display: amdgpu_dm: add SI support (v4) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 09/27] drm/amd/display: dc/clk_mgr: add support for SI parts (v2) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 10/27] drm/amd/display: dc/dce60: set max_cursor_size to 64 Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 11/27] drm/amd/display: dce_audio: add DCE6 specific macros, functions Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 12/27] drm/amd/display: dce_dmcu: " Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 13/27] drm/amd/display: dce_hwseq: " Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 14/27] drm/amd/display: dce_ipp: " Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 15/27] drm/amd/display: dce_link_encoder: " Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 16/27] drm/amd/display: dce_mem_input: " Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 17/27] drm/amd/display: dce_opp: " Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 18/27] drm/amd/display: dce_transform: " Mauro Rossi
2020-07-16 21:22 ` Mauro Rossi [this message]
2020-07-16 21:22 ` [PATCH v3 20/27] drm/amd/display: dce_transform: DCE6 Scaling Horizontal Filter Init Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 21/27] drm/amd/display: dce60_hw_sequencer: add DCE6 specific functions Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 22/27] drm/amd/display: dce60_hw_sequencer: add DCE6 specific .cursor_lock Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 23/27] drm/amd/display: dce60_timing_generator: add DCE6 specific functions Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 24/27] drm/amd/display: dc/dce60: use DCE6 headers (v6) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 25/27] drm/amd/display: create plane rotation property for Bonaire and later Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 26/27] drm/amdgpu: enable DC support for SI parts (v2) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 27/27] drm/amd/display: enable SI support in the Kconfig (v2) Mauro Rossi
2020-07-20 9:00 ` Christian König
2020-07-20 9:59 ` Re: Mauro Rossi
2020-07-22 2:51 ` Re: Alex Deucher
2020-07-22 7:56 ` Re: Mauro Rossi
2020-07-24 18:31 ` Re: Alex Deucher
2020-07-26 15:31 ` Re: Mauro Rossi
2020-07-27 18:31 ` Re: Alex Deucher
2020-07-27 19:46 ` Re: Mauro Rossi
2020-07-27 19:54 ` Re: Alex Deucher
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