* [PATCH 1/2] dt-bindings: pci: layerscape-pci: Add compatible strings for LX2160A rev2
@ 2020-10-26 5:14 Zhiqiang Hou
2020-10-26 5:14 ` [PATCH 2/2] PCI: layerscape: Add EP mode support " Zhiqiang Hou
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Zhiqiang Hou @ 2020-10-26 5:14 UTC (permalink / raw
To: linux-pci, devicetree, linux-kernel, bhelgaas, robh+dt,
lorenzo.pieralisi
Cc: minghuan.Lian, mingkai.hu, roy.zang, Hou Zhiqiang
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add PCIe Endpoint mode compatible string "fsl,lx2160ar2-pcie-ep"
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
Documentation/devicetree/bindings/pci/layerscape-pci.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
index daa99f7d4c3f..6d898dd4a8e2 100644
--- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
+++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
@@ -26,6 +26,7 @@ Required properties:
"fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep"
"fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep"
"fsl,ls2088a-pcie-ep", "fsl,ls-pcie-ep"
+ "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep"
- reg: base addresses and lengths of the PCIe controller register blocks.
- interrupts: A list of interrupt outputs of the controller. Must contain an
entry for each entry in the interrupt-names property.
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] PCI: layerscape: Add EP mode support for LX2160A rev2
2020-10-26 5:14 [PATCH 1/2] dt-bindings: pci: layerscape-pci: Add compatible strings for LX2160A rev2 Zhiqiang Hou
@ 2020-10-26 5:14 ` Zhiqiang Hou
2020-10-30 18:31 ` [PATCH 1/2] dt-bindings: pci: layerscape-pci: Add compatible strings " Rob Herring
2021-01-18 15:19 ` Lorenzo Pieralisi
2 siblings, 0 replies; 4+ messages in thread
From: Zhiqiang Hou @ 2020-10-26 5:14 UTC (permalink / raw
To: linux-pci, devicetree, linux-kernel, bhelgaas, robh+dt,
lorenzo.pieralisi
Cc: minghuan.Lian, mingkai.hu, roy.zang, Hou Zhiqiang
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
The LX2160A rev2 uses the same PCIe IP as LS2088A, but LX2160A rev2
PCIe controller is integrated with different stride between PFs'
register address.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
drivers/pci/controller/dwc/pci-layerscape-ep.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c b/drivers/pci/controller/dwc/pci-layerscape-ep.c
index 84206f265e54..b125fa1519c8 100644
--- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
+++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
@@ -117,10 +117,17 @@ static const struct ls_pcie_ep_drvdata ls2_ep_drvdata = {
.dw_pcie_ops = &dw_ls_pcie_ep_ops,
};
+static const struct ls_pcie_ep_drvdata lx2_ep_drvdata = {
+ .func_offset = 0x8000,
+ .ops = &ls_pcie_ep_ops,
+ .dw_pcie_ops = &dw_ls_pcie_ep_ops,
+};
+
static const struct of_device_id ls_pcie_ep_of_match[] = {
{ .compatible = "fsl,ls1046a-pcie-ep", .data = &ls1_ep_drvdata },
{ .compatible = "fsl,ls1088a-pcie-ep", .data = &ls2_ep_drvdata },
{ .compatible = "fsl,ls2088a-pcie-ep", .data = &ls2_ep_drvdata },
+ { .compatible = "fsl,lx2160ar2-pcie-ep", .data = &lx2_ep_drvdata },
{ },
};
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] dt-bindings: pci: layerscape-pci: Add compatible strings for LX2160A rev2
2020-10-26 5:14 [PATCH 1/2] dt-bindings: pci: layerscape-pci: Add compatible strings for LX2160A rev2 Zhiqiang Hou
2020-10-26 5:14 ` [PATCH 2/2] PCI: layerscape: Add EP mode support " Zhiqiang Hou
@ 2020-10-30 18:31 ` Rob Herring
2021-01-18 15:19 ` Lorenzo Pieralisi
2 siblings, 0 replies; 4+ messages in thread
From: Rob Herring @ 2020-10-30 18:31 UTC (permalink / raw
To: Zhiqiang Hou
Cc: mingkai.hu, linux-pci, devicetree, robh+dt, minghuan.Lian,
linux-kernel, lorenzo.pieralisi, bhelgaas, roy.zang
On Mon, 26 Oct 2020 13:14:47 +0800, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> Add PCIe Endpoint mode compatible string "fsl,lx2160ar2-pcie-ep"
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> Documentation/devicetree/bindings/pci/layerscape-pci.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] dt-bindings: pci: layerscape-pci: Add compatible strings for LX2160A rev2
2020-10-26 5:14 [PATCH 1/2] dt-bindings: pci: layerscape-pci: Add compatible strings for LX2160A rev2 Zhiqiang Hou
2020-10-26 5:14 ` [PATCH 2/2] PCI: layerscape: Add EP mode support " Zhiqiang Hou
2020-10-30 18:31 ` [PATCH 1/2] dt-bindings: pci: layerscape-pci: Add compatible strings " Rob Herring
@ 2021-01-18 15:19 ` Lorenzo Pieralisi
2 siblings, 0 replies; 4+ messages in thread
From: Lorenzo Pieralisi @ 2021-01-18 15:19 UTC (permalink / raw
To: robh+dt, linux-kernel, linux-pci, Zhiqiang Hou, devicetree,
bhelgaas
Cc: Lorenzo Pieralisi, minghuan.Lian, roy.zang, mingkai.hu
On Mon, 26 Oct 2020 13:14:47 +0800, Zhiqiang Hou wrote:
> Add PCIe Endpoint mode compatible string "fsl,lx2160ar2-pcie-ep"
Applied to pci/dwc, thanks!
[1/2] dt-bindings: pci: layerscape-pci: Add compatible strings for LX2160A rev2
https://git.kernel.org/lpieralisi/pci/c/514a39a653
[2/2] PCI: layerscape: Add EP mode support for LX2160A rev2
https://git.kernel.org/lpieralisi/pci/c/faff7b5ef5
Thanks,
Lorenzo
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2021-01-18 15:22 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-10-26 5:14 [PATCH 1/2] dt-bindings: pci: layerscape-pci: Add compatible strings for LX2160A rev2 Zhiqiang Hou
2020-10-26 5:14 ` [PATCH 2/2] PCI: layerscape: Add EP mode support " Zhiqiang Hou
2020-10-30 18:31 ` [PATCH 1/2] dt-bindings: pci: layerscape-pci: Add compatible strings " Rob Herring
2021-01-18 15:19 ` Lorenzo Pieralisi
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.