* [agd5f:amd-staging-drm-next 1868/1993] drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:1815:32: error: implicit declaration of function 'ioremap_cache'; did you mean
@ 2021-03-10 8:52 kernel test robot
0 siblings, 0 replies; only message in thread
From: kernel test robot @ 2021-03-10 8:52 UTC (permalink / raw
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 7095 bytes --]
tree: https://gitlab.freedesktop.org/agd5f/linux.git amd-staging-drm-next
head: dec2310256916626e4356af784822e02fb807cad
commit: 6587dfd22008fbe714f3ca2d6a318140e2e1d6ce [1868/1993] drm/amdgpu: pre-map device buffer as cached for A+A config
config: s390-randconfig-r015-20210309 (attached as .config)
compiler: s390-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git remote add agd5f https://gitlab.freedesktop.org/agd5f/linux.git
git fetch --no-tags agd5f amd-staging-drm-next
git checkout 6587dfd22008fbe714f3ca2d6a318140e2e1d6ce
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=s390
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All error/warnings (new ones prefixed by >>):
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c: In function 'amdgpu_ttm_init':
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:1815:32: error: implicit declaration of function 'ioremap_cache'; did you mean 'ioremap_uc'? [-Werror=implicit-function-declaration]
1815 | adev->mman.aper_base_kaddr = ioremap_cache(adev->gmc.aper_base,
| ^~~~~~~~~~~~~
| ioremap_uc
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:1815:30: warning: assignment to 'void *' from 'int' makes pointer from integer without a cast [-Wint-conversion]
1815 | adev->mman.aper_base_kaddr = ioremap_cache(adev->gmc.aper_base,
| ^
cc1: some warnings being treated as errors
vim +1815 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
1768
1769 /*
1770 * amdgpu_ttm_init - Init the memory management (ttm) as well as various
1771 * gtt/vram related fields.
1772 *
1773 * This initializes all of the memory space pools that the TTM layer
1774 * will need such as the GTT space (system memory mapped to the device),
1775 * VRAM (on-board memory), and on-chip memories (GDS, GWS, OA) which
1776 * can be mapped per VMID.
1777 */
1778 int amdgpu_ttm_init(struct amdgpu_device *adev)
1779 {
1780 uint64_t gtt_size;
1781 int r;
1782 u64 vis_vram_limit;
1783
1784 mutex_init(&adev->mman.gtt_window_lock);
1785
1786 /* No others user of address space so set it to 0 */
1787 r = ttm_device_init(&adev->mman.bdev, &amdgpu_bo_driver, adev->dev,
1788 adev_to_drm(adev)->anon_inode->i_mapping,
1789 adev_to_drm(adev)->vma_offset_manager,
1790 adev->need_swiotlb,
1791 dma_addressing_limited(adev->dev));
1792 if (r) {
1793 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
1794 return r;
1795 }
1796 adev->mman.initialized = true;
1797
1798 /* Initialize VRAM pool with all of VRAM divided into pages */
1799 r = amdgpu_vram_mgr_init(adev);
1800 if (r) {
1801 DRM_ERROR("Failed initializing VRAM heap.\n");
1802 return r;
1803 }
1804
1805 /* Reduce size of CPU-visible VRAM if requested */
1806 vis_vram_limit = (u64)amdgpu_vis_vram_limit * 1024 * 1024;
1807 if (amdgpu_vis_vram_limit > 0 &&
1808 vis_vram_limit <= adev->gmc.visible_vram_size)
1809 adev->gmc.visible_vram_size = vis_vram_limit;
1810
1811 /* Change the size here instead of the init above so only lpfn is affected */
1812 amdgpu_ttm_set_buffer_funcs_status(adev, false);
1813 #ifdef CONFIG_64BIT
1814 if (adev->gmc.xgmi.connected_to_cpu)
> 1815 adev->mman.aper_base_kaddr = ioremap_cache(adev->gmc.aper_base,
1816 adev->gmc.visible_vram_size);
1817
1818 else
1819 adev->mman.aper_base_kaddr = ioremap_wc(adev->gmc.aper_base,
1820 adev->gmc.visible_vram_size);
1821 #endif
1822
1823 /*
1824 *The reserved vram for firmware must be pinned to the specified
1825 *place on the VRAM, so reserve it early.
1826 */
1827 r = amdgpu_ttm_fw_reserve_vram_init(adev);
1828 if (r) {
1829 return r;
1830 }
1831
1832 /*
1833 * only NAVI10 and onwards ASIC support for IP discovery.
1834 * If IP discovery enabled, a block of memory should be
1835 * reserved for IP discovey.
1836 */
1837 if (adev->mman.discovery_bin) {
1838 r = amdgpu_ttm_reserve_tmr(adev);
1839 if (r)
1840 return r;
1841 }
1842
1843 /* allocate memory as required for VGA
1844 * This is used for VGA emulation and pre-OS scanout buffers to
1845 * avoid display artifacts while transitioning between pre-OS
1846 * and driver. */
1847 r = amdgpu_bo_create_kernel_at(adev, 0, adev->mman.stolen_vga_size,
1848 AMDGPU_GEM_DOMAIN_VRAM,
1849 &adev->mman.stolen_vga_memory,
1850 NULL);
1851 if (r)
1852 return r;
1853 r = amdgpu_bo_create_kernel_at(adev, adev->mman.stolen_vga_size,
1854 adev->mman.stolen_extended_size,
1855 AMDGPU_GEM_DOMAIN_VRAM,
1856 &adev->mman.stolen_extended_memory,
1857 NULL);
1858 if (r)
1859 return r;
1860
1861 DRM_INFO("amdgpu: %uM of VRAM memory ready\n",
1862 (unsigned) (adev->gmc.real_vram_size / (1024 * 1024)));
1863
1864 /* Compute GTT size, either bsaed on 3/4th the size of RAM size
1865 * or whatever the user passed on module init */
1866 if (amdgpu_gtt_size == -1) {
1867 struct sysinfo si;
1868
1869 si_meminfo(&si);
1870 gtt_size = min(max((AMDGPU_DEFAULT_GTT_SIZE_MB << 20),
1871 adev->gmc.mc_vram_size),
1872 ((uint64_t)si.totalram * si.mem_unit * 3/4));
1873 }
1874 else
1875 gtt_size = (uint64_t)amdgpu_gtt_size << 20;
1876
1877 /* Initialize GTT memory pool */
1878 r = amdgpu_gtt_mgr_init(adev, gtt_size);
1879 if (r) {
1880 DRM_ERROR("Failed initializing GTT heap.\n");
1881 return r;
1882 }
1883 DRM_INFO("amdgpu: %uM of GTT memory ready.\n",
1884 (unsigned)(gtt_size / (1024 * 1024)));
1885
1886 /* Initialize various on-chip memory pools */
1887 r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_GDS, adev->gds.gds_size);
1888 if (r) {
1889 DRM_ERROR("Failed initializing GDS heap.\n");
1890 return r;
1891 }
1892
1893 r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_GWS, adev->gds.gws_size);
1894 if (r) {
1895 DRM_ERROR("Failed initializing gws heap.\n");
1896 return r;
1897 }
1898
1899 r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_OA, adev->gds.oa_size);
1900 if (r) {
1901 DRM_ERROR("Failed initializing oa heap.\n");
1902 return r;
1903 }
1904
1905 return 0;
1906 }
1907
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 26357 bytes --]
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2021-03-10 8:52 UTC | newest]
Thread overview: (only message) (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2021-03-10 8:52 [agd5f:amd-staging-drm-next 1868/1993] drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:1815:32: error: implicit declaration of function 'ioremap_cache'; did you mean kernel test robot
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.