From: qianfanguijin@163.com
To: u-boot@lists.denx.de
Cc: wens@csie.org, jagan@amarulasolutions.com,
andre.przywara@arm.com, marex@denx.de,
qianfan Zhao <qianfanguijin@163.com>
Subject: [PATCH 1/4] phy-sun4i-usb: Fix sun8i_r40_cfg
Date: Wed, 16 Jun 2021 10:33:23 +0800 [thread overview]
Message-ID: <20210616023326.18135-1-qianfanguijin@163.com> (raw)
From: qianfan Zhao <qianfanguijin@163.com>
The address of sun8i_r40's phyctrl is 0x01c13404, also fixed
enable_pmu and dual_route.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
---
drivers/phy/allwinner/phy-sun4i-usb.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c
index 5723c98032..608ba46242 100644
--- a/drivers/phy/allwinner/phy-sun4i-usb.c
+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
@@ -587,10 +587,10 @@ static const struct sun4i_usb_phy_cfg sun8i_r40_cfg = {
.num_phys = 3,
.type = sun8i_r40_phy,
.disc_thresh = 3,
- .phyctl_offset = REG_PHYCTL_A33,
+ .phyctl_offset = REG_PHYCTL_A10,
.dedicated_clocks = true,
- .enable_pmu_unk1 = true,
- .phy0_dual_route = true,
+ .enable_pmu_unk1 = false,
+ .phy0_dual_route = false,
};
static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = {
--
2.17.1
next reply other threads:[~2021-06-16 3:16 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-16 2:33 qianfanguijin [this message]
2021-06-16 2:33 ` [PATCH 2/4] sunxi_musb: Add musb configurations of sun8i-r40 qianfanguijin
2021-06-21 0:34 ` Andre Przywara
2021-06-16 2:33 ` [PATCH 3/4] dts: bpi-m2u: Enable USB_OTG by default qianfanguijin
2021-06-21 0:35 ` Andre Przywara
2021-06-16 2:33 ` [PATCH 4/4] sunxi: defconfig: bpi-m2u: Enable usb gadget and ums " qianfanguijin
2021-06-21 0:35 ` Andre Przywara
2021-06-21 0:33 ` [PATCH 1/4] phy-sun4i-usb: Fix sun8i_r40_cfg Andre Przywara
2021-06-30 6:48 ` qianfan
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