From: Lucas De Marchi <lucas.demarchi@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Matt Roper <matthew.d.roper@intel.com>,
Jose Souza <jose.souza@intel.com>
Subject: [Intel-gfx] [PATCH] drm/i915/xehp: Fix missing sentinel on mcr_ranges_xehp
Date: Fri, 30 Jul 2021 12:11:15 -0700 [thread overview]
Message-ID: <20210730191115.2514581-1-lucas.demarchi@intel.com> (raw)
There's a missing sentinel since we are not using ARRAY_SIZE(), but rather
checking that the .start is 0 to stop the iteration in mcr_range().
BUG: KASAN: global-out-of-bounds in mcr_range.isra.0+0x69/0xa0 [i915]
Read of size 4 at addr ffffffffa0889928 by task modprobe/3881
Fixes: d8905ba705ab ("drm/i915/xehp: Define multicast register ranges")
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 9173df59821a..053fa7251cd0 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2000,6 +2000,7 @@ static const struct mcr_range mcr_ranges_xehp[] = {
{ .start = 0xdc00, .end = 0xffff },
{ .start = 0x17000, .end = 0x17fff },
{ .start = 0x24a00, .end = 0x24a7f },
+ {},
};
static bool mcr_range(struct drm_i915_private *i915, u32 offset)
--
2.31.1
next reply other threads:[~2021-07-30 19:11 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-30 19:11 Lucas De Marchi [this message]
2021-07-30 19:18 ` [Intel-gfx] [PATCH] drm/i915/xehp: Fix missing sentinel on mcr_ranges_xehp Matt Roper
2021-07-31 1:10 ` Lucas De Marchi
2021-07-30 19:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-07-31 1:31 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-07-31 2:07 ` Lucas De Marchi
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