From: Philip Oberfichtner <pro@denx.de>
To: u-boot@lists.denx.de
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.com>,
Stefano Babic <sbabic@denx.de>, Marek Vasut <marex@denx.de>,
Philip Oberfichtner <pro@denx.de>,
Andreas Geisreiter <ageisreiter@dh-electronics.de>,
Tom Rini <trini@konsulko.com>,
u-boot@dh-electronics.com
Subject: [PATCH v3 3/3] ARM: imx6: dh-imx6: Enable d-cache early in SPL
Date: Tue, 9 Aug 2022 12:07:02 +0200 [thread overview]
Message-ID: <20220809100703.3101047-4-pro@denx.de> (raw)
In-Reply-To: <20220809100703.3101047-1-pro@denx.de>
From: Marek Vasut <marex@denx.de>
Enable d-cache early in SPL right after DRAM is started up.
This reduces U-Boot proper load time by 650ms when loaded
from SPI NOR.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
---
Changes in v3:
- Use newly introduced Kconfig symbol for dh_imx6_defconfig
Changes in v2:
- Add comment to explain the relevance of dcache_disable()
board/dhelectronics/dh_imx6/dh_imx6_spl.c | 28 +++++++++++++++++++++++
configs/dh_imx6_defconfig | 1 +
2 files changed, 29 insertions(+)
diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
index e49e97724a..4b0e13493d 100644
--- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c
+++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
@@ -6,6 +6,7 @@
*/
#include <common.h>
+#include <cpu_func.h>
#include <init.h>
#include <asm/arch/clock.h>
#include <asm/arch/crm_regs.h>
@@ -14,11 +15,13 @@
#include <asm/arch/mx6-ddr.h>
#include <asm/arch/mx6-pins.h>
#include <asm/arch/sys_proto.h>
+#include <asm/cache.h>
#include <asm/gpio.h>
#include <asm/mach-imx/boot_mode.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/mxc_i2c.h>
#include <asm/io.h>
+#include <asm/system.h>
#include <errno.h>
#include <fuse.h>
#include <fsl_esdhc_imx.h>
@@ -610,6 +613,20 @@ static void dhcom_spl_dram_init(void)
}
}
+void dram_bank_mmu_setup(int bank)
+{
+ int i;
+
+ set_section_dcache(ROMCP_ARB_BASE_ADDR >> MMU_SECTION_SHIFT, DCACHE_DEFAULT_OPTION);
+ set_section_dcache(IRAM_BASE_ADDR >> MMU_SECTION_SHIFT, DCACHE_DEFAULT_OPTION);
+
+ for (i = MMDC0_ARB_BASE_ADDR >> MMU_SECTION_SHIFT;
+ i < ((MMDC0_ARB_BASE_ADDR >> MMU_SECTION_SHIFT) +
+ (SZ_1G >> MMU_SECTION_SHIFT));
+ i++)
+ set_section_dcache(i, DCACHE_DEFAULT_OPTION);
+}
+
void board_init_f(ulong dummy)
{
/* setup AIPS and disable watchdog */
@@ -636,9 +653,20 @@ void board_init_f(ulong dummy)
/* DDR3 initialization */
dhcom_spl_dram_init();
+ /* Set up early MMU tables at the beginning of DRAM and start d-cache */
+ gd->arch.tlb_addr = MMDC0_ARB_BASE_ADDR + SZ_32M;
+ gd->arch.tlb_size = PGTABLE_SIZE;
+ enable_caches();
+
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
/* load/boot image from boot device */
board_init_r(NULL, 0);
}
+
+void spl_board_prepare_for_boot(void)
+{
+ /* Flush dcache. Without it U-Boot proper would hang at random locations. */
+ dcache_disable();
+}
diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig
index 11db9bac2c..e0075e7e87 100644
--- a/configs/dh_imx6_defconfig
+++ b/configs/dh_imx6_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_SYS_L2_PL310=y
+CONFIG_SPL_SYS_L2_PL310=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_F_LEN=0x1000
--
2.37.1
next prev parent reply other threads:[~2022-08-09 10:08 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-09 10:06 [PATCH v3 0/3] ARM: imx6: dh-imx6: Enable d-cache early in SPL Philip Oberfichtner
2022-08-09 10:07 ` [PATCH v3 1/3] Convert CONFIG_SYS_L2_PL310 to Kconfig Philip Oberfichtner
2022-08-09 10:58 ` Pali Rohár
2022-08-09 11:16 ` Marek Vasut
2022-08-09 11:21 ` Pali Rohár
2022-08-09 11:27 ` Marek Vasut
2022-08-09 11:32 ` Pali Rohár
2022-08-09 11:38 ` Marek Vasut
2022-08-09 12:59 ` Pali Rohár
2022-08-09 13:16 ` Marek Behún
2022-08-09 13:18 ` Marek Behún
2022-08-09 13:46 ` Tom Rini
2022-08-09 16:03 ` Marek Vasut
2022-08-09 16:36 ` Tom Rini
2022-08-09 18:27 ` Marek Vasut
2022-08-11 10:17 ` Philip Oberfichtner
2022-08-16 14:42 ` Philip Oberfichtner
2022-08-09 14:32 ` Phil Sutter
2022-08-12 8:39 ` Soeren Moch
2022-08-09 10:07 ` [PATCH v3 2/3] ARM: cache: Allow SPL to build cache-pl310.c Philip Oberfichtner
2022-08-09 10:07 ` Philip Oberfichtner [this message]
2022-08-09 11:17 ` [PATCH v3 3/3] ARM: imx6: dh-imx6: Enable d-cache early in SPL Marek Vasut
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