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[65.184.195.139]) by smtp.gmail.com with ESMTPSA id bk37-20020a05620a1a2500b006b942110644sm6937997qkb.102.2022.08.09.09.36.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Aug 2022 09:36:03 -0700 (PDT) Date: Tue, 9 Aug 2022 12:36:01 -0400 From: Tom Rini To: Marek Vasut Cc: Pali =?iso-8859-1?Q?Roh=E1r?= , Philip Oberfichtner , u-boot@lists.denx.de, Christoph Niedermaier , Stefano Babic , Marcel Ziswiler , Marek =?iso-8859-1?Q?Beh=FAn?= , Peng Fan , u-boot@dh-electronics.com Subject: Re: [PATCH v3 1/3] Convert CONFIG_SYS_L2_PL310 to Kconfig Message-ID: <20220809163601.GZ1146598@bill-the-cat> References: <20220809100703.3101047-1-pro@denx.de> <20220809100703.3101047-2-pro@denx.de> <20220809105813.aa4vjcyiqm3mnqx4@pali> <41f76858-38d9-284b-1b54-b511f3b3cd67@denx.de> <20220809112151.jhrytuxraqcahzh5@pali> <4c124a1f-28cb-a805-ac6f-fd50ae2ee00e@denx.de> <20220809113224.4mvygsubvtb5wd7a@pali> <20220809134634.GV1146598@bill-the-cat> <7a2a67b7-78ba-d687-55c9-23b4fd1203f6@denx.de> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="13BBG4aLOANfK34F" Content-Disposition: inline In-Reply-To: <7a2a67b7-78ba-d687-55c9-23b4fd1203f6@denx.de> X-Clacks-Overhead: GNU Terry Pratchett X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean --13BBG4aLOANfK34F Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Aug 09, 2022 at 06:03:15PM +0200, Marek Vasut wrote: > On 8/9/22 15:46, Tom Rini wrote: > > On Tue, Aug 09, 2022 at 01:32:24PM +0200, Pali Roh=E1r wrote: > > > On Tuesday 09 August 2022 13:27:38 Marek Vasut wrote: > > > > On 8/9/22 13:21, Pali Roh=E1r wrote: > > > >=20 > > > > (reducing the CC list) > > > >=20 > > > > > On Tuesday 09 August 2022 13:16:41 Marek Vasut wrote: > > > > > > On 8/9/22 12:58, Pali Roh=E1r wrote: > > > > > > > On Tuesday 09 August 2022 12:07:00 Philip Oberfichtner wrote: > > > > > > > > This converts CONFIG_SYS_L2_PL310 to Kconfig. > > > > > > > ... > > > > > > > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > > > > > > > > index 949ebb46ba..dde06bdd96 100644 > > > > > > > > --- a/arch/arm/Kconfig > > > > > > > > +++ b/arch/arm/Kconfig > > > > > > > > @@ -488,6 +488,10 @@ config TPL_SYS_THUMB_BUILD > > > > > > > > density. For ARM architectures that support Thumb2 = this flag will > > > > > > > > result in Thumb2 code generated by GCC. > > > > > > > > +config SYS_L2_PL310 > > > > > > > > + bool "ARM PL310 L2 cache controller" > >=20 > > This needs a depends on !SYS_L2CACHE_OFF. > >=20 > > > > > > > > + help > > > > > > > > + Enable support for ARM PL310 L2 cache controller in U-B= oot > > > > > > > > config SYS_L2CACHE_OFF > > > > > > > > bool "L2cache off" > > > > > > > > diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/ar= ch/arm/mach-mvebu/include/mach/config.h > > > > > > > > index 4add0d9e10..0bba0a4cf9 100644 > > > > > > > > --- a/arch/arm/mach-mvebu/include/mach/config.h > > > > > > > > +++ b/arch/arm/mach-mvebu/include/mach/config.h > > > > > > > > @@ -25,8 +25,6 @@ > > > > > > > > #define MV88F78X60 /* for the DDR training bin_hdr code= */ > > > > > > > > #endif > > > > > > > > -#define CONFIG_SYS_L2_PL310 > > > > > > > > - > > > > > > > > #define MV_UART_CONSOLE_BASE MVEBU_UART0_BASE > > > > > > > > /* Needed for SPI NOR booting in SPL */ > > > > > > >=20 > > > > > > > This option is required for mvebu SoC and is not user (de)-se= lectable. > > > > > > > So please do not define it in each individual mvebu board. It= would make > > > > > > > it harder to introduce a new mvebu board into U-Boot. Instead= enable it > > > > > > > for mvebu SoCs like it was before this change. It can be done= e.g. by > > > > > > > "select" Kconfig keyword in mvebu Kconfig file. > > > > > >=20 > > > > > > Should it rather be 'default y if MVEBU' in that new PL310 Kcon= fig option ? > > > > >=20 > > > > > No, because this is just default value of this option and still a= llows > > > > > end-user to de-select this option. > > > > >=20 > > > > > "select" is IIRC the only way how to force Kconfig to always enab= le some > > > > > symbol without any option for end-user to disable it. > > > > >=20 > > > > > At least I do not know a way how CONFIG_SYS_L2_PL310 symbol could= decide > > > > > that it is required for CONFIG_MVEBU. Just symbol CONFIG_MVEBU can > > > > > decide that it requires CONFIG_SYS_L2_PL310 symbol (and not in op= posite > > > > > direction). > > > >=20 > > > > So why should the user be unable to deselect L2CC support on MVEBU ? > > > > I can very well disable L2CC support on MX6 and the platform works = without > > > > it just fine. Maybe the MVEBU needs to be fixed to support the same= instead > > > > ? > > >=20 > > > Well, I'm not sure, currently it is non-deselectable option. Maybe it= is > > > a bug... but at least change which is doing kconfig conversion should > > > not change behavior. > >=20 > > It's tricky to say when to "select" or just "default y if .." or "imply" > > a given option. It's not only a matter of "can you disable X and the > > system is functional" but "would you normally want to". There are > > certainly system bring-up cases and similar where you want to disable > > L2CC because you're tracking down something. But it's really a feature > > of the chip and expected to work and something we want enabled, and the > > scope of when it would be disabled is very very narrow. Looking back at > > the patch itself, the config.h files that enabled this are almost all a > > SoC-common file (ti_am335x_common.h should have been setting this I bet, > > something else for the TODO pile for me), so my thought is that it > > should be a select'd option, but if there's strong opinion that it's > > useful to make it easy to turn off when needed, imply'd instead by the > > various ARCH's in question instead. > >=20 > > That said, thinking about the missing dependency I listed above, that's > > how to disable L2 when needed, so perhaps select SYS_L2_PL310 if > > !SYS_L2CACHE_OFF under the various ARCH's is the right way. >=20 > Uh, I didn't realize we also had this SYS_L2CACHE_OFF . Yeah, and it's also one of the odd "Enable this to turn oFF ..." options, but I think in this case, that makes the most sense. Note that SYS_L2CACHE_OFF defaults to 'n' so do assume we have an L2 cache, and also the option is ARM-specific. > In that case, the SYS_L2_PL310 selects the L2CC driver to be compiled in = and > that should likely be per-arch select indeed. And then SYS_L2CACHE_OFF > should be 'default' or 'imply', so the user can configure it for the vari= ous > hardware bring up cases ? Yeah, I think we're in agreement here. --=20 Tom --13BBG4aLOANfK34F Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmLyjPEACgkQFHw5/5Y0 tyxQcwv8CmvvHB7LirDYa3Ytp7//HNs36IV0X9ZZZ4axJE5ujbWhCN2maWnM5+Gf PDlGu8rbColUmqECz+Xu0v0RvfQ+QP8vM8uAS5SJqGBvCLL+dcuyEiav7ZDWsrdV g43sQdX/c91JGrdh2lDwz4/XlKH/DNlUwnyn0+vaule8fWt1PkbiMiYOjgpoIwai 3GIA8EZXuVPCTyaN2XLbZtarGwvdhgRhIX7avJfycgD7MO2gp9DV4Z/yhHTZZrHJ 10bqbr1y2O6VBUwe7/Yiog63b209EZRc/PG9UDtyL167dNtA+JHxjanG1dvTUkgu ne6wSXN7Iej66hfSo0tl3sA4qmGsoo6qjWSS36MpMR2dCeqAH4V3CBQ4NkvpFJfs 3ZNOLu4DBI6BLRUytxPN4Jg5Fjti5hUMc5ef41l/4ZfkuXq2Ch+ktrLFbHZXpwK4 Rc/qa29Fy08zXTKydD1Y0N76CUoqWor8Zit4M9Q2pn5DAe8wBlXtqniC/02t3BJa YUWSzKGv =nryr -----END PGP SIGNATURE----- --13BBG4aLOANfK34F--