* [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2
@ 2023-10-11 13:59 Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 01/17] fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy Francois Dugast
` (18 more replies)
0 siblings, 19 replies; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe; +Cc: Francois Dugast
This is the second take of uAPI updates that would lead to
breakage in the compatibility, which it is not acceptable after
we are merged upstream. So, let's break it before it is too late,
and start upstreaming a good, reliable and clean uapi.
This series is not complete yet but it is sent for early review
as some patches are already a few weeks old.
It series is intended to be applied after take 1 [1] which is not
merged yet, so it will break CI.
[1] https://patchwork.freedesktop.org/series/124710/
Francois Dugast (10):
fixup! drm/xe: Correlate engine and cpu timestamps with better
accuracy
drm/xe/uapi: Add documentation for query
drm/xe/uapi: Document DRM_XE_DEVICE_QUERY_HWCONFIG
drm/xe: Extend uAPI to query HuC micro-controler firmware version
drm/xe: Remove useless query config num_params
drm/xe/uapi: Add missing DRM_ prefix in uAPI constants
drm/xe/uapi: Add _FLAG to uAPI constants usable for flags
fixup! drm/xe: Add uAPI to query micro-controler firmware version
drm/xe/uapi: Make constant comments visible in kernel doc
drm/xe/uapi: Remove unused inaccessible memory region
José Roberto de Souza (1):
drm/xe: Add uAPI to query micro-controler firmware version
Mika Kuoppala (1):
drm/xe: Extend drm_xe_vm_bind_op
Rodrigo Vivi (4):
drm/xe/uapi: Remove GT_TYPE_REMOTE
drm/xe/uapi: Kill VM_MADVISE IOCTL
drm/xe/uapi: Separate bo_create placement from flags
drm/xe/uapi: Be more specific around GuC Version Type
Umesh Nerlige Ramappa (1):
fixup! drm/xe: Correlate engine and cpu timestamps with better
accuracy
drivers/gpu/drm/xe/Makefile | 1 -
drivers/gpu/drm/xe/xe_bo.c | 27 +-
drivers/gpu/drm/xe/xe_bo_types.h | 3 +
drivers/gpu/drm/xe/xe_device.c | 8 +-
drivers/gpu/drm/xe/xe_exec_queue.c | 20 +-
drivers/gpu/drm/xe/xe_gt.c | 2 +-
drivers/gpu/drm/xe/xe_pmu.c | 20 +-
drivers/gpu/drm/xe/xe_query.c | 95 +++--
drivers/gpu/drm/xe/xe_sync.c | 16 +-
drivers/gpu/drm/xe/xe_vm.c | 86 ++---
drivers/gpu/drm/xe/xe_vm_doc.h | 14 +-
drivers/gpu/drm/xe/xe_vm_madvise.c | 299 ---------------
drivers/gpu/drm/xe/xe_vm_madvise.h | 15 -
drivers/gpu/drm/xe/xe_wait_user_fence.c | 10 +-
include/uapi/drm/xe_drm.h | 478 +++++++++++++-----------
15 files changed, 435 insertions(+), 659 deletions(-)
delete mode 100644 drivers/gpu/drm/xe/xe_vm_madvise.c
delete mode 100644 drivers/gpu/drm/xe/xe_vm_madvise.h
--
2.34.1
^ permalink raw reply [flat|nested] 28+ messages in thread
* [Intel-xe] [RFC v1 01/17] fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
@ 2023-10-11 13:59 ` Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 02/17] drm/xe/uapi: Add documentation for query Francois Dugast
` (17 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe; +Cc: Francois Dugast
Remove checkpatch warning:
-:126: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#126: FILE: drivers/gpu/drm/xe/xe_query.c:108:
+query_engine_cycles(struct xe_device *xe,
+ struct drm_xe_device_query *query)
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 77499ad5ba56..10b9878ec95a 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -105,7 +105,7 @@ __read_timestamps(struct xe_gt *gt,
static int
query_engine_cycles(struct xe_device *xe,
- struct drm_xe_device_query *query)
+ struct drm_xe_device_query *query)
{
struct drm_xe_query_engine_cycles __user *query_ptr;
struct drm_xe_engine_class_instance *eci;
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-xe] [RFC v1 02/17] drm/xe/uapi: Add documentation for query
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 01/17] fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy Francois Dugast
@ 2023-10-11 13:59 ` Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 03/17] drm/xe: Extend drm_xe_vm_bind_op Francois Dugast
` (16 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe; +Cc: Francois Dugast, Rodrigo Vivi
Provide a description of the keys used the struct
drm_xe_query_config info array. Document the behavior
of the driver for IOCTL DRM_IOCTL_XE_DEVICE_QUERY
depending on the size value provided in struct
drm_xe_device_query.
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/637
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
include/uapi/drm/xe_drm.h | 41 ++++++++++++++++++++++++++++++++++++---
1 file changed, 38 insertions(+), 3 deletions(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 24bf8f0f52e8..a7b10cc33df3 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -321,14 +321,43 @@ struct drm_xe_query_config {
/** @pad: MBZ */
__u32 pad;
+ /*
+ * Device ID (lower 16 bits) and the device revision (next
+ * 8 bits)
+ */
#define XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
+ /*
+ * Flags describing the device configuration, see list below
+ */
#define XE_QUERY_CONFIG_FLAGS 1
+ /*
+ * Flag is set if the device has usable VRAM
+ */
#define XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
+ /*
+ * Minimal memory alignment required by this device,
+ * typically SZ_4K or SZ_64K
+ */
#define XE_QUERY_CONFIG_MIN_ALIGNMENT 2
+ /*
+ * Maximum bits of a virtual address
+ */
#define XE_QUERY_CONFIG_VA_BITS 3
+ /*
+ * Total number of GTs for the entire device
+ */
#define XE_QUERY_CONFIG_GT_COUNT 4
+ /*
+ * Total number of accessible memory regions
+ */
#define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
+ /*
+ * Value of the highest available exec queue priority
+ */
#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 6
+ /*
+ * Number of elements in the info array
+ */
#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1)
/** @info: array of elements containing the config info */
__u64 info[];
@@ -440,9 +469,15 @@ struct drm_xe_query_topology_mask {
/**
* struct drm_xe_device_query - main structure to query device information
*
- * If size is set to 0, the driver fills it with the required size for the
- * requested type of data to query. If size is equal to the required size,
- * the queried information is copied into data.
+ * The user selects the type of data to query among DRM_XE_DEVICE_QUERY_*
+ * and sets the value in the query member. This determines the type of
+ * the structure provided by the driver in data, among struct drm_xe_query_*.
+ *
+ * If size is set to 0, the driver fills it with the required size for
+ * the requested type of data to query. If size is equal to the required
+ * size, the queried information is copied into data. If size is set to
+ * a value different from 0 and different from the required size, the
+ * IOCTL call returns -EINVAL.
*
* For example the following code snippet allows retrieving and printing
* information about the device engines with DRM_XE_DEVICE_QUERY_ENGINES:
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-xe] [RFC v1 03/17] drm/xe: Extend drm_xe_vm_bind_op
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 01/17] fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 02/17] drm/xe/uapi: Add documentation for query Francois Dugast
@ 2023-10-11 13:59 ` Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 04/17] drm/xe: Add uAPI to query micro-controler firmware version Francois Dugast
` (15 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe; +Cc: Francois Dugast, Lucas De Marchi, Rodrigo Vivi
From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
The bind api is extensible but for a single bind op, there
is not a mechanism to extend. Add extensions field to
struct drm_xe_vm_bind_op.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Francois Dugast <francois.dugast@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
include/uapi/drm/xe_drm.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index a7b10cc33df3..47d2d0468339 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -656,6 +656,9 @@ struct drm_xe_vm_destroy {
};
struct drm_xe_vm_bind_op {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
/**
* @obj: GEM object to operate on, MBZ for MAP_USERPTR, MBZ for UNMAP
*/
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-xe] [RFC v1 04/17] drm/xe: Add uAPI to query micro-controler firmware version
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
` (2 preceding siblings ...)
2023-10-11 13:59 ` [Intel-xe] [RFC v1 03/17] drm/xe: Extend drm_xe_vm_bind_op Francois Dugast
@ 2023-10-11 13:59 ` Francois Dugast
2023-10-11 20:07 ` John Harrison
2023-10-11 13:59 ` [Intel-xe] [RFC v1 05/17] drm/xe/uapi: Document DRM_XE_DEVICE_QUERY_HWCONFIG Francois Dugast
` (14 subsequent siblings)
18 siblings, 1 reply; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe
From: José Roberto de Souza <jose.souza@intel.com>
Due to a bug in GuC firmware, Mesa can't enable by default the usage of
compute engines in DG2 and newer.
A new GuC firmware fixed the issue but until now there was no way
for Mesa to know if KMD was running with the fixed GuC version or not,
so this uAPI is required.
It may be expanded in future to query other firmware versions too.
More information: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661
Mesa usage: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233
v2:
- changed to submission version
- added branch version to be future proof
- checking if pads and reserved are zero
v3:
- add braces around case XE_QUERY_UC_TYPE_GUC to make CI happy
Cc: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 41 +++++++++++++++++++++++++++++++++++
include/uapi/drm/xe_drm.h | 31 ++++++++++++++++++++++++++
2 files changed, 72 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 10b9878ec95a..efbcf2ef436e 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -498,6 +498,46 @@ static int query_gt_topology(struct xe_device *xe,
return 0;
}
+static int
+query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
+{
+ struct drm_xe_query_uc_fw_version __user *query_ptr = u64_to_user_ptr(query->data);
+ size_t size = sizeof(struct drm_xe_query_uc_fw_version);
+ struct drm_xe_query_uc_fw_version resp;
+
+ if (query->size == 0) {
+ query->size = size;
+ return 0;
+ } else if (XE_IOCTL_DBG(xe, query->size != size)) {
+ return -EINVAL;
+ }
+
+ if (copy_from_user(&resp, query_ptr, size))
+ return -EFAULT;
+
+ if (XE_IOCTL_DBG(xe, resp.pad || resp.pad2 || resp.reserved))
+ return -EINVAL;
+
+ switch (resp.uc_type) {
+ case XE_QUERY_UC_TYPE_GUC: {
+ struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
+
+ resp.major_ver = guc->submission_state.version.major;
+ resp.minor_ver = guc->submission_state.version.minor;
+ resp.patch_ver = guc->submission_state.version.patch;
+ resp.branch_ver = 0;
+ break;
+ }
+ default:
+ return -EINVAL;
+ }
+
+ if (copy_to_user(query_ptr, &resp, size))
+ return -EFAULT;
+
+ return 0;
+}
+
static int (* const xe_query_funcs[])(struct xe_device *xe,
struct drm_xe_device_query *query) = {
query_engines,
@@ -507,6 +547,7 @@ static int (* const xe_query_funcs[])(struct xe_device *xe,
query_hwconfig,
query_gt_topology,
query_engine_cycles,
+ query_uc_fw_version,
};
int xe_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 47d2d0468339..f7ca52aba79b 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -466,6 +466,36 @@ struct drm_xe_query_topology_mask {
__u8 mask[];
};
+/**
+ * struct drm_xe_query_uc_fw_version - query a micro-controller firmware version
+ *
+ * Given a uc_type this will return the major, minor, patch and branch version
+ * of the micro-controller firmware.
+ */
+struct drm_xe_query_uc_fw_version {
+ /** @uc: The micro-controller type to query firmware version */
+#define XE_QUERY_UC_TYPE_GUC 0
+ __u16 uc_type;
+
+ /** @pad: MBZ */
+ __u16 pad;
+
+ /* @major_ver: major uc fw version */
+ __u32 major_ver;
+ /* @minor_ver: minor uc fw version */
+ __u32 minor_ver;
+ /* @patch_ver: patch uc fw version */
+ __u32 patch_ver;
+ /* @branch_ver: branch uc fw version */
+ __u32 branch_ver;
+
+ /** @pad2: MBZ */
+ __u32 pad2;
+
+ /** @reserved: Reserved */
+ __u64 reserved;
+};
+
/**
* struct drm_xe_device_query - main structure to query device information
*
@@ -518,6 +548,7 @@ struct drm_xe_device_query {
#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
#define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6
+#define DRM_XE_DEVICE_QUERY_UC_FW_VERSION 7
/** @query: The type of data to query */
__u32 query;
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-xe] [RFC v1 05/17] drm/xe/uapi: Document DRM_XE_DEVICE_QUERY_HWCONFIG
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
` (3 preceding siblings ...)
2023-10-11 13:59 ` [Intel-xe] [RFC v1 04/17] drm/xe: Add uAPI to query micro-controler firmware version Francois Dugast
@ 2023-10-11 13:59 ` Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 06/17] drm/xe: Extend uAPI to query HuC micro-controler firmware version Francois Dugast
` (13 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe; +Cc: Francois Dugast
Add a documentation on the content and format of when using query type
DRM_XE_DEVICE_QUERY_HWCONFIG. The list of keys can be found in IGT
under lib/intel_hwconfig_types.h.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
include/uapi/drm/xe_drm.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index f7ca52aba79b..e091dcf75b88 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -545,6 +545,11 @@ struct drm_xe_device_query {
#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
#define DRM_XE_DEVICE_QUERY_CONFIG 2
#define DRM_XE_DEVICE_QUERY_GT_LIST 3
+ /*
+ * Query type to retrieve the hardware configuration of the device
+ * such as information on slices, memory, caches, and so on. It is
+ * provided as a table of attributes (key / value).
+ */
#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
#define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-xe] [RFC v1 06/17] drm/xe: Extend uAPI to query HuC micro-controler firmware version
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
` (4 preceding siblings ...)
2023-10-11 13:59 ` [Intel-xe] [RFC v1 05/17] drm/xe/uapi: Document DRM_XE_DEVICE_QUERY_HWCONFIG Francois Dugast
@ 2023-10-11 13:59 ` Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 07/17] drm/xe: Remove useless query config num_params Francois Dugast
` (12 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe; +Cc: Francois Dugast
The infrastructure to query GuC firmware version is already in place. It
is extended with a new micro-controller type to query the HuC firmware
version. It can be used from user space to know if HuC is running.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 9 +++++++++
include/uapi/drm/xe_drm.h | 1 +
2 files changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index efbcf2ef436e..00a8aa7668de 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -528,6 +528,15 @@ query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
resp.branch_ver = 0;
break;
}
+ case XE_QUERY_UC_TYPE_HUC: {
+ struct xe_huc *huc = &xe->tiles[0].primary_gt->uc.huc;
+
+ resp.major_ver = huc->fw.major_ver_found;
+ resp.minor_ver = huc->fw.minor_ver_found;
+ resp.patch_ver = huc->fw.patch_ver_found;
+ resp.branch_ver = 0;
+ break;
+ }
default:
return -EINVAL;
}
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index e091dcf75b88..8d5bd2b9c408 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -475,6 +475,7 @@ struct drm_xe_query_topology_mask {
struct drm_xe_query_uc_fw_version {
/** @uc: The micro-controller type to query firmware version */
#define XE_QUERY_UC_TYPE_GUC 0
+#define XE_QUERY_UC_TYPE_HUC 1
__u16 uc_type;
/** @pad: MBZ */
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-xe] [RFC v1 07/17] drm/xe: Remove useless query config num_params
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
` (5 preceding siblings ...)
2023-10-11 13:59 ` [Intel-xe] [RFC v1 06/17] drm/xe: Extend uAPI to query HuC micro-controler firmware version Francois Dugast
@ 2023-10-11 13:59 ` Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 08/17] drm/xe/uapi: Add missing DRM_ prefix in uAPI constants Francois Dugast
` (11 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe; +Cc: Francois Dugast
num_params is only used to represent the number of query types.
Removing it as it is useless and should not be used.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 6 +++---
include/uapi/drm/xe_drm.h | 7 -------
2 files changed, 3 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 00a8aa7668de..5365331e452c 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -305,9 +305,10 @@ static int query_memory_usage(struct xe_device *xe,
static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
{
- u32 num_params = XE_QUERY_CONFIG_NUM_PARAM;
+#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1)
size_t size =
- sizeof(struct drm_xe_query_config) + num_params * sizeof(u64);
+ sizeof(struct drm_xe_query_config)
+ + XE_QUERY_CONFIG_NUM_PARAM * sizeof(u64);
struct drm_xe_query_config __user *query_ptr =
u64_to_user_ptr(query->data);
struct drm_xe_query_config *config;
@@ -323,7 +324,6 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
if (!config)
return -ENOMEM;
- config->num_params = num_params;
config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
xe->info.devid | (xe->info.revid << 16);
if (xe_device_get_root_tile(xe)->mem.vram.usable_size)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 8d5bd2b9c408..b3dcd7c6f2e5 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -315,9 +315,6 @@ struct drm_xe_query_mem_usage {
* struct drm_xe_query_config in .data.
*/
struct drm_xe_query_config {
- /** @num_params: number of parameters returned in info */
- __u32 num_params;
-
/** @pad: MBZ */
__u32 pad;
@@ -355,10 +352,6 @@ struct drm_xe_query_config {
* Value of the highest available exec queue priority
*/
#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 6
- /*
- * Number of elements in the info array
- */
-#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1)
/** @info: array of elements containing the config info */
__u64 info[];
};
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-xe] [RFC v1 08/17] drm/xe/uapi: Add missing DRM_ prefix in uAPI constants
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
` (6 preceding siblings ...)
2023-10-11 13:59 ` [Intel-xe] [RFC v1 07/17] drm/xe: Remove useless query config num_params Francois Dugast
@ 2023-10-11 13:59 ` Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 09/17] drm/xe/uapi: Add _FLAG to uAPI constants usable for flags Francois Dugast
` (10 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe; +Cc: Francois Dugast
Most constants defined in xe_drm.h use DRM_XE_ as prefix which is
helpful to identify the name space. Make this systematic and add
this prefix where it was missing.
v2:
- fix vertical alignment of define values
- remove double DRM_ in some variables (José Roberto de Souza)
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_bo.c | 14 +--
drivers/gpu/drm/xe/xe_exec_queue.c | 20 ++---
drivers/gpu/drm/xe/xe_gt.c | 2 +-
drivers/gpu/drm/xe/xe_pmu.c | 20 ++---
drivers/gpu/drm/xe/xe_query.c | 38 ++++----
drivers/gpu/drm/xe/xe_vm.c | 54 +++++------
drivers/gpu/drm/xe/xe_vm_doc.h | 12 +--
drivers/gpu/drm/xe/xe_vm_madvise.c | 8 +-
include/uapi/drm/xe_drm.h | 140 ++++++++++++++---------------
9 files changed, 154 insertions(+), 154 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 61789c0e88fb..5b9f07838061 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -208,7 +208,7 @@ static int __xe_bo_placement_for_flags(struct xe_device *xe, struct xe_bo *bo,
/* The order of placements should indicate preferred location */
- if (bo->props.preferred_mem_class == XE_MEM_REGION_CLASS_SYSMEM) {
+ if (bo->props.preferred_mem_class == DRM_XE_MEM_REGION_CLASS_SYSMEM) {
try_add_system(bo, places, bo_flags, &c);
try_add_vram(xe, bo, places, bo_flags, &c);
} else {
@@ -1773,9 +1773,9 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
return -EINVAL;
if (XE_IOCTL_DBG(xe, args->flags &
- ~(XE_GEM_CREATE_FLAG_DEFER_BACKING |
- XE_GEM_CREATE_FLAG_SCANOUT |
- XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM |
+ ~(DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING |
+ DRM_XE_GEM_CREATE_FLAG_SCANOUT |
+ DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM |
xe->info.mem_region_mask)))
return -EINVAL;
@@ -1795,15 +1795,15 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
if (XE_IOCTL_DBG(xe, args->size & ~PAGE_MASK))
return -EINVAL;
- if (args->flags & XE_GEM_CREATE_FLAG_DEFER_BACKING)
+ if (args->flags & DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING)
bo_flags |= XE_BO_DEFER_BACKING;
- if (args->flags & XE_GEM_CREATE_FLAG_SCANOUT)
+ if (args->flags & DRM_XE_GEM_CREATE_FLAG_SCANOUT)
bo_flags |= XE_BO_SCANOUT_BIT;
bo_flags |= args->flags << (ffs(XE_BO_CREATE_SYSTEM_BIT) - 1);
- if (args->flags & XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM) {
+ if (args->flags & DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM) {
if (XE_IOCTL_DBG(xe, !(bo_flags & XE_BO_CREATE_VRAM_MASK)))
return -EINVAL;
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index dd61c4267e24..98f9d4cd9cc5 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -403,14 +403,14 @@ typedef int (*xe_exec_queue_set_property_fn)(struct xe_device *xe,
u64 value, bool create);
static const xe_exec_queue_set_property_fn exec_queue_set_property_funcs[] = {
- [XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY] = exec_queue_set_priority,
- [XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE] = exec_queue_set_timeslice,
- [XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT] = exec_queue_set_preemption_timeout,
- [XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE] = exec_queue_set_persistence,
- [XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT] = exec_queue_set_job_timeout,
- [XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER] = exec_queue_set_acc_trigger,
- [XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY] = exec_queue_set_acc_notify,
- [XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY] = exec_queue_set_acc_granularity,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY] = exec_queue_set_priority,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE] = exec_queue_set_timeslice,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT] = exec_queue_set_preemption_timeout,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE] = exec_queue_set_persistence,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT] = exec_queue_set_job_timeout,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER] = exec_queue_set_acc_trigger,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY] = exec_queue_set_acc_notify,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY] = exec_queue_set_acc_granularity,
};
static int exec_queue_user_ext_set_property(struct xe_device *xe,
@@ -442,7 +442,7 @@ typedef int (*xe_exec_queue_user_extension_fn)(struct xe_device *xe,
bool create);
static const xe_exec_queue_set_property_fn exec_queue_user_extension_funcs[] = {
- [XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY] = exec_queue_user_ext_set_property,
+ [DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY] = exec_queue_user_ext_set_property,
};
#define MAX_USER_EXTENSIONS 16
@@ -761,7 +761,7 @@ int xe_exec_queue_get_property_ioctl(struct drm_device *dev, void *data,
return -ENOENT;
switch (args->property) {
- case XE_EXEC_QUEUE_GET_PROPERTY_BAN:
+ case DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN:
args->value = !!(q->flags & EXEC_QUEUE_FLAG_BANNED);
ret = 0;
break;
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 68cd9a7ee087..aa7c19a4bbc4 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -534,7 +534,7 @@ static void xe_uevent_gt_reset_failure(struct pci_dev *pdev, u8 tile_id, u8 gt_i
{
char *reset_event[4];
- reset_event[0] = XE_RESET_FAILED_UEVENT "=NEEDS_RESET";
+ reset_event[0] = DRM_XE_RESET_FAILED_UEVENT "=NEEDS_RESET";
reset_event[1] = kasprintf(GFP_KERNEL, "TILE_ID=%d", tile_id);
reset_event[2] = kasprintf(GFP_KERNEL, "GT_ID=%d", gt_id);
reset_event[3] = NULL;
diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
index abfc0b3aeac4..8378ca3007d9 100644
--- a/drivers/gpu/drm/xe/xe_pmu.c
+++ b/drivers/gpu/drm/xe/xe_pmu.c
@@ -114,17 +114,17 @@ config_status(struct xe_device *xe, u64 config)
return -ENOENT;
switch (config_counter(config)) {
- case XE_PMU_INTERRUPTS(0):
+ case DRM_XE_PMU_INTERRUPTS(0):
if (gt_id)
return -ENOENT;
break;
- case XE_PMU_RENDER_GROUP_BUSY(0):
- case XE_PMU_COPY_GROUP_BUSY(0):
- case XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
+ case DRM_XE_PMU_RENDER_GROUP_BUSY(0):
+ case DRM_XE_PMU_COPY_GROUP_BUSY(0):
+ case DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
if (gt->info.type == XE_GT_TYPE_MEDIA)
return -ENOENT;
break;
- case XE_PMU_MEDIA_GROUP_BUSY(0):
+ case DRM_XE_PMU_MEDIA_GROUP_BUSY(0):
if (!(gt->info.engine_mask & (BIT(XE_HW_ENGINE_VCS0) | BIT(XE_HW_ENGINE_VECS0))))
return -ENOENT;
break;
@@ -185,13 +185,13 @@ static u64 __xe_pmu_event_read(struct perf_event *event)
u64 val;
switch (config_counter(config)) {
- case XE_PMU_INTERRUPTS(0):
+ case DRM_XE_PMU_INTERRUPTS(0):
val = READ_ONCE(pmu->irq_count);
break;
- case XE_PMU_RENDER_GROUP_BUSY(0):
- case XE_PMU_COPY_GROUP_BUSY(0):
- case XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
- case XE_PMU_MEDIA_GROUP_BUSY(0):
+ case DRM_XE_PMU_RENDER_GROUP_BUSY(0):
+ case DRM_XE_PMU_COPY_GROUP_BUSY(0):
+ case DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
+ case DRM_XE_PMU_MEDIA_GROUP_BUSY(0):
val = engine_group_busyness_read(gt, config);
break;
default:
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 5365331e452c..ab9c061784c7 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -261,7 +261,7 @@ static int query_memory_usage(struct xe_device *xe,
return -ENOMEM;
man = ttm_manager_type(&xe->ttm, XE_PL_TT);
- usage->regions[0].mem_class = XE_MEM_REGION_CLASS_SYSMEM;
+ usage->regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM;
usage->regions[0].instance = 0;
usage->regions[0].min_page_size = PAGE_SIZE;
usage->regions[0].total_size = man->size << PAGE_SHIFT;
@@ -273,7 +273,7 @@ static int query_memory_usage(struct xe_device *xe,
man = ttm_manager_type(&xe->ttm, i);
if (man) {
usage->regions[usage->num_regions].mem_class =
- XE_MEM_REGION_CLASS_VRAM;
+ DRM_XE_MEM_REGION_CLASS_VRAM;
usage->regions[usage->num_regions].instance =
usage->num_regions;
usage->regions[usage->num_regions].min_page_size =
@@ -305,7 +305,7 @@ static int query_memory_usage(struct xe_device *xe,
static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
{
-#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1)
+#define XE_QUERY_CONFIG_NUM_PARAM (DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1)
size_t size =
sizeof(struct drm_xe_query_config)
+ XE_QUERY_CONFIG_NUM_PARAM * sizeof(u64);
@@ -324,18 +324,18 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
if (!config)
return -ENOMEM;
- config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
+ config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
xe->info.devid | (xe->info.revid << 16);
if (xe_device_get_root_tile(xe)->mem.vram.usable_size)
- config->info[XE_QUERY_CONFIG_FLAGS] =
- XE_QUERY_CONFIG_FLAGS_HAS_VRAM;
- config->info[XE_QUERY_CONFIG_MIN_ALIGNMENT] =
+ config->info[DRM_XE_QUERY_CONFIG_FLAGS] =
+ DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM;
+ config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
- config->info[XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
- config->info[XE_QUERY_CONFIG_GT_COUNT] = xe->info.gt_count;
- config->info[XE_QUERY_CONFIG_MEM_REGION_COUNT] =
+ config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
+ config->info[DRM_XE_QUERY_CONFIG_GT_COUNT] = xe->info.gt_count;
+ config->info[DRM_XE_QUERY_CONFIG_MEM_REGION_COUNT] =
hweight_long(xe->info.mem_region_mask);
- config->info[XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
+ config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
xe_exec_queue_device_get_max_priority(xe);
if (copy_to_user(query_ptr, config, size)) {
@@ -371,11 +371,11 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
gt_list->num_gt = xe->info.gt_count;
for_each_gt(gt, xe, id) {
if (xe_gt_is_media_type(gt))
- gt_list->gt_list[id].type = XE_QUERY_GT_TYPE_MEDIA;
+ gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA;
else if (gt_to_tile(gt)->id > 0)
- gt_list->gt_list[id].type = XE_QUERY_GT_TYPE_REMOTE;
+ gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_REMOTE;
else
- gt_list->gt_list[id].type = XE_QUERY_GT_TYPE_MAIN;
+ gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
gt_list->gt_list[id].gt_id = gt->info.id;
gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
if (!IS_DGFX(xe))
@@ -473,21 +473,21 @@ static int query_gt_topology(struct xe_device *xe,
for_each_gt(gt, xe, id) {
topo.gt_id = id;
- topo.type = XE_TOPO_DSS_GEOMETRY;
+ topo.type = DRM_XE_TOPO_DSS_GEOMETRY;
query_ptr = copy_mask(query_ptr, &topo,
gt->fuse_topo.g_dss_mask,
sizeof(gt->fuse_topo.g_dss_mask));
if (IS_ERR(query_ptr))
return PTR_ERR(query_ptr);
- topo.type = XE_TOPO_DSS_COMPUTE;
+ topo.type = DRM_XE_TOPO_DSS_COMPUTE;
query_ptr = copy_mask(query_ptr, &topo,
gt->fuse_topo.c_dss_mask,
sizeof(gt->fuse_topo.c_dss_mask));
if (IS_ERR(query_ptr))
return PTR_ERR(query_ptr);
- topo.type = XE_TOPO_EU_PER_DSS;
+ topo.type = DRM_XE_TOPO_EU_PER_DSS;
query_ptr = copy_mask(query_ptr, &topo,
gt->fuse_topo.eu_mask_per_dss,
sizeof(gt->fuse_topo.eu_mask_per_dss));
@@ -519,7 +519,7 @@ query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
return -EINVAL;
switch (resp.uc_type) {
- case XE_QUERY_UC_TYPE_GUC: {
+ case DRM_XE_QUERY_UC_TYPE_GUC: {
struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
resp.major_ver = guc->submission_state.version.major;
@@ -528,7 +528,7 @@ query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
resp.branch_ver = 0;
break;
}
- case XE_QUERY_UC_TYPE_HUC: {
+ case DRM_XE_QUERY_UC_TYPE_HUC: {
struct xe_huc *huc = &xe->tiles[0].primary_gt->uc.huc;
resp.major_ver = huc->fw.major_ver_found;
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 971206264d94..8758d2d140df 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -2176,8 +2176,8 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
(ULL)bo_offset_or_userptr);
switch (operation) {
- case XE_VM_BIND_OP_MAP:
- case XE_VM_BIND_OP_MAP_USERPTR:
+ case DRM_XE_VM_BIND_OP_MAP:
+ case DRM_XE_VM_BIND_OP_MAP_USERPTR:
ops = drm_gpuvm_sm_map_ops_create(&vm->gpuvm, addr, range,
obj, bo_offset_or_userptr);
if (IS_ERR(ops))
@@ -2188,13 +2188,13 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
op->tile_mask = tile_mask;
op->map.immediate =
- flags & XE_VM_BIND_FLAG_IMMEDIATE;
+ flags & DRM_XE_VM_BIND_FLAG_IMMEDIATE;
op->map.read_only =
- flags & XE_VM_BIND_FLAG_READONLY;
- op->map.is_null = flags & XE_VM_BIND_FLAG_NULL;
+ flags & DRM_XE_VM_BIND_FLAG_READONLY;
+ op->map.is_null = flags & DRM_XE_VM_BIND_FLAG_NULL;
}
break;
- case XE_VM_BIND_OP_UNMAP:
+ case DRM_XE_VM_BIND_OP_UNMAP:
ops = drm_gpuvm_sm_unmap_ops_create(&vm->gpuvm, addr, range);
if (IS_ERR(ops))
return ops;
@@ -2205,7 +2205,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
op->tile_mask = tile_mask;
}
break;
- case XE_VM_BIND_OP_PREFETCH:
+ case DRM_XE_VM_BIND_OP_PREFETCH:
ops = drm_gpuvm_prefetch_ops_create(&vm->gpuvm, addr, range);
if (IS_ERR(ops))
return ops;
@@ -2217,7 +2217,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
op->prefetch.region = region;
}
break;
- case XE_VM_BIND_OP_UNMAP_ALL:
+ case DRM_XE_VM_BIND_OP_UNMAP_ALL:
xe_assert(vm->xe, bo);
err = xe_bo_lock(bo, true);
@@ -2810,13 +2810,13 @@ static int vm_bind_ioctl_ops_execute(struct xe_vm *vm,
#ifdef TEST_VM_ASYNC_OPS_ERROR
#define SUPPORTED_FLAGS \
- (FORCE_ASYNC_OP_ERROR | XE_VM_BIND_FLAG_ASYNC | \
- XE_VM_BIND_FLAG_READONLY | XE_VM_BIND_FLAG_IMMEDIATE | \
- XE_VM_BIND_FLAG_NULL | 0xffff)
+ (FORCE_ASYNC_OP_ERROR | DRM_XE_VM_BIND_FLAG_ASYNC | \
+ DRM_XE_VM_BIND_FLAG_READONLY | DRM_XE_VM_BIND_FLAG_IMMEDIATE | \
+ DRM_XE_VM_BIND_FLAG_NULL | 0xffff)
#else
#define SUPPORTED_FLAGS \
- (XE_VM_BIND_FLAG_ASYNC | XE_VM_BIND_FLAG_READONLY | \
- XE_VM_BIND_FLAG_IMMEDIATE | XE_VM_BIND_FLAG_NULL | \
+ (DRM_XE_VM_BIND_FLAG_ASYNC | DRM_XE_VM_BIND_FLAG_READONLY | \
+ DRM_XE_VM_BIND_FLAG_IMMEDIATE | DRM_XE_VM_BIND_FLAG_NULL | \
0xffff)
#endif
#define XE_64K_PAGE_MASK 0xffffull
@@ -2864,45 +2864,45 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe,
u32 obj = (*bind_ops)[i].obj;
u64 obj_offset = (*bind_ops)[i].obj_offset;
u32 region = (*bind_ops)[i].region;
- bool is_null = flags & XE_VM_BIND_FLAG_NULL;
+ bool is_null = flags & DRM_XE_VM_BIND_FLAG_NULL;
if (i == 0) {
- *async = !!(flags & XE_VM_BIND_FLAG_ASYNC);
+ *async = !!(flags & DRM_XE_VM_BIND_FLAG_ASYNC);
if (XE_IOCTL_DBG(xe, !*async && args->num_syncs)) {
err = -EINVAL;
goto free_bind_ops;
}
} else if (XE_IOCTL_DBG(xe, *async !=
- !!(flags & XE_VM_BIND_FLAG_ASYNC))) {
+ !!(flags & DRM_XE_VM_BIND_FLAG_ASYNC))) {
err = -EINVAL;
goto free_bind_ops;
}
- if (XE_IOCTL_DBG(xe, op > XE_VM_BIND_OP_PREFETCH) ||
+ if (XE_IOCTL_DBG(xe, op > DRM_XE_VM_BIND_OP_PREFETCH) ||
XE_IOCTL_DBG(xe, flags & ~SUPPORTED_FLAGS) ||
XE_IOCTL_DBG(xe, obj && is_null) ||
XE_IOCTL_DBG(xe, obj_offset && is_null) ||
- XE_IOCTL_DBG(xe, op != XE_VM_BIND_OP_MAP &&
+ XE_IOCTL_DBG(xe, op != DRM_XE_VM_BIND_OP_MAP &&
is_null) ||
XE_IOCTL_DBG(xe, !obj &&
- op == XE_VM_BIND_OP_MAP &&
+ op == DRM_XE_VM_BIND_OP_MAP &&
!is_null) ||
XE_IOCTL_DBG(xe, !obj &&
- op == XE_VM_BIND_OP_UNMAP_ALL) ||
+ op == DRM_XE_VM_BIND_OP_UNMAP_ALL) ||
XE_IOCTL_DBG(xe, addr &&
- op == XE_VM_BIND_OP_UNMAP_ALL) ||
+ op == DRM_XE_VM_BIND_OP_UNMAP_ALL) ||
XE_IOCTL_DBG(xe, range &&
- op == XE_VM_BIND_OP_UNMAP_ALL) ||
+ op == DRM_XE_VM_BIND_OP_UNMAP_ALL) ||
XE_IOCTL_DBG(xe, obj &&
- op == XE_VM_BIND_OP_MAP_USERPTR) ||
+ op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
XE_IOCTL_DBG(xe, obj &&
- op == XE_VM_BIND_OP_PREFETCH) ||
+ op == DRM_XE_VM_BIND_OP_PREFETCH) ||
XE_IOCTL_DBG(xe, region &&
- op != XE_VM_BIND_OP_PREFETCH) ||
+ op != DRM_XE_VM_BIND_OP_PREFETCH) ||
XE_IOCTL_DBG(xe, !(BIT(region) &
xe->info.mem_region_mask)) ||
XE_IOCTL_DBG(xe, obj &&
- op == XE_VM_BIND_OP_UNMAP)) {
+ op == DRM_XE_VM_BIND_OP_UNMAP)) {
err = -EINVAL;
goto free_bind_ops;
}
@@ -2911,7 +2911,7 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe,
XE_IOCTL_DBG(xe, addr & ~PAGE_MASK) ||
XE_IOCTL_DBG(xe, range & ~PAGE_MASK) ||
XE_IOCTL_DBG(xe, !range &&
- op != XE_VM_BIND_OP_UNMAP_ALL)) {
+ op != DRM_XE_VM_BIND_OP_UNMAP_ALL)) {
err = -EINVAL;
goto free_bind_ops;
}
diff --git a/drivers/gpu/drm/xe/xe_vm_doc.h b/drivers/gpu/drm/xe/xe_vm_doc.h
index b1b2dc4a6089..516f4dc97223 100644
--- a/drivers/gpu/drm/xe/xe_vm_doc.h
+++ b/drivers/gpu/drm/xe/xe_vm_doc.h
@@ -32,9 +32,9 @@
* Operations
* ----------
*
- * XE_VM_BIND_OP_MAP - Create mapping for a BO
- * XE_VM_BIND_OP_UNMAP - Destroy mapping for a BO / userptr
- * XE_VM_BIND_OP_MAP_USERPTR - Create mapping for userptr
+ * DRM_XE_VM_BIND_OP_MAP - Create mapping for a BO
+ * DRM_XE_VM_BIND_OP_UNMAP - Destroy mapping for a BO / userptr
+ * DRM_XE_VM_BIND_OP_MAP_USERPTR - Create mapping for userptr
*
* Implementation details
* ~~~~~~~~~~~~~~~~~~~~~~
@@ -113,7 +113,7 @@
* VM uses to report errors to. The ufence wait interface can be used to wait on
* a VM going into an error state. Once an error is reported the VM's async
* worker is paused. While the VM's async worker is paused sync,
- * XE_VM_BIND_OP_UNMAP operations are allowed (this can free memory). Once the
+ * DRM_XE_VM_BIND_OP_UNMAP operations are allowed (this can free memory). Once the
* uses believe the error state is fixed, the async worker can be resumed via
* XE_VM_BIND_OP_RESTART operation. When VM async bind work is restarted, the
* first operation processed is the operation that caused the original error.
@@ -193,7 +193,7 @@
* In a VM is in fault mode (TODO: link to fault mode), new bind operations that
* create mappings are by default are deferred to the page fault handler (first
* use). This behavior can be overriden by setting the flag
- * XE_VM_BIND_FLAG_IMMEDIATE which indicates to creating the mapping
+ * DRM_XE_VM_BIND_FLAG_IMMEDIATE which indicates to creating the mapping
* immediately.
*
* User pointer
@@ -322,7 +322,7 @@
*
* By default, on a faulting VM binds just allocate the VMA and the actual
* updating of the page tables is defered to the page fault handler. This
- * behavior can be overridden by setting the flag XE_VM_BIND_FLAG_IMMEDIATE in
+ * behavior can be overridden by setting the flag DRM_XE_VM_BIND_FLAG_IMMEDIATE in
* the VM bind which will then do the bind immediately.
*
* Page fault handler
diff --git a/drivers/gpu/drm/xe/xe_vm_madvise.c b/drivers/gpu/drm/xe/xe_vm_madvise.c
index 0ef7d483d050..72d051ecac5c 100644
--- a/drivers/gpu/drm/xe/xe_vm_madvise.c
+++ b/drivers/gpu/drm/xe/xe_vm_madvise.c
@@ -19,10 +19,10 @@ static int madvise_preferred_mem_class(struct xe_device *xe, struct xe_vm *vm,
{
int i, err;
- if (XE_IOCTL_DBG(xe, value > XE_MEM_REGION_CLASS_VRAM))
+ if (XE_IOCTL_DBG(xe, value > DRM_XE_MEM_REGION_CLASS_VRAM))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, value == XE_MEM_REGION_CLASS_VRAM &&
+ if (XE_IOCTL_DBG(xe, value == DRM_XE_MEM_REGION_CLASS_VRAM &&
!xe->info.is_dgfx))
return -EINVAL;
@@ -75,10 +75,10 @@ static int madvise_preferred_mem_class_gt(struct xe_device *xe,
u32 gt_id = upper_32_bits(value);
u32 mem_class = lower_32_bits(value);
- if (XE_IOCTL_DBG(xe, mem_class > XE_MEM_REGION_CLASS_VRAM))
+ if (XE_IOCTL_DBG(xe, mem_class > DRM_XE_MEM_REGION_CLASS_VRAM))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, mem_class == XE_MEM_REGION_CLASS_VRAM &&
+ if (XE_IOCTL_DBG(xe, mem_class == DRM_XE_MEM_REGION_CLASS_VRAM &&
!xe->info.is_dgfx))
return -EINVAL;
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index b3dcd7c6f2e5..6a6f47d329c2 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -19,12 +19,12 @@ extern "C" {
/**
* DOC: uevent generated by xe on it's pci node.
*
- * XE_RESET_FAILED_UEVENT - Event is generated when attempt to reset gt
+ * DRM_XE_RESET_FAILED_UEVENT - Event is generated when attempt to reset gt
* fails. The value supplied with the event is always "NEEDS_RESET".
* Additional information supplied is tile id and gt id of the gt unit for
* which reset has failed.
*/
-#define XE_RESET_FAILED_UEVENT "DEVICE_STATUS"
+#define DRM_XE_RESET_FAILED_UEVENT "DEVICE_STATUS"
/**
* struct xe_user_extension - Base class for defining a chain of extensions
@@ -103,8 +103,8 @@ struct xe_user_extension {
#define DRM_XE_VM_CREATE 0x03
#define DRM_XE_VM_DESTROY 0x04
#define DRM_XE_VM_BIND 0x05
-#define DRM_XE_EXEC_QUEUE_CREATE 0x06
-#define DRM_XE_EXEC_QUEUE_DESTROY 0x07
+#define DRM_XE_EXEC_QUEUE_CREATE 0x06
+#define DRM_XE_EXEC_QUEUE_DESTROY 0x07
#define DRM_XE_EXEC 0x08
#define DRM_XE_EXEC_QUEUE_SET_PROPERTY 0x09
#define DRM_XE_WAIT_USER_FENCE 0x0a
@@ -150,14 +150,14 @@ struct drm_xe_engine_class_instance {
* enum drm_xe_memory_class - Supported memory classes.
*/
enum drm_xe_memory_class {
- /** @XE_MEM_REGION_CLASS_SYSMEM: Represents system memory. */
- XE_MEM_REGION_CLASS_SYSMEM = 0,
+ /** @DRM_XE_MEM_REGION_CLASS_SYSMEM: Represents system memory. */
+ DRM_XE_MEM_REGION_CLASS_SYSMEM = 0,
/**
- * @XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this
+ * @DRM_XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this
* represents the memory that is local to the device, which we
* call VRAM. Not valid on integrated platforms.
*/
- XE_MEM_REGION_CLASS_VRAM
+ DRM_XE_MEM_REGION_CLASS_VRAM
};
/**
@@ -217,7 +217,7 @@ struct drm_xe_query_mem_region {
* always equal the @total_size, since all of it will be CPU
* accessible.
*
- * Note this is only tracked for XE_MEM_REGION_CLASS_VRAM
+ * Note this is only tracked for DRM_XE_MEM_REGION_CLASS_VRAM
* regions (for other types the value here will always equal
* zero).
*/
@@ -229,7 +229,7 @@ struct drm_xe_query_mem_region {
* Requires CAP_PERFMON or CAP_SYS_ADMIN to get reliable
* accounting. Without this the value here will always equal
* zero. Note this is only currently tracked for
- * XE_MEM_REGION_CLASS_VRAM regions (for other types the value
+ * DRM_XE_MEM_REGION_CLASS_VRAM regions (for other types the value
* here will always be zero).
*/
__u64 cpu_visible_used;
@@ -322,36 +322,36 @@ struct drm_xe_query_config {
* Device ID (lower 16 bits) and the device revision (next
* 8 bits)
*/
-#define XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
+#define DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
/*
* Flags describing the device configuration, see list below
*/
-#define XE_QUERY_CONFIG_FLAGS 1
+#define DRM_XE_QUERY_CONFIG_FLAGS 1
/*
* Flag is set if the device has usable VRAM
*/
- #define XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
+ #define DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
/*
* Minimal memory alignment required by this device,
* typically SZ_4K or SZ_64K
*/
-#define XE_QUERY_CONFIG_MIN_ALIGNMENT 2
+#define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2
/*
* Maximum bits of a virtual address
*/
-#define XE_QUERY_CONFIG_VA_BITS 3
+#define DRM_XE_QUERY_CONFIG_VA_BITS 3
/*
* Total number of GTs for the entire device
*/
-#define XE_QUERY_CONFIG_GT_COUNT 4
+#define DRM_XE_QUERY_CONFIG_GT_COUNT 4
/*
* Total number of accessible memory regions
*/
-#define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
+#define DRM_XE_QUERY_CONFIG_MEM_REGION_COUNT 5
/*
* Value of the highest available exec queue priority
*/
-#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 6
+#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 6
/** @info: array of elements containing the config info */
__u64 info[];
};
@@ -365,9 +365,9 @@ struct drm_xe_query_config {
* implementing graphics and/or media operations.
*/
struct drm_xe_query_gt {
-#define XE_QUERY_GT_TYPE_MAIN 0
-#define XE_QUERY_GT_TYPE_REMOTE 1
-#define XE_QUERY_GT_TYPE_MEDIA 2
+#define DRM_XE_QUERY_GT_TYPE_MAIN 0
+#define DRM_XE_QUERY_GT_TYPE_REMOTE 1
+#define DRM_XE_QUERY_GT_TYPE_MEDIA 2
/** @type: GT type: Main, Remote, or Media */
__u16 type;
/** @gt_id: Unique ID of this GT within the PCI Device */
@@ -432,7 +432,7 @@ struct drm_xe_query_topology_mask {
* DSS_GEOMETRY ff ff ff ff 00 00 00 00
* means 32 DSS are available for geometry.
*/
-#define XE_TOPO_DSS_GEOMETRY (1 << 0)
+#define DRM_XE_TOPO_DSS_GEOMETRY (1 << 0)
/*
* To query the mask of Dual Sub Slices (DSS) available for compute
* operations. For example a query response containing the following
@@ -440,7 +440,7 @@ struct drm_xe_query_topology_mask {
* DSS_COMPUTE ff ff ff ff 00 00 00 00
* means 32 DSS are available for compute.
*/
-#define XE_TOPO_DSS_COMPUTE (1 << 1)
+#define DRM_XE_TOPO_DSS_COMPUTE (1 << 1)
/*
* To query the mask of Execution Units (EU) available per Dual Sub
* Slices (DSS). For example a query response containing the following
@@ -448,7 +448,7 @@ struct drm_xe_query_topology_mask {
* EU_PER_DSS ff ff 00 00 00 00 00 00
* means each DSS has 16 EU.
*/
-#define XE_TOPO_EU_PER_DSS (1 << 2)
+#define DRM_XE_TOPO_EU_PER_DSS (1 << 2)
/** @type: type of mask */
__u16 type;
@@ -467,8 +467,8 @@ struct drm_xe_query_topology_mask {
*/
struct drm_xe_query_uc_fw_version {
/** @uc: The micro-controller type to query firmware version */
-#define XE_QUERY_UC_TYPE_GUC 0
-#define XE_QUERY_UC_TYPE_HUC 1
+#define DRM_XE_QUERY_UC_TYPE_GUC 0
+#define DRM_XE_QUERY_UC_TYPE_HUC 1
__u16 uc_type;
/** @pad: MBZ */
@@ -572,8 +572,8 @@ struct drm_xe_gem_create {
*/
__u64 size;
-#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
-#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
+#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
+#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
/*
* When using VRAM as a possible placement, ensure that the corresponding VRAM
* allocation will always use the CPU accessible part of VRAM. This is important
@@ -589,7 +589,7 @@ struct drm_xe_gem_create {
* display surfaces, therefore the kernel requires setting this flag for such
* objects, otherwise an error is thrown on small-bar systems.
*/
-#define XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)
+#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)
/**
* @flags: Flags, currently a mask of memory instances of where BO can
* be placed
@@ -656,14 +656,14 @@ struct drm_xe_ext_set_property {
};
struct drm_xe_vm_create {
-#define XE_VM_EXTENSION_SET_PROPERTY 0
+#define DRM_XE_VM_EXTENSION_SET_PROPERTY 0
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
-#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
-#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
-#define DRM_XE_VM_CREATE_ASYNC_DEFAULT (0x1 << 2)
-#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
+#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
+#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
+#define DRM_XE_VM_CREATE_ASYNC_DEFAULT (0x1 << 2)
+#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
/** @flags: Flags */
__u32 flags;
@@ -722,29 +722,29 @@ struct drm_xe_vm_bind_op {
*/
__u64 tile_mask;
-#define XE_VM_BIND_OP_MAP 0x0
-#define XE_VM_BIND_OP_UNMAP 0x1
-#define XE_VM_BIND_OP_MAP_USERPTR 0x2
-#define XE_VM_BIND_OP_UNMAP_ALL 0x3
-#define XE_VM_BIND_OP_PREFETCH 0x4
+#define DRM_XE_VM_BIND_OP_MAP 0x0
+#define DRM_XE_VM_BIND_OP_UNMAP 0x1
+#define DRM_XE_VM_BIND_OP_MAP_USERPTR 0x2
+#define DRM_XE_VM_BIND_OP_UNMAP_ALL 0x3
+#define DRM_XE_VM_BIND_OP_PREFETCH 0x4
/** @op: Bind operation to perform */
__u32 op;
-#define XE_VM_BIND_FLAG_READONLY (0x1 << 0)
-#define XE_VM_BIND_FLAG_ASYNC (0x1 << 1)
+#define DRM_XE_VM_BIND_FLAG_READONLY (0x1 << 0)
+#define DRM_XE_VM_BIND_FLAG_ASYNC (0x1 << 1)
/*
* Valid on a faulting VM only, do the MAP operation immediately rather
* than deferring the MAP to the page fault handler.
*/
-#define XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 2)
+#define DRM_XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 2)
/*
* When the NULL flag is set, the page tables are setup with a special
* bit which indicates writes are dropped and all reads return zero. In
- * the future, the NULL flags will only be valid for XE_VM_BIND_OP_MAP
+ * the future, the NULL flags will only be valid for DRM_XE_VM_BIND_OP_MAP
* operations, the BO handle MBZ, and the BO offset MBZ. This flag is
* intended to implement VK sparse bindings.
*/
-#define XE_VM_BIND_FLAG_NULL (0x1 << 3)
+#define DRM_XE_VM_BIND_FLAG_NULL (0x1 << 3)
/** @flags: Bind flags */
__u32 flags;
@@ -811,14 +811,14 @@ struct drm_xe_exec_queue_set_property {
/** @exec_queue_id: Exec queue ID */
__u32 exec_queue_id;
-#define XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0
-#define XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1
-#define XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
-#define XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE 3
-#define XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT 4
-#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER 5
-#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY 6
-#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY 7
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE 3
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT 4
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER 5
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY 6
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY 7
/** @property: property to set */
__u32 property;
@@ -830,7 +830,7 @@ struct drm_xe_exec_queue_set_property {
};
struct drm_xe_exec_queue_create {
-#define XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0
+#define DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
@@ -869,7 +869,7 @@ struct drm_xe_exec_queue_get_property {
/** @exec_queue_id: Exec queue ID */
__u32 exec_queue_id;
-#define XE_EXEC_QUEUE_GET_PROPERTY_BAN 0
+#define DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN 0
/** @property: property to get */
__u32 property;
@@ -1058,8 +1058,8 @@ struct drm_xe_vm_madvise {
* For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see enum
* drm_xe_memory_class.
*/
-#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
-#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
+#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
+#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
/*
* In this case lower 32 bits are mem class, upper 32 are GT.
* Combination provides a single IOCTL plus migrate VMA to preferred
@@ -1070,25 +1070,25 @@ struct drm_xe_vm_madvise {
* The CPU will do atomic memory operations to this VMA. Must be set on
* some devices for atomics to behave correctly.
*/
-#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
+#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
/*
* The device will do atomic memory operations to this VMA. Must be set
* on some devices for atomics to behave correctly.
*/
-#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
+#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
/*
* Priority WRT to eviction (moving from preferred memory location due
* to memory pressure). The lower the priority, the more likely to be
* evicted.
*/
-#define DRM_XE_VM_MADVISE_PRIORITY 5
-#define DRM_XE_VMA_PRIORITY_LOW 0
+#define DRM_XE_VM_MADVISE_PRIORITY 5
+#define DRM_XE_VMA_PRIORITY_LOW 0
/* Default */
-#define DRM_XE_VMA_PRIORITY_NORMAL 1
+#define DRM_XE_VMA_PRIORITY_NORMAL 1
/* Must be user with elevated privileges */
-#define DRM_XE_VMA_PRIORITY_HIGH 2
+#define DRM_XE_VMA_PRIORITY_HIGH 2
/* Pin the VMA in memory, must be user with elevated privileges */
-#define DRM_XE_VM_MADVISE_PIN 6
+#define DRM_XE_VM_MADVISE_PIN 6
/** @property: property to set */
__u32 property;
@@ -1109,7 +1109,7 @@ struct drm_xe_vm_madvise {
* in 'struct perf_event_attr' as part of perf_event_open syscall to read a
* particular event.
*
- * For example to open the XE_PMU_INTERRUPTS(0):
+ * For example to open the DRM_XE_PMU_INTERRUPTS(0):
*
* .. code-block:: C
*
@@ -1123,7 +1123,7 @@ struct drm_xe_vm_madvise {
* attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED;
* attr.use_clockid = 1;
* attr.clockid = CLOCK_MONOTONIC;
- * attr.config = XE_PMU_INTERRUPTS(0);
+ * attr.config = DRM_XE_PMU_INTERRUPTS(0);
*
* fd = syscall(__NR_perf_event_open, &attr, -1, cpu, -1, 0);
*/
@@ -1136,11 +1136,11 @@ struct drm_xe_vm_madvise {
#define ___XE_PMU_OTHER(gt, x) \
(((__u64)(x)) | ((__u64)(gt) << __XE_PMU_GT_SHIFT))
-#define XE_PMU_INTERRUPTS(gt) ___XE_PMU_OTHER(gt, 0)
-#define XE_PMU_RENDER_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 1)
-#define XE_PMU_COPY_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 2)
-#define XE_PMU_MEDIA_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 3)
-#define XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 4)
+#define DRM_XE_PMU_INTERRUPTS(gt) ___XE_PMU_OTHER(gt, 0)
+#define DRM_XE_PMU_RENDER_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 1)
+#define DRM_XE_PMU_COPY_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 2)
+#define DRM_XE_PMU_MEDIA_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 3)
+#define DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 4)
#if defined(__cplusplus)
}
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-xe] [RFC v1 09/17] drm/xe/uapi: Add _FLAG to uAPI constants usable for flags
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
` (7 preceding siblings ...)
2023-10-11 13:59 ` [Intel-xe] [RFC v1 08/17] drm/xe/uapi: Add missing DRM_ prefix in uAPI constants Francois Dugast
@ 2023-10-11 13:59 ` Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 10/17] fixup! drm/xe: Add uAPI to query micro-controler firmware version Francois Dugast
` (9 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe; +Cc: Francois Dugast
Most constants defined in xe_drm.h which can be used for flags are
named DRM_XE_*_FLAG_*, which is helpful to identify them. Make this
systematic and add _FLAG where it was missing.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_sync.c | 16 ++++++-------
drivers/gpu/drm/xe/xe_vm.c | 32 ++++++++++++-------------
drivers/gpu/drm/xe/xe_vm_doc.h | 2 +-
drivers/gpu/drm/xe/xe_wait_user_fence.c | 10 ++++----
include/uapi/drm/xe_drm.h | 30 +++++++++++------------
5 files changed, 45 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_sync.c b/drivers/gpu/drm/xe/xe_sync.c
index 73ef259aa387..eafe53c2f55d 100644
--- a/drivers/gpu/drm/xe/xe_sync.c
+++ b/drivers/gpu/drm/xe/xe_sync.c
@@ -110,14 +110,14 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
return -EFAULT;
if (XE_IOCTL_DBG(xe, sync_in.flags &
- ~(SYNC_FLAGS_TYPE_MASK | DRM_XE_SYNC_SIGNAL)) ||
+ ~(SYNC_FLAGS_TYPE_MASK | DRM_XE_SYNC_FLAG_SIGNAL)) ||
XE_IOCTL_DBG(xe, sync_in.pad) ||
XE_IOCTL_DBG(xe, sync_in.reserved[0] || sync_in.reserved[1]))
return -EINVAL;
- signal = sync_in.flags & DRM_XE_SYNC_SIGNAL;
+ signal = sync_in.flags & DRM_XE_SYNC_FLAG_SIGNAL;
switch (sync_in.flags & SYNC_FLAGS_TYPE_MASK) {
- case DRM_XE_SYNC_SYNCOBJ:
+ case DRM_XE_SYNC_FLAG_SYNCOBJ:
if (XE_IOCTL_DBG(xe, no_dma_fences && signal))
return -EOPNOTSUPP;
@@ -135,7 +135,7 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
}
break;
- case DRM_XE_SYNC_TIMELINE_SYNCOBJ:
+ case DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ:
if (XE_IOCTL_DBG(xe, no_dma_fences && signal))
return -EOPNOTSUPP;
@@ -165,12 +165,12 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
}
break;
- case DRM_XE_SYNC_DMA_BUF:
+ case DRM_XE_SYNC_FLAG_DMA_BUF:
if (XE_IOCTL_DBG(xe, "TODO"))
return -EINVAL;
break;
- case DRM_XE_SYNC_USER_FENCE:
+ case DRM_XE_SYNC_FLAG_USER_FENCE:
if (XE_IOCTL_DBG(xe, !signal))
return -EOPNOTSUPP;
@@ -225,7 +225,7 @@ int xe_sync_entry_add_deps(struct xe_sync_entry *sync, struct xe_sched_job *job)
void xe_sync_entry_signal(struct xe_sync_entry *sync, struct xe_sched_job *job,
struct dma_fence *fence)
{
- if (!(sync->flags & DRM_XE_SYNC_SIGNAL))
+ if (!(sync->flags & DRM_XE_SYNC_FLAG_SIGNAL))
return;
if (sync->chain_fence) {
@@ -253,7 +253,7 @@ void xe_sync_entry_signal(struct xe_sync_entry *sync, struct xe_sched_job *job,
dma_fence_put(fence);
}
} else if ((sync->flags & SYNC_FLAGS_TYPE_MASK) ==
- DRM_XE_SYNC_USER_FENCE) {
+ DRM_XE_SYNC_FLAG_USER_FENCE) {
job->user_fence.used = true;
job->user_fence.addr = sync->addr;
job->user_fence.value = sync->timeline_value;
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 8758d2d140df..9a441cd1ce58 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -1911,10 +1911,10 @@ static int xe_vm_unbind(struct xe_vm *vm, struct xe_vma *vma,
return 0;
}
-#define ALL_DRM_XE_VM_CREATE_FLAGS (DRM_XE_VM_CREATE_SCRATCH_PAGE | \
- DRM_XE_VM_CREATE_COMPUTE_MODE | \
- DRM_XE_VM_CREATE_ASYNC_DEFAULT | \
- DRM_XE_VM_CREATE_FAULT_MODE)
+#define ALL_DRM_XE_VM_CREATE_FLAGS (DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE | \
+ DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE | \
+ DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT | \
+ DRM_XE_VM_CREATE_FLAG_FAULT_MODE)
int xe_vm_create_ioctl(struct drm_device *dev, void *data,
struct drm_file *file)
@@ -1932,9 +1932,9 @@ int xe_vm_create_ioctl(struct drm_device *dev, void *data,
return -EINVAL;
if (XE_WA(xe_root_mmio_gt(xe), 14016763929))
- args->flags |= DRM_XE_VM_CREATE_SCRATCH_PAGE;
+ args->flags |= DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE;
- if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FAULT_MODE &&
+ if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE &&
!xe->info.supports_usm))
return -EINVAL;
@@ -1944,32 +1944,32 @@ int xe_vm_create_ioctl(struct drm_device *dev, void *data,
if (XE_IOCTL_DBG(xe, args->flags & ~ALL_DRM_XE_VM_CREATE_FLAGS))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_SCRATCH_PAGE &&
- args->flags & DRM_XE_VM_CREATE_FAULT_MODE))
+ if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE &&
+ args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_COMPUTE_MODE &&
- args->flags & DRM_XE_VM_CREATE_FAULT_MODE))
+ if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE &&
+ args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FAULT_MODE &&
+ if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE &&
xe_device_in_non_fault_mode(xe)))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, !(args->flags & DRM_XE_VM_CREATE_FAULT_MODE) &&
+ if (XE_IOCTL_DBG(xe, !(args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE) &&
xe_device_in_fault_mode(xe)))
return -EINVAL;
if (XE_IOCTL_DBG(xe, args->extensions))
return -EINVAL;
- if (args->flags & DRM_XE_VM_CREATE_SCRATCH_PAGE)
+ if (args->flags & DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE)
flags |= XE_VM_FLAG_SCRATCH_PAGE;
- if (args->flags & DRM_XE_VM_CREATE_COMPUTE_MODE)
+ if (args->flags & DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE)
flags |= XE_VM_FLAG_COMPUTE_MODE;
- if (args->flags & DRM_XE_VM_CREATE_ASYNC_DEFAULT)
+ if (args->flags & DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT)
flags |= XE_VM_FLAG_ASYNC_DEFAULT;
- if (args->flags & DRM_XE_VM_CREATE_FAULT_MODE)
+ if (args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE)
flags |= XE_VM_FLAG_FAULT_MODE;
vm = xe_vm_create(xe, flags);
diff --git a/drivers/gpu/drm/xe/xe_vm_doc.h b/drivers/gpu/drm/xe/xe_vm_doc.h
index 516f4dc97223..bdc6659891a5 100644
--- a/drivers/gpu/drm/xe/xe_vm_doc.h
+++ b/drivers/gpu/drm/xe/xe_vm_doc.h
@@ -18,7 +18,7 @@
* Scratch page
* ------------
*
- * If the VM is created with the flag, DRM_XE_VM_CREATE_SCRATCH_PAGE, set the
+ * If the VM is created with the flag, DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE, set the
* entire page table structure defaults pointing to blank page allocated by the
* VM. Invalid memory access rather than fault just read / write to this page.
*
diff --git a/drivers/gpu/drm/xe/xe_wait_user_fence.c b/drivers/gpu/drm/xe/xe_wait_user_fence.c
index 78686908f7fb..13562db6c07f 100644
--- a/drivers/gpu/drm/xe/xe_wait_user_fence.c
+++ b/drivers/gpu/drm/xe/xe_wait_user_fence.c
@@ -79,8 +79,8 @@ static int check_hw_engines(struct xe_device *xe,
return 0;
}
-#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_SOFT_OP | \
- DRM_XE_UFENCE_WAIT_ABSTIME)
+#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP | \
+ DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
#define MAX_OP DRM_XE_UFENCE_WAIT_LTE
static long to_jiffies_timeout(struct xe_device *xe,
@@ -107,7 +107,7 @@ static long to_jiffies_timeout(struct xe_device *xe,
* Save the timeout to an u64 variable because nsecs_to_jiffies
* might return a value that overflows s32 variable.
*/
- if (args->flags & DRM_XE_UFENCE_WAIT_ABSTIME)
+ if (args->flags & DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
t = drm_timeout_abs_to_jiffies(args->timeout);
else
t = nsecs_to_jiffies(args->timeout);
@@ -137,7 +137,7 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
u64_to_user_ptr(args->instances);
u64 addr = args->addr;
int err;
- bool no_engines = args->flags & DRM_XE_UFENCE_WAIT_SOFT_OP;
+ bool no_engines = args->flags & DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP;
long timeout;
ktime_t start;
@@ -206,7 +206,7 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
}
remove_wait_queue(&xe->ufence_wq, &w_wait);
- if (!(args->flags & DRM_XE_UFENCE_WAIT_ABSTIME)) {
+ if (!(args->flags & DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)) {
args->timeout -= ktime_to_ns(ktime_sub(ktime_get(), start));
if (args->timeout < 0)
args->timeout = 0;
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 6a6f47d329c2..4755aa5e73f2 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -660,10 +660,10 @@ struct drm_xe_vm_create {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
-#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
-#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
-#define DRM_XE_VM_CREATE_ASYNC_DEFAULT (0x1 << 2)
-#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
+#define DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE (0x1 << 0)
+#define DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE (0x1 << 1)
+#define DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT (0x1 << 2)
+#define DRM_XE_VM_CREATE_FLAG_FAULT_MODE (0x1 << 3)
/** @flags: Flags */
__u32 flags;
@@ -895,11 +895,11 @@ struct drm_xe_sync {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
-#define DRM_XE_SYNC_SYNCOBJ 0x0
-#define DRM_XE_SYNC_TIMELINE_SYNCOBJ 0x1
-#define DRM_XE_SYNC_DMA_BUF 0x2
-#define DRM_XE_SYNC_USER_FENCE 0x3
-#define DRM_XE_SYNC_SIGNAL 0x10
+#define DRM_XE_SYNC_FLAG_SYNCOBJ 0x0
+#define DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ 0x1
+#define DRM_XE_SYNC_FLAG_DMA_BUF 0x2
+#define DRM_XE_SYNC_FLAG_USER_FENCE 0x3
+#define DRM_XE_SYNC_FLAG_SIGNAL 0x10
__u32 flags;
/** @pad: MBZ */
@@ -985,8 +985,8 @@ struct drm_xe_wait_user_fence {
/** @op: wait operation (type of comparison) */
__u16 op;
-#define DRM_XE_UFENCE_WAIT_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
-#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
+#define DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
+#define DRM_XE_UFENCE_WAIT_FLAG_ABSTIME (1 << 1)
/** @flags: wait flags */
__u16 flags;
@@ -1004,10 +1004,10 @@ struct drm_xe_wait_user_fence {
__u64 mask;
/**
* @timeout: how long to wait before bailing, value in nanoseconds.
- * Without DRM_XE_UFENCE_WAIT_ABSTIME flag set (relative timeout)
+ * Without DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flag set (relative timeout)
* it contains timeout expressed in nanoseconds to wait (fence will
* expire at now() + timeout).
- * When DRM_XE_UFENCE_WAIT_ABSTIME flat is set (absolute timeout) wait
+ * When DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flat is set (absolute timeout) wait
* will end at timeout (uses system MONOTONIC_CLOCK).
* Passing negative timeout leads to neverending wait.
*
@@ -1020,13 +1020,13 @@ struct drm_xe_wait_user_fence {
/**
* @num_engines: number of engine instances to wait on, must be zero
- * when DRM_XE_UFENCE_WAIT_SOFT_OP set
+ * when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
*/
__u64 num_engines;
/**
* @instances: user pointer to array of drm_xe_engine_class_instance to
- * wait on, must be NULL when DRM_XE_UFENCE_WAIT_SOFT_OP set
+ * wait on, must be NULL when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
*/
__u64 instances;
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-xe] [RFC v1 10/17] fixup! drm/xe: Add uAPI to query micro-controler firmware version
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
` (8 preceding siblings ...)
2023-10-11 13:59 ` [Intel-xe] [RFC v1 09/17] drm/xe/uapi: Add _FLAG to uAPI constants usable for flags Francois Dugast
@ 2023-10-11 13:59 ` Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 11/17] drm/xe/uapi: Make constant comments visible in kernel doc Francois Dugast
` (8 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe; +Cc: Francois Dugast
Remove warnings below when building documentation:
./include/uapi/drm/xe_drm.h:491: warning: Function parameter or member 'uc_type' not described in 'drm_xe_query_uc_fw_version'
./include/uapi/drm/xe_drm.h:491: warning: Function parameter or member 'major_ver' not described in 'drm_xe_query_uc_fw_version'
./include/uapi/drm/xe_drm.h:491: warning: Function parameter or member 'minor_ver' not described in 'drm_xe_query_uc_fw_version'
./include/uapi/drm/xe_drm.h:491: warning: Function parameter or member 'patch_ver' not described in 'drm_xe_query_uc_fw_version'
./include/uapi/drm/xe_drm.h:491: warning: Function parameter or member 'branch_ver' not described in 'drm_xe_query_uc_fw_version'
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
include/uapi/drm/xe_drm.h | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 4755aa5e73f2..f0c32da829b9 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -466,7 +466,7 @@ struct drm_xe_query_topology_mask {
* of the micro-controller firmware.
*/
struct drm_xe_query_uc_fw_version {
- /** @uc: The micro-controller type to query firmware version */
+ /** @uc_type: The micro-controller type to query firmware version */
#define DRM_XE_QUERY_UC_TYPE_GUC 0
#define DRM_XE_QUERY_UC_TYPE_HUC 1
__u16 uc_type;
@@ -474,13 +474,13 @@ struct drm_xe_query_uc_fw_version {
/** @pad: MBZ */
__u16 pad;
- /* @major_ver: major uc fw version */
+ /** @major_ver: major uc fw version */
__u32 major_ver;
- /* @minor_ver: minor uc fw version */
+ /** @minor_ver: minor uc fw version */
__u32 minor_ver;
- /* @patch_ver: patch uc fw version */
+ /** @patch_ver: patch uc fw version */
__u32 patch_ver;
- /* @branch_ver: branch uc fw version */
+ /** @branch_ver: branch uc fw version */
__u32 branch_ver;
/** @pad2: MBZ */
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-xe] [RFC v1 11/17] drm/xe/uapi: Make constant comments visible in kernel doc
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
` (9 preceding siblings ...)
2023-10-11 13:59 ` [Intel-xe] [RFC v1 10/17] fixup! drm/xe: Add uAPI to query micro-controler firmware version Francois Dugast
@ 2023-10-11 13:59 ` Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 12/17] fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy Francois Dugast
` (7 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe; +Cc: Francois Dugast
As there is no direct way to make comments of constants directly
visible in the kernel doc, move them to the description of the
structure where they can be used. By doing so they appear in the
"Description" section of the struct documentation.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
include/uapi/drm/xe_drm.h | 264 ++++++++++++++++++++++----------------
1 file changed, 150 insertions(+), 114 deletions(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index f0c32da829b9..307abad33710 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -126,23 +126,40 @@ struct xe_user_extension {
#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
#define DRM_IOCTL_XE_VM_MADVISE DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
-/** struct drm_xe_engine_class_instance - instance of an engine class */
+/**
+ * struct drm_xe_engine_class_instance - instance of an engine class
+ *
+ * The @engine_class can be:
+ * - %DRM_XE_ENGINE_CLASS_RENDER
+ * - %DRM_XE_ENGINE_CLASS_COPY
+ * - %DRM_XE_ENGINE_CLASS_VIDEO_DECODE
+ * - %DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE
+ * - %DRM_XE_ENGINE_CLASS_COMPUTE
+ * - %DRM_XE_ENGINE_CLASS_VM_BIND_ASYNC - Kernel only class (not actual
+ * hardware engine class) used for creating ordered queues of
+ * asynchronous VM bind operations.
+ * - %DRM_XE_ENGINE_CLASS_VM_BIND_SYNC - Kernel only class (not actual
+ * synchronous VM bind operations.
+ *
+ */
struct drm_xe_engine_class_instance {
#define DRM_XE_ENGINE_CLASS_RENDER 0
#define DRM_XE_ENGINE_CLASS_COPY 1
#define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2
#define DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3
#define DRM_XE_ENGINE_CLASS_COMPUTE 4
- /*
- * Kernel only classes (not actual hardware engine class). Used for
- * creating ordered queues of VM bind operations.
- */
#define DRM_XE_ENGINE_CLASS_VM_BIND_ASYNC 5
#define DRM_XE_ENGINE_CLASS_VM_BIND_SYNC 6
+ /**
+ * @engine_class: Class of this instance among possible
+ * DRM_XE_ENGINE_CLASS_*
+ */
__u16 engine_class;
-
+ /** @engine_instance: Engine instance */
__u16 engine_instance;
+ /** @gt_id: GT ID the instance is associated with */
__u16 gt_id;
+ /** @rsvd: Reserved */
__u16 rsvd;
};
@@ -313,44 +330,36 @@ struct drm_xe_query_mem_usage {
* If a query is made with a struct drm_xe_device_query where .query
* is equal to DRM_XE_DEVICE_QUERY_CONFIG, then the reply uses
* struct drm_xe_query_config in .data.
+ *
+ * The index in @info can be:
+ * - %DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID - Device ID (lower 16 bits)
+ * and the device revision (next 8 bits)
+ * - %DRM_XE_QUERY_CONFIG_FLAGS - Flags describing the device
+ * configuration, see list below
+ *
+ * - %DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM - Flag is set if the device
+ * has usable VRAM
+ * - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment
+ * required by this device, typically SZ_4K or SZ_64K
+ * - %DRM_XE_QUERY_CONFIG_VA_BITS - Maximum bits of a virtual address
+ * - %DRM_XE_QUERY_CONFIG_GT_COUNT - Total number of GTs for the entire
+ * device
+ * - %DRM_XE_QUERY_CONFIG_MEM_REGION_COUNT - Total number of accessible
+ * memory regions
+ * - %DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY - Value of the highest
+ * available exec queue priority
*/
struct drm_xe_query_config {
/** @pad: MBZ */
__u32 pad;
- /*
- * Device ID (lower 16 bits) and the device revision (next
- * 8 bits)
- */
#define DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
- /*
- * Flags describing the device configuration, see list below
- */
#define DRM_XE_QUERY_CONFIG_FLAGS 1
- /*
- * Flag is set if the device has usable VRAM
- */
#define DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
- /*
- * Minimal memory alignment required by this device,
- * typically SZ_4K or SZ_64K
- */
#define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2
- /*
- * Maximum bits of a virtual address
- */
#define DRM_XE_QUERY_CONFIG_VA_BITS 3
- /*
- * Total number of GTs for the entire device
- */
#define DRM_XE_QUERY_CONFIG_GT_COUNT 4
- /*
- * Total number of accessible memory regions
- */
#define DRM_XE_QUERY_CONFIG_MEM_REGION_COUNT 5
- /*
- * Value of the highest available exec queue priority
- */
#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 6
/** @info: array of elements containing the config info */
__u64 info[];
@@ -363,6 +372,7 @@ struct drm_xe_query_config {
* existing GT individual descriptions.
* Graphics Technology (GT) is a subset of a GPU/tile that is responsible for
* implementing graphics and/or media operations.
+ *
*/
struct drm_xe_query_gt {
#define DRM_XE_QUERY_GT_TYPE_MAIN 0
@@ -420,34 +430,31 @@ struct drm_xe_query_gt_list {
* If a query is made with a struct drm_xe_device_query where .query
* is equal to DRM_XE_DEVICE_QUERY_GT_TOPOLOGY, then the reply uses
* struct drm_xe_query_topology_mask in .data.
+ *
+ * The @type can be:
+ * - %DRM_XE_TOPO_DSS_GEOMETRY - To query the mask of Dual Sub Slices
+ * (DSS) available for geometry operations. For example a query response
+ * containing the following in mask:
+ * ``DSS_GEOMETRY ff ff ff ff 00 00 00 00``
+ * means 32 DSS are available for geometry.
+ * - %DRM_XE_TOPO_DSS_COMPUTE - To query the mask of Dual Sub Slices
+ * (DSS) available for compute operations. For example a query response
+ * containing the following in mask:
+ * ``DSS_COMPUTE ff ff ff ff 00 00 00 00``
+ * means 32 DSS are available for compute.
+ * - %DRM_XE_TOPO_EU_PER_DSS - To query the mask of Execution Units (EU)
+ * available per Dual Sub Slices (DSS). For example a query response
+ * containing the following in mask:
+ * ``EU_PER_DSS ff ff 00 00 00 00 00 00``
+ * means each DSS has 16 EU.
+ *
*/
struct drm_xe_query_topology_mask {
/** @gt_id: GT ID the mask is associated with */
__u16 gt_id;
- /*
- * To query the mask of Dual Sub Slices (DSS) available for geometry
- * operations. For example a query response containing the following
- * in mask:
- * DSS_GEOMETRY ff ff ff ff 00 00 00 00
- * means 32 DSS are available for geometry.
- */
#define DRM_XE_TOPO_DSS_GEOMETRY (1 << 0)
- /*
- * To query the mask of Dual Sub Slices (DSS) available for compute
- * operations. For example a query response containing the following
- * in mask:
- * DSS_COMPUTE ff ff ff ff 00 00 00 00
- * means 32 DSS are available for compute.
- */
#define DRM_XE_TOPO_DSS_COMPUTE (1 << 1)
- /*
- * To query the mask of Execution Units (EU) available per Dual Sub
- * Slices (DSS). For example a query response containing the following
- * in mask:
- * EU_PER_DSS ff ff 00 00 00 00 00 00
- * means each DSS has 16 EU.
- */
#define DRM_XE_TOPO_EU_PER_DSS (1 << 2)
/** @type: type of mask */
__u16 type;
@@ -497,6 +504,19 @@ struct drm_xe_query_uc_fw_version {
* and sets the value in the query member. This determines the type of
* the structure provided by the driver in data, among struct drm_xe_query_*.
*
+ * The @query can be:
+ * - %DRM_XE_DEVICE_QUERY_ENGINES
+ * - %DRM_XE_DEVICE_QUERY_MEM_USAGE
+ * - %DRM_XE_DEVICE_QUERY_CONFIG
+ * - %DRM_XE_DEVICE_QUERY_GT_LIST - Query type to retrieve the hardware
+ * configuration of the device such as information on slices, memory,
+ * caches, and so on. It is provided as a table of key / value
+ * attributes.
+ * - %DRM_XE_DEVICE_QUERY_HWCONFIG
+ * - %DRM_XE_DEVICE_QUERY_GT_TOPOLOGY
+ * - %DRM_XE_DEVICE_QUERY_ENGINE_CYCLES
+ * - %DRM_XE_DEVICE_QUERY_UC_FW_VERSION
+ *
* If size is set to 0, the driver fills it with the required size for
* the requested type of data to query. If size is equal to the required
* size, the queried information is copied into data. If size is set to
@@ -539,11 +559,6 @@ struct drm_xe_device_query {
#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
#define DRM_XE_DEVICE_QUERY_CONFIG 2
#define DRM_XE_DEVICE_QUERY_GT_LIST 3
- /*
- * Query type to retrieve the hardware configuration of the device
- * such as information on slices, memory, caches, and so on. It is
- * provided as a table of attributes (key / value).
- */
#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
#define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6
@@ -561,6 +576,29 @@ struct drm_xe_device_query {
__u64 reserved[2];
};
+/**
+ * struct drm_xe_gem_create - structure for gem creation
+ *
+ * The @flags can be:
+ * - %DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING
+ * - %DRM_XE_GEM_CREATE_FLAG_SCANOUT
+ * - %DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM - When using VRAM as a
+ * possible placement, ensure that the corresponding VRAM allocation
+ * will always use the CPU accessible part of VRAM. This is important
+ * for small-bar systems (on full-bar systems this gets turned into a
+ * noop).
+ * Note1: System memory can be used as an extra placement if the kernel
+ * should spill the allocation to system memory, if space can't be made
+ * available in the CPU accessible part of VRAM (giving the same
+ * behaviour as the i915 interface, see
+ * I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS).
+ * Note2: For clear-color CCS surfaces the kernel needs to read the
+ * clear-color value stored in the buffer, and on discrete platforms we
+ * need to use VRAM for display surfaces, therefore the kernel requires
+ * setting this flag for such objects, otherwise an error is thrown on
+ * small-bar systems.
+ *
+ */
struct drm_xe_gem_create {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
@@ -574,21 +612,6 @@ struct drm_xe_gem_create {
#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
-/*
- * When using VRAM as a possible placement, ensure that the corresponding VRAM
- * allocation will always use the CPU accessible part of VRAM. This is important
- * for small-bar systems (on full-bar systems this gets turned into a noop).
- *
- * Note: System memory can be used as an extra placement if the kernel should
- * spill the allocation to system memory, if space can't be made available in
- * the CPU accessible part of VRAM (giving the same behaviour as the i915
- * interface, see I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS).
- *
- * Note: For clear-color CCS surfaces the kernel needs to read the clear-color
- * value stored in the buffer, and on discrete platforms we need to use VRAM for
- * display surfaces, therefore the kernel requires setting this flag for such
- * objects, otherwise an error is thrown on small-bar systems.
- */
#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)
/**
* @flags: Flags, currently a mask of memory instances of where BO can
@@ -685,6 +708,30 @@ struct drm_xe_vm_destroy {
__u64 reserved[2];
};
+/**
+ * struct drm_xe_vm_bind_op - run bind operations
+ *
+ * The @op can be:
+ * - %DRM_XE_VM_BIND_OP_MAP
+ * - %DRM_XE_VM_BIND_OP_UNMAP
+ * - %DRM_XE_VM_BIND_OP_MAP_USERPTR
+ * - %DRM_XE_VM_BIND_OP_UNMAP_ALL
+ * - %DRM_XE_VM_BIND_OP_PREFETCH
+ *
+ * and the @flags can be:
+ * - %DRM_XE_VM_BIND_FLAG_READONLY
+ * - %DRM_XE_VM_BIND_FLAG_ASYNC
+ * - %DRM_XE_VM_BIND_FLAG_IMMEDIATE - Valid on a faulting VM only, do the
+ * MAP operation immediately rather than deferring the MAP to the page
+ * fault handler.
+ * - %DRM_XE_VM_BIND_FLAG_NULL - When the NULL flag is set, the page
+ * tables are setup with a special bit which indicates writes are
+ * dropped and all reads return zero. In the future, the NULL flags
+ * will only be valid for DRM_XE_VM_BIND_OP_MAP operations, the BO
+ * handle MBZ, and the BO offset MBZ. This flag is intended to
+ * implement VK sparse bindings.
+ *
+ */
struct drm_xe_vm_bind_op {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
@@ -732,23 +779,12 @@ struct drm_xe_vm_bind_op {
#define DRM_XE_VM_BIND_FLAG_READONLY (0x1 << 0)
#define DRM_XE_VM_BIND_FLAG_ASYNC (0x1 << 1)
- /*
- * Valid on a faulting VM only, do the MAP operation immediately rather
- * than deferring the MAP to the page fault handler.
- */
#define DRM_XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 2)
- /*
- * When the NULL flag is set, the page tables are setup with a special
- * bit which indicates writes are dropped and all reads return zero. In
- * the future, the NULL flags will only be valid for DRM_XE_VM_BIND_OP_MAP
- * operations, the BO handle MBZ, and the BO offset MBZ. This flag is
- * intended to implement VK sparse bindings.
- */
#define DRM_XE_VM_BIND_FLAG_NULL (0x1 << 3)
/** @flags: Bind flags */
__u32 flags;
- /** @mem_region: Memory region to prefetch VMA to, instance not a mask */
+ /** @region: Memory region to prefetch VMA to, instance not a mask */
__u32 region;
/** @reserved: Reserved */
@@ -1034,6 +1070,35 @@ struct drm_xe_wait_user_fence {
__u64 reserved[2];
};
+/**
+ * struct drm_xe_vm_madvise - give advice about use of memory
+ *
+ * The @property can be:
+ * - %DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS - Setting the preferred
+ * location will trigger a migrate of the VMA backing store to new
+ * location if the backing store is already allocated.
+ * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see enum
+ * drm_xe_memory_class.
+ * - %DRM_XE_VM_MADVISE_PREFERRED_GT
+ * - %DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT - In this case lower 32 bits
+ * are mem class, upper 32 are GT. Combination provides a single IOCTL
+ * plus migrate VMA to preferred location.
+ * - %DRM_XE_VM_MADVISE_CPU_ATOMIC - The CPU will do atomic memory
+ * operations to this VMA. Must be set on some devices for atomics to
+ * behave correctly.
+ * - %DRM_XE_VM_MADVISE_DEVICE_ATOMIC - The device will do atomic memory
+ * operations to this VMA. Must be set on some devices for atomics to
+ * behave correctly.
+ * - %DRM_XE_VM_MADVISE_PRIORITY - Priority WRT to eviction (moving from
+ * preferred memory location due to memory pressure). The lower the
+ * priority, the more likely to be evicted.
+ *
+ * - %DRM_XE_VMA_PRIORITY_LOW
+ * - %DRM_XE_VMA_PRIORITY_NORMAL - Default
+ * - %DRM_XE_VMA_PRIORITY_HIGH - Must be user with elevated privileges
+ * - %DRM_XE_VM_MADVISE_PIN - Pin the VMA in memory, must be user with
+ * elevated privileges
+ */
struct drm_xe_vm_madvise {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
@@ -1050,44 +1115,15 @@ struct drm_xe_vm_madvise {
/** @addr: Address of the VMA to operation on */
__u64 addr;
- /*
- * Setting the preferred location will trigger a migrate of the VMA
- * backing store to new location if the backing store is already
- * allocated.
- *
- * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see enum
- * drm_xe_memory_class.
- */
#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
- /*
- * In this case lower 32 bits are mem class, upper 32 are GT.
- * Combination provides a single IOCTL plus migrate VMA to preferred
- * location.
- */
#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT 2
- /*
- * The CPU will do atomic memory operations to this VMA. Must be set on
- * some devices for atomics to behave correctly.
- */
#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
- /*
- * The device will do atomic memory operations to this VMA. Must be set
- * on some devices for atomics to behave correctly.
- */
#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
- /*
- * Priority WRT to eviction (moving from preferred memory location due
- * to memory pressure). The lower the priority, the more likely to be
- * evicted.
- */
#define DRM_XE_VM_MADVISE_PRIORITY 5
#define DRM_XE_VMA_PRIORITY_LOW 0
- /* Default */
#define DRM_XE_VMA_PRIORITY_NORMAL 1
- /* Must be user with elevated privileges */
#define DRM_XE_VMA_PRIORITY_HIGH 2
- /* Pin the VMA in memory, must be user with elevated privileges */
#define DRM_XE_VM_MADVISE_PIN 6
/** @property: property to set */
__u32 property;
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-xe] [RFC v1 12/17] fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
` (10 preceding siblings ...)
2023-10-11 13:59 ` [Intel-xe] [RFC v1 11/17] drm/xe/uapi: Make constant comments visible in kernel doc Francois Dugast
@ 2023-10-11 13:59 ` Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 13/17] drm/xe/uapi: Remove GT_TYPE_REMOTE Francois Dugast
` (6 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe
From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Change rsvd to pad in struct drm_xe_class_instance to prevent the field
from being used in future.
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 5 ++++-
include/uapi/drm/xe_drm.h | 4 ++--
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index ab9c061784c7..063a224492eb 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -215,7 +215,10 @@ static int query_engines(struct xe_device *xe,
xe_to_user_engine_class[hwe->class];
hw_engine_info[i].engine_instance =
hwe->logical_instance;
- hw_engine_info[i++].gt_id = gt->info.id;
+ hw_engine_info[i].gt_id = gt->info.id;
+ hw_engine_info[i].pad = 0;
+
+ i++;
}
if (copy_to_user(query_ptr, hw_engine_info, size)) {
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 307abad33710..2c5bf02c9b0b 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -159,8 +159,8 @@ struct drm_xe_engine_class_instance {
__u16 engine_instance;
/** @gt_id: GT ID the instance is associated with */
__u16 gt_id;
- /** @rsvd: Reserved */
- __u16 rsvd;
+ /** @pad: MBZ */
+ __u16 pad;
};
/**
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-xe] [RFC v1 13/17] drm/xe/uapi: Remove GT_TYPE_REMOTE
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
` (11 preceding siblings ...)
2023-10-11 13:59 ` [Intel-xe] [RFC v1 12/17] fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy Francois Dugast
@ 2023-10-11 13:59 ` Francois Dugast
2023-10-11 14:56 ` Matt Roper
2023-10-11 13:59 ` [Intel-xe] [RFC v1 14/17] drm/xe/uapi: Kill VM_MADVISE IOCTL Francois Dugast
` (5 subsequent siblings)
18 siblings, 1 reply; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe; +Cc: Carl Zhang, Francois Dugast, Matt Roper, Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
With the split between tile and gt, this is currently unused.
Also it is bringing confusion because main vs remote would be
more a concept of the tile itself and not about GT.
So, the MAIN one is the traditional GT used for every operation
in older platforms, and for render/graphics and compute on platforms
that contains the stand-alone Media GT.
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Francois Dugast <francois.dugast@intel.com>
Cc: Carl Zhang <carl.zhang@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 2 --
include/uapi/drm/xe_drm.h | 5 ++---
2 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 063a224492eb..c5196abbd15d 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -375,8 +375,6 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
for_each_gt(gt, xe, id) {
if (xe_gt_is_media_type(gt))
gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA;
- else if (gt_to_tile(gt)->id > 0)
- gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_REMOTE;
else
gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
gt_list->gt_list[id].gt_id = gt->info.id;
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 2c5bf02c9b0b..2008a7e61178 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -376,9 +376,8 @@ struct drm_xe_query_config {
*/
struct drm_xe_query_gt {
#define DRM_XE_QUERY_GT_TYPE_MAIN 0
-#define DRM_XE_QUERY_GT_TYPE_REMOTE 1
-#define DRM_XE_QUERY_GT_TYPE_MEDIA 2
- /** @type: GT type: Main, Remote, or Media */
+#define DRM_XE_QUERY_GT_TYPE_MEDIA 1
+ /** @type: GT type: Main or Media */
__u16 type;
/** @gt_id: Unique ID of this GT within the PCI Device */
__u16 gt_id;
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-xe] [RFC v1 14/17] drm/xe/uapi: Kill VM_MADVISE IOCTL
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
` (12 preceding siblings ...)
2023-10-11 13:59 ` [Intel-xe] [RFC v1 13/17] drm/xe/uapi: Remove GT_TYPE_REMOTE Francois Dugast
@ 2023-10-11 13:59 ` Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 15/17] drm/xe/uapi: Separate bo_create placement from flags Francois Dugast
` (4 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Remove unused IOCTL.
Without any userspace using it we need to remove before we
can be accepted upstream.
At this point we are breaking the compatibility for good,
so we don't need to break when we are in-tree. So, let's
also use this breakage to sort out the IOCTL entries and
fix all the small indentation and line issues.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/Makefile | 1 -
drivers/gpu/drm/xe/xe_bo.c | 2 +-
drivers/gpu/drm/xe/xe_bo_types.h | 3 +
drivers/gpu/drm/xe/xe_device.c | 8 +-
drivers/gpu/drm/xe/xe_vm_madvise.c | 299 -----------------------------
drivers/gpu/drm/xe/xe_vm_madvise.h | 15 --
include/uapi/drm/xe_drm.h | 92 ++-------
7 files changed, 18 insertions(+), 402 deletions(-)
delete mode 100644 drivers/gpu/drm/xe/xe_vm_madvise.c
delete mode 100644 drivers/gpu/drm/xe/xe_vm_madvise.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index dff1386ee6b3..92beaded57cc 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -113,7 +113,6 @@ xe-y += xe_bb.o \
xe_uc_debugfs.o \
xe_uc_fw.o \
xe_vm.o \
- xe_vm_madvise.o \
xe_wait_user_fence.o \
xe_wa.o \
xe_wopcm.o
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 5b9f07838061..4f0cd65c8522 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -1235,7 +1235,7 @@ struct xe_bo *__xe_bo_create_locked(struct xe_device *xe, struct xe_bo *bo,
bo->props.preferred_mem_class = XE_BO_PROPS_INVALID;
bo->props.preferred_gt = XE_BO_PROPS_INVALID;
bo->props.preferred_mem_type = XE_BO_PROPS_INVALID;
- bo->ttm.priority = DRM_XE_VMA_PRIORITY_NORMAL;
+ bo->ttm.priority = XE_BO_PRIORITY_NORMAL;
INIT_LIST_HEAD(&bo->pinned_link);
#ifdef CONFIG_PROC_FS
INIT_LIST_HEAD(&bo->client_link);
diff --git a/drivers/gpu/drm/xe/xe_bo_types.h b/drivers/gpu/drm/xe/xe_bo_types.h
index 051fe990c133..4bff60996168 100644
--- a/drivers/gpu/drm/xe/xe_bo_types.h
+++ b/drivers/gpu/drm/xe/xe_bo_types.h
@@ -19,6 +19,9 @@ struct xe_vm;
#define XE_BO_MAX_PLACEMENTS 3
+/* TODO: To be selected with VM_MADVISE */
+#define XE_BO_PRIORITY_NORMAL 1
+
/** @xe_bo: XE buffer object */
struct xe_bo {
/** @ttm: TTM base buffer object */
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 3f0d24f1ae3e..90ad8d2b65a7 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -34,7 +34,6 @@
#include "xe_ttm_stolen_mgr.h"
#include "xe_ttm_sys_mgr.h"
#include "xe_vm.h"
-#include "xe_vm_madvise.h"
#include "xe_wait_user_fence.h"
#include "xe_hwmon.h"
@@ -115,18 +114,17 @@ static const struct drm_ioctl_desc xe_ioctls[] = {
DRM_IOCTL_DEF_DRV(XE_VM_CREATE, xe_vm_create_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_VM_DESTROY, xe_vm_destroy_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_VM_BIND, xe_vm_bind_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(XE_EXEC, xe_exec_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_EXEC_QUEUE_CREATE, xe_exec_queue_create_ioctl,
DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(XE_EXEC_QUEUE_GET_PROPERTY, xe_exec_queue_get_property_ioctl,
- DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_EXEC_QUEUE_DESTROY, xe_exec_queue_destroy_ioctl,
DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(XE_EXEC, xe_exec_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_EXEC_QUEUE_SET_PROPERTY, xe_exec_queue_set_property_ioctl,
DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(XE_EXEC_QUEUE_GET_PROPERTY, xe_exec_queue_get_property_ioctl,
+ DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_WAIT_USER_FENCE, xe_wait_user_fence_ioctl,
DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(XE_VM_MADVISE, xe_vm_madvise_ioctl, DRM_RENDER_ALLOW),
};
static const struct file_operations xe_driver_fops = {
diff --git a/drivers/gpu/drm/xe/xe_vm_madvise.c b/drivers/gpu/drm/xe/xe_vm_madvise.c
deleted file mode 100644
index 72d051ecac5c..000000000000
--- a/drivers/gpu/drm/xe/xe_vm_madvise.c
+++ /dev/null
@@ -1,299 +0,0 @@
-// SPDX-License-Identifier: MIT
-/*
- * Copyright © 2021 Intel Corporation
- */
-
-#include "xe_vm_madvise.h"
-
-#include <linux/nospec.h>
-
-#include <drm/ttm/ttm_tt.h>
-#include <drm/xe_drm.h>
-
-#include "xe_bo.h"
-#include "xe_vm.h"
-
-static int madvise_preferred_mem_class(struct xe_device *xe, struct xe_vm *vm,
- struct xe_vma **vmas, int num_vmas,
- u64 value)
-{
- int i, err;
-
- if (XE_IOCTL_DBG(xe, value > DRM_XE_MEM_REGION_CLASS_VRAM))
- return -EINVAL;
-
- if (XE_IOCTL_DBG(xe, value == DRM_XE_MEM_REGION_CLASS_VRAM &&
- !xe->info.is_dgfx))
- return -EINVAL;
-
- for (i = 0; i < num_vmas; ++i) {
- struct xe_bo *bo;
-
- bo = xe_vma_bo(vmas[i]);
-
- err = xe_bo_lock(bo, true);
- if (err)
- return err;
- bo->props.preferred_mem_class = value;
- xe_bo_placement_for_flags(xe, bo, bo->flags);
- xe_bo_unlock(bo);
- }
-
- return 0;
-}
-
-static int madvise_preferred_gt(struct xe_device *xe, struct xe_vm *vm,
- struct xe_vma **vmas, int num_vmas, u64 value)
-{
- int i, err;
-
- if (XE_IOCTL_DBG(xe, value > xe->info.tile_count))
- return -EINVAL;
-
- for (i = 0; i < num_vmas; ++i) {
- struct xe_bo *bo;
-
- bo = xe_vma_bo(vmas[i]);
-
- err = xe_bo_lock(bo, true);
- if (err)
- return err;
- bo->props.preferred_gt = value;
- xe_bo_placement_for_flags(xe, bo, bo->flags);
- xe_bo_unlock(bo);
- }
-
- return 0;
-}
-
-static int madvise_preferred_mem_class_gt(struct xe_device *xe,
- struct xe_vm *vm,
- struct xe_vma **vmas, int num_vmas,
- u64 value)
-{
- int i, err;
- u32 gt_id = upper_32_bits(value);
- u32 mem_class = lower_32_bits(value);
-
- if (XE_IOCTL_DBG(xe, mem_class > DRM_XE_MEM_REGION_CLASS_VRAM))
- return -EINVAL;
-
- if (XE_IOCTL_DBG(xe, mem_class == DRM_XE_MEM_REGION_CLASS_VRAM &&
- !xe->info.is_dgfx))
- return -EINVAL;
-
- if (XE_IOCTL_DBG(xe, gt_id > xe->info.tile_count))
- return -EINVAL;
-
- for (i = 0; i < num_vmas; ++i) {
- struct xe_bo *bo;
-
- bo = xe_vma_bo(vmas[i]);
-
- err = xe_bo_lock(bo, true);
- if (err)
- return err;
- bo->props.preferred_mem_class = mem_class;
- bo->props.preferred_gt = gt_id;
- xe_bo_placement_for_flags(xe, bo, bo->flags);
- xe_bo_unlock(bo);
- }
-
- return 0;
-}
-
-static int madvise_cpu_atomic(struct xe_device *xe, struct xe_vm *vm,
- struct xe_vma **vmas, int num_vmas, u64 value)
-{
- int i, err;
-
- for (i = 0; i < num_vmas; ++i) {
- struct xe_bo *bo;
-
- bo = xe_vma_bo(vmas[i]);
- if (XE_IOCTL_DBG(xe, !(bo->flags & XE_BO_CREATE_SYSTEM_BIT)))
- return -EINVAL;
-
- err = xe_bo_lock(bo, true);
- if (err)
- return err;
- bo->props.cpu_atomic = !!value;
-
- /*
- * All future CPU accesses must be from system memory only, we
- * just invalidate the CPU page tables which will trigger a
- * migration on next access.
- */
- if (bo->props.cpu_atomic)
- ttm_bo_unmap_virtual(&bo->ttm);
- xe_bo_unlock(bo);
- }
-
- return 0;
-}
-
-static int madvise_device_atomic(struct xe_device *xe, struct xe_vm *vm,
- struct xe_vma **vmas, int num_vmas, u64 value)
-{
- int i, err;
-
- for (i = 0; i < num_vmas; ++i) {
- struct xe_bo *bo;
-
- bo = xe_vma_bo(vmas[i]);
- if (XE_IOCTL_DBG(xe, !(bo->flags & XE_BO_CREATE_VRAM0_BIT) &&
- !(bo->flags & XE_BO_CREATE_VRAM1_BIT)))
- return -EINVAL;
-
- err = xe_bo_lock(bo, true);
- if (err)
- return err;
- bo->props.device_atomic = !!value;
- xe_bo_unlock(bo);
- }
-
- return 0;
-}
-
-static int madvise_priority(struct xe_device *xe, struct xe_vm *vm,
- struct xe_vma **vmas, int num_vmas, u64 value)
-{
- int i, err;
-
- if (XE_IOCTL_DBG(xe, value > DRM_XE_VMA_PRIORITY_HIGH))
- return -EINVAL;
-
- if (XE_IOCTL_DBG(xe, value == DRM_XE_VMA_PRIORITY_HIGH &&
- !capable(CAP_SYS_NICE)))
- return -EPERM;
-
- for (i = 0; i < num_vmas; ++i) {
- struct xe_bo *bo;
-
- bo = xe_vma_bo(vmas[i]);
-
- err = xe_bo_lock(bo, true);
- if (err)
- return err;
- bo->ttm.priority = value;
- ttm_bo_move_to_lru_tail(&bo->ttm);
- xe_bo_unlock(bo);
- }
-
- return 0;
-}
-
-static int madvise_pin(struct xe_device *xe, struct xe_vm *vm,
- struct xe_vma **vmas, int num_vmas, u64 value)
-{
- drm_warn(&xe->drm, "NIY");
- return 0;
-}
-
-typedef int (*madvise_func)(struct xe_device *xe, struct xe_vm *vm,
- struct xe_vma **vmas, int num_vmas, u64 value);
-
-static const madvise_func madvise_funcs[] = {
- [DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS] = madvise_preferred_mem_class,
- [DRM_XE_VM_MADVISE_PREFERRED_GT] = madvise_preferred_gt,
- [DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT] =
- madvise_preferred_mem_class_gt,
- [DRM_XE_VM_MADVISE_CPU_ATOMIC] = madvise_cpu_atomic,
- [DRM_XE_VM_MADVISE_DEVICE_ATOMIC] = madvise_device_atomic,
- [DRM_XE_VM_MADVISE_PRIORITY] = madvise_priority,
- [DRM_XE_VM_MADVISE_PIN] = madvise_pin,
-};
-
-static struct xe_vma **
-get_vmas(struct xe_vm *vm, int *num_vmas, u64 addr, u64 range)
-{
- struct xe_vma **vmas, **__vmas;
- struct drm_gpuva *gpuva;
- int max_vmas = 8;
-
- lockdep_assert_held(&vm->lock);
-
- vmas = kmalloc(max_vmas * sizeof(*vmas), GFP_KERNEL);
- if (!vmas)
- return NULL;
-
- drm_gpuvm_for_each_va_range(gpuva, &vm->gpuvm, addr, addr + range) {
- struct xe_vma *vma = gpuva_to_vma(gpuva);
-
- if (xe_vma_is_userptr(vma))
- continue;
-
- if (*num_vmas == max_vmas) {
- max_vmas <<= 1;
- __vmas = krealloc(vmas, max_vmas * sizeof(*vmas),
- GFP_KERNEL);
- if (!__vmas)
- return NULL;
- vmas = __vmas;
- }
-
- vmas[*num_vmas] = vma;
- *num_vmas += 1;
- }
-
- return vmas;
-}
-
-int xe_vm_madvise_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file)
-{
- struct xe_device *xe = to_xe_device(dev);
- struct xe_file *xef = to_xe_file(file);
- struct drm_xe_vm_madvise *args = data;
- struct xe_vm *vm;
- struct xe_vma **vmas = NULL;
- int num_vmas = 0, err = 0, idx;
-
- if (XE_IOCTL_DBG(xe, args->extensions) ||
- XE_IOCTL_DBG(xe, args->pad || args->pad2) ||
- XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]))
- return -EINVAL;
-
- if (XE_IOCTL_DBG(xe, args->property > ARRAY_SIZE(madvise_funcs)))
- return -EINVAL;
-
- vm = xe_vm_lookup(xef, args->vm_id);
- if (XE_IOCTL_DBG(xe, !vm))
- return -EINVAL;
-
- if (XE_IOCTL_DBG(xe, !xe_vm_in_fault_mode(vm))) {
- err = -EINVAL;
- goto put_vm;
- }
-
- down_read(&vm->lock);
-
- if (XE_IOCTL_DBG(xe, xe_vm_is_closed_or_banned(vm))) {
- err = -ENOENT;
- goto unlock_vm;
- }
-
- vmas = get_vmas(vm, &num_vmas, args->addr, args->range);
- if (XE_IOCTL_DBG(xe, err))
- goto unlock_vm;
-
- if (XE_IOCTL_DBG(xe, !vmas)) {
- err = -ENOMEM;
- goto unlock_vm;
- }
-
- if (XE_IOCTL_DBG(xe, !num_vmas)) {
- err = -EINVAL;
- goto unlock_vm;
- }
-
- idx = array_index_nospec(args->property, ARRAY_SIZE(madvise_funcs));
- err = madvise_funcs[idx](xe, vm, vmas, num_vmas, args->value);
-
-unlock_vm:
- up_read(&vm->lock);
-put_vm:
- xe_vm_put(vm);
- kfree(vmas);
- return err;
-}
diff --git a/drivers/gpu/drm/xe/xe_vm_madvise.h b/drivers/gpu/drm/xe/xe_vm_madvise.h
deleted file mode 100644
index eecd33acd248..000000000000
--- a/drivers/gpu/drm/xe/xe_vm_madvise.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2021 Intel Corporation
- */
-
-#ifndef _XE_VM_MADVISE_H_
-#define _XE_VM_MADVISE_H_
-
-struct drm_device;
-struct drm_file;
-
-int xe_vm_madvise_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file);
-
-#endif
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 2008a7e61178..df0561fc6c37 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -103,28 +103,26 @@ struct xe_user_extension {
#define DRM_XE_VM_CREATE 0x03
#define DRM_XE_VM_DESTROY 0x04
#define DRM_XE_VM_BIND 0x05
-#define DRM_XE_EXEC_QUEUE_CREATE 0x06
-#define DRM_XE_EXEC_QUEUE_DESTROY 0x07
-#define DRM_XE_EXEC 0x08
+#define DRM_XE_EXEC 0x06
+#define DRM_XE_EXEC_QUEUE_CREATE 0x07
+#define DRM_XE_EXEC_QUEUE_DESTROY 0x08
#define DRM_XE_EXEC_QUEUE_SET_PROPERTY 0x09
-#define DRM_XE_WAIT_USER_FENCE 0x0a
-#define DRM_XE_VM_MADVISE 0x0b
-#define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x0c
-
+#define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x0a
+#define DRM_XE_WAIT_USER_FENCE 0x0b
/* Must be kept compact -- no holes */
+
#define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
#define DRM_IOCTL_XE_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_CREATE, struct drm_xe_gem_create)
#define DRM_IOCTL_XE_GEM_MMAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset)
#define DRM_IOCTL_XE_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_CREATE, struct drm_xe_vm_create)
-#define DRM_IOCTL_XE_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
-#define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
+#define DRM_IOCTL_XE_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
+#define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
+#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
#define DRM_IOCTL_XE_EXEC_QUEUE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_CREATE, struct drm_xe_exec_queue_create)
+#define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy)
+#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
#define DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_GET_PROPERTY, struct drm_xe_exec_queue_get_property)
-#define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy)
-#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
-#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
-#define DRM_IOCTL_XE_VM_MADVISE DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
/**
* struct drm_xe_engine_class_instance - instance of an engine class
@@ -1069,74 +1067,6 @@ struct drm_xe_wait_user_fence {
__u64 reserved[2];
};
-/**
- * struct drm_xe_vm_madvise - give advice about use of memory
- *
- * The @property can be:
- * - %DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS - Setting the preferred
- * location will trigger a migrate of the VMA backing store to new
- * location if the backing store is already allocated.
- * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see enum
- * drm_xe_memory_class.
- * - %DRM_XE_VM_MADVISE_PREFERRED_GT
- * - %DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT - In this case lower 32 bits
- * are mem class, upper 32 are GT. Combination provides a single IOCTL
- * plus migrate VMA to preferred location.
- * - %DRM_XE_VM_MADVISE_CPU_ATOMIC - The CPU will do atomic memory
- * operations to this VMA. Must be set on some devices for atomics to
- * behave correctly.
- * - %DRM_XE_VM_MADVISE_DEVICE_ATOMIC - The device will do atomic memory
- * operations to this VMA. Must be set on some devices for atomics to
- * behave correctly.
- * - %DRM_XE_VM_MADVISE_PRIORITY - Priority WRT to eviction (moving from
- * preferred memory location due to memory pressure). The lower the
- * priority, the more likely to be evicted.
- *
- * - %DRM_XE_VMA_PRIORITY_LOW
- * - %DRM_XE_VMA_PRIORITY_NORMAL - Default
- * - %DRM_XE_VMA_PRIORITY_HIGH - Must be user with elevated privileges
- * - %DRM_XE_VM_MADVISE_PIN - Pin the VMA in memory, must be user with
- * elevated privileges
- */
-struct drm_xe_vm_madvise {
- /** @extensions: Pointer to the first extension struct, if any */
- __u64 extensions;
-
- /** @vm_id: The ID VM in which the VMA exists */
- __u32 vm_id;
-
- /** @pad: MBZ */
- __u32 pad;
-
- /** @range: Number of bytes in the VMA */
- __u64 range;
-
- /** @addr: Address of the VMA to operation on */
- __u64 addr;
-
-#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
-#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
-#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT 2
-#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
-#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
-#define DRM_XE_VM_MADVISE_PRIORITY 5
-#define DRM_XE_VMA_PRIORITY_LOW 0
-#define DRM_XE_VMA_PRIORITY_NORMAL 1
-#define DRM_XE_VMA_PRIORITY_HIGH 2
-#define DRM_XE_VM_MADVISE_PIN 6
- /** @property: property to set */
- __u32 property;
-
- /** @pad2: MBZ */
- __u32 pad2;
-
- /** @value: property value */
- __u64 value;
-
- /** @reserved: Reserved */
- __u64 reserved[2];
-};
-
/**
* DOC: XE PMU event config IDs
*
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-xe] [RFC v1 15/17] drm/xe/uapi: Separate bo_create placement from flags
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
` (13 preceding siblings ...)
2023-10-11 13:59 ` [Intel-xe] [RFC v1 14/17] drm/xe/uapi: Kill VM_MADVISE IOCTL Francois Dugast
@ 2023-10-11 13:59 ` Francois Dugast
2023-10-11 14:14 ` Souza, Jose
2023-10-11 13:59 ` [Intel-xe] [RFC v1 16/17] drm/xe/uapi: Be more specific around GuC Version Type Francois Dugast
` (3 subsequent siblings)
18 siblings, 1 reply; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Although the flags are about the creation, the memory placement
of the BO deserves a proper dedicated field in the uapi.
Besides getting more clear, it also allows to remove the
'magic' shifts from the flags that was a concern during the
uapi reviews.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_bo.c | 15 +++++++--------
include/uapi/drm/xe_drm.h | 12 ++++++------
2 files changed, 13 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 4f0cd65c8522..c2cc859b0921 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -1768,19 +1768,18 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
u32 handle;
int err;
- if (XE_IOCTL_DBG(xe, args->extensions) || XE_IOCTL_DBG(xe, args->pad) ||
+ if (XE_IOCTL_DBG(xe, args->extensions) ||
XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]))
return -EINVAL;
+ /* at least one valid memory placement must be specified */
+ if (XE_IOCTL_DBG(xe, !(args->placement & xe->info.mem_region_mask)))
+ return -EINVAL;
+
if (XE_IOCTL_DBG(xe, args->flags &
~(DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING |
DRM_XE_GEM_CREATE_FLAG_SCANOUT |
- DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM |
- xe->info.mem_region_mask)))
- return -EINVAL;
-
- /* at least one memory type must be specified */
- if (XE_IOCTL_DBG(xe, !(args->flags & xe->info.mem_region_mask)))
+ DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM)))
return -EINVAL;
if (XE_IOCTL_DBG(xe, args->handle))
@@ -1801,7 +1800,7 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
if (args->flags & DRM_XE_GEM_CREATE_FLAG_SCANOUT)
bo_flags |= XE_BO_SCANOUT_BIT;
- bo_flags |= args->flags << (ffs(XE_BO_CREATE_SYSTEM_BIT) - 1);
+ bo_flags |= args->placement << (ffs(XE_BO_CREATE_SYSTEM_BIT) - 1);
if (args->flags & DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM) {
if (XE_IOCTL_DBG(xe, !(bo_flags & XE_BO_CREATE_VRAM_MASK)))
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index df0561fc6c37..97e5f8f4aca3 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -607,9 +607,12 @@ struct drm_xe_gem_create {
*/
__u64 size;
-#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
-#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
-#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)
+ /** @placement: A mask of memory instances of where BO can be placed. */
+ __u32 placement;
+
+#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (1 << 0)
+#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (1 << 1)
+#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (1 << 2)
/**
* @flags: Flags, currently a mask of memory instances of where BO can
* be placed
@@ -633,9 +636,6 @@ struct drm_xe_gem_create {
*/
__u32 handle;
- /** @pad: MBZ */
- __u32 pad;
-
/** @reserved: Reserved */
__u64 reserved[2];
};
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-xe] [RFC v1 16/17] drm/xe/uapi: Be more specific around GuC Version Type
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
` (14 preceding siblings ...)
2023-10-11 13:59 ` [Intel-xe] [RFC v1 15/17] drm/xe/uapi: Separate bo_create placement from flags Francois Dugast
@ 2023-10-11 13:59 ` Francois Dugast
2023-10-11 14:15 ` Souza, Jose
2023-10-11 13:59 ` [Intel-xe] [RFC v1 17/17] drm/xe/uapi: Remove unused inaccessible memory region Francois Dugast
` (2 subsequent siblings)
18 siblings, 1 reply; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Make it very clear and documented that it is about the submission
version, and also what that actually means.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 2 +-
include/uapi/drm/xe_drm.h | 16 ++++++++++++++--
2 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index c5196abbd15d..e0c634c6d326 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -520,7 +520,7 @@ query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
return -EINVAL;
switch (resp.uc_type) {
- case DRM_XE_QUERY_UC_TYPE_GUC: {
+ case DRM_XE_QUERY_UC_TYPE_GUC_SUBMISSION: {
struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
resp.major_ver = guc->submission_state.version.major;
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 97e5f8f4aca3..31a46b32f315 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -468,11 +468,23 @@ struct drm_xe_query_topology_mask {
*
* Given a uc_type this will return the major, minor, patch and branch version
* of the micro-controller firmware.
+ *
+ * The @uc_type can be:
+ * - %DRM_XE_QUERY_UC_TYPE_GUC_SUBMISSION - This is the GuC Submission Version,
+ * a.k.a 'VF version'. It is not the actual GuC blob version. A running GuC can
+ * support multiple VF APIs with different Submission Versions. This version is
+ * negotiated by the VF KMD with GuC during VF initialization. In most of the
+ * current available GuC blobs, this is a 1-1 relationship where the Submission
+ * version could be inferred from the running version and vice-versa. However,
+ * the submission version is the most useful information for the user space
+ * perspective and needs.
+ * - %DRM_XE_QUERY_TYPE_HUC - The actual HuC blob that is currently running
+ * in the platform. It returns 0 when HuC is not currently loaded.
*/
struct drm_xe_query_uc_fw_version {
/** @uc_type: The micro-controller type to query firmware version */
-#define DRM_XE_QUERY_UC_TYPE_GUC 0
-#define DRM_XE_QUERY_UC_TYPE_HUC 1
+#define DRM_XE_QUERY_UC_TYPE_GUC_SUBMISSION 0
+#define DRM_XE_QUERY_UC_TYPE_HUC 1
__u16 uc_type;
/** @pad: MBZ */
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-xe] [RFC v1 17/17] drm/xe/uapi: Remove unused inaccessible memory region
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
` (15 preceding siblings ...)
2023-10-11 13:59 ` [Intel-xe] [RFC v1 16/17] drm/xe/uapi: Be more specific around GuC Version Type Francois Dugast
@ 2023-10-11 13:59 ` Francois Dugast
2023-10-11 14:16 ` Souza, Jose
2023-10-11 14:41 ` [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Souza, Jose
2023-10-11 18:40 ` [Intel-xe] ✗ CI.Patch_applied: failure for " Patchwork
18 siblings, 1 reply; 28+ messages in thread
From: Francois Dugast @ 2023-10-11 13:59 UTC (permalink / raw
To: intel-xe; +Cc: Francois Dugast
This is not used and also the negative of the other 2 regions:
native_mem_regions and slow_mem_regions.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
include/uapi/drm/xe_drm.h | 5 -----
1 file changed, 5 deletions(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 31a46b32f315..a9d654eabf08 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -393,11 +393,6 @@ struct drm_xe_query_gt {
* they live on a different GPU/Tile.
*/
__u64 slow_mem_regions;
- /**
- * @inaccessible_mem_regions: Bit mask of instances from
- * drm_xe_query_mem_usage that is not accessible by this GT at all.
- */
- __u64 inaccessible_mem_regions;
/** @reserved: Reserved */
__u64 reserved[8];
};
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [Intel-xe] [RFC v1 15/17] drm/xe/uapi: Separate bo_create placement from flags
2023-10-11 13:59 ` [Intel-xe] [RFC v1 15/17] drm/xe/uapi: Separate bo_create placement from flags Francois Dugast
@ 2023-10-11 14:14 ` Souza, Jose
2023-10-19 11:04 ` Francois Dugast
0 siblings, 1 reply; 28+ messages in thread
From: Souza, Jose @ 2023-10-11 14:14 UTC (permalink / raw
To: intel-xe@lists.freedesktop.org, Dugast, Francois; +Cc: Vivi, Rodrigo
On Wed, 2023-10-11 at 13:59 +0000, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Although the flags are about the creation, the memory placement
> of the BO deserves a proper dedicated field in the uapi.
>
> Besides getting more clear, it also allows to remove the
> 'magic' shifts from the flags that was a concern during the
> uapi reviews.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/xe/xe_bo.c | 15 +++++++--------
> include/uapi/drm/xe_drm.h | 12 ++++++------
> 2 files changed, 13 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index 4f0cd65c8522..c2cc859b0921 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -1768,19 +1768,18 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
> u32 handle;
> int err;
>
> - if (XE_IOCTL_DBG(xe, args->extensions) || XE_IOCTL_DBG(xe, args->pad) ||
> + if (XE_IOCTL_DBG(xe, args->extensions) ||
> XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]))
> return -EINVAL;
>
> + /* at least one valid memory placement must be specified */
> + if (XE_IOCTL_DBG(xe, !(args->placement & xe->info.mem_region_mask)))
> + return -EINVAL;
> +
> if (XE_IOCTL_DBG(xe, args->flags &
> ~(DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING |
> DRM_XE_GEM_CREATE_FLAG_SCANOUT |
> - DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM |
> - xe->info.mem_region_mask)))
> - return -EINVAL;
> -
> - /* at least one memory type must be specified */
> - if (XE_IOCTL_DBG(xe, !(args->flags & xe->info.mem_region_mask)))
> + DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM)))
> return -EINVAL;
>
> if (XE_IOCTL_DBG(xe, args->handle))
> @@ -1801,7 +1800,7 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
> if (args->flags & DRM_XE_GEM_CREATE_FLAG_SCANOUT)
> bo_flags |= XE_BO_SCANOUT_BIT;
>
> - bo_flags |= args->flags << (ffs(XE_BO_CREATE_SYSTEM_BIT) - 1);
> + bo_flags |= args->placement << (ffs(XE_BO_CREATE_SYSTEM_BIT) - 1);
>
> if (args->flags & DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM) {
> if (XE_IOCTL_DBG(xe, !(bo_flags & XE_BO_CREATE_VRAM_MASK)))
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index df0561fc6c37..97e5f8f4aca3 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -607,9 +607,12 @@ struct drm_xe_gem_create {
> */
> __u64 size;
>
> -#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
> -#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
> -#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)
> + /** @placement: A mask of memory instances of where BO can be placed. */
> + __u32 placement;
> +
> +#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (1 << 0)
> +#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (1 << 1)
> +#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (1 << 2)
#define DRM_XE_GEM_CREATE_PLACEMENT_FLAG_DEFER_BACKING...
also this 3 flags should be define above the __u32 placement; like all other flags in xe_drm.h
> /**
> * @flags: Flags, currently a mask of memory instances of where BO can
> * be placed
> @@ -633,9 +636,6 @@ struct drm_xe_gem_create {
> */
> __u32 handle;
>
> - /** @pad: MBZ */
> - __u32 pad;
> -
> /** @reserved: Reserved */
> __u64 reserved[2];
> };
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Intel-xe] [RFC v1 16/17] drm/xe/uapi: Be more specific around GuC Version Type
2023-10-11 13:59 ` [Intel-xe] [RFC v1 16/17] drm/xe/uapi: Be more specific around GuC Version Type Francois Dugast
@ 2023-10-11 14:15 ` Souza, Jose
0 siblings, 0 replies; 28+ messages in thread
From: Souza, Jose @ 2023-10-11 14:15 UTC (permalink / raw
To: intel-xe@lists.freedesktop.org, Dugast, Francois; +Cc: Vivi, Rodrigo
On Wed, 2023-10-11 at 13:59 +0000, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Make it very clear and documented that it is about the submission
> version, and also what that actually means.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/xe/xe_query.c | 2 +-
> include/uapi/drm/xe_drm.h | 16 ++++++++++++++--
> 2 files changed, 15 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index c5196abbd15d..e0c634c6d326 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -520,7 +520,7 @@ query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
> return -EINVAL;
>
> switch (resp.uc_type) {
> - case DRM_XE_QUERY_UC_TYPE_GUC: {
> + case DRM_XE_QUERY_UC_TYPE_GUC_SUBMISSION: {
> struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
>
> resp.major_ver = guc->submission_state.version.major;
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 97e5f8f4aca3..31a46b32f315 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -468,11 +468,23 @@ struct drm_xe_query_topology_mask {
> *
> * Given a uc_type this will return the major, minor, patch and branch version
> * of the micro-controller firmware.
> + *
> + * The @uc_type can be:
> + * - %DRM_XE_QUERY_UC_TYPE_GUC_SUBMISSION - This is the GuC Submission Version,
> + * a.k.a 'VF version'. It is not the actual GuC blob version. A running GuC can
> + * support multiple VF APIs with different Submission Versions. This version is
> + * negotiated by the VF KMD with GuC during VF initialization. In most of the
> + * current available GuC blobs, this is a 1-1 relationship where the Submission
> + * version could be inferred from the running version and vice-versa. However,
> + * the submission version is the most useful information for the user space
> + * perspective and needs.
> + * - %DRM_XE_QUERY_TYPE_HUC - The actual HuC blob that is currently running
> + * in the platform. It returns 0 when HuC is not currently loaded.
> */
> struct drm_xe_query_uc_fw_version {
> /** @uc_type: The micro-controller type to query firmware version */
> -#define DRM_XE_QUERY_UC_TYPE_GUC 0
> -#define DRM_XE_QUERY_UC_TYPE_HUC 1
> +#define DRM_XE_QUERY_UC_TYPE_GUC_SUBMISSION 0
> +#define DRM_XE_QUERY_UC_TYPE_HUC 1
> __u16 uc_type;
>
> /** @pad: MBZ */
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Intel-xe] [RFC v1 17/17] drm/xe/uapi: Remove unused inaccessible memory region
2023-10-11 13:59 ` [Intel-xe] [RFC v1 17/17] drm/xe/uapi: Remove unused inaccessible memory region Francois Dugast
@ 2023-10-11 14:16 ` Souza, Jose
0 siblings, 0 replies; 28+ messages in thread
From: Souza, Jose @ 2023-10-11 14:16 UTC (permalink / raw
To: intel-xe@lists.freedesktop.org, Dugast, Francois
On Wed, 2023-10-11 at 13:59 +0000, Francois Dugast wrote:
> This is not used and also the negative of the other 2 regions:
> native_mem_regions and slow_mem_regions.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
> ---
> include/uapi/drm/xe_drm.h | 5 -----
> 1 file changed, 5 deletions(-)
>
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 31a46b32f315..a9d654eabf08 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -393,11 +393,6 @@ struct drm_xe_query_gt {
> * they live on a different GPU/Tile.
> */
> __u64 slow_mem_regions;
> - /**
> - * @inaccessible_mem_regions: Bit mask of instances from
> - * drm_xe_query_mem_usage that is not accessible by this GT at all.
> - */
> - __u64 inaccessible_mem_regions;
> /** @reserved: Reserved */
> __u64 reserved[8];
> };
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
` (16 preceding siblings ...)
2023-10-11 13:59 ` [Intel-xe] [RFC v1 17/17] drm/xe/uapi: Remove unused inaccessible memory region Francois Dugast
@ 2023-10-11 14:41 ` Souza, Jose
2023-10-11 18:40 ` [Intel-xe] ✗ CI.Patch_applied: failure for " Patchwork
18 siblings, 0 replies; 28+ messages in thread
From: Souza, Jose @ 2023-10-11 14:41 UTC (permalink / raw
To: intel-xe@lists.freedesktop.org, Dugast, Francois
On Wed, 2023-10-11 at 13:59 +0000, Francois Dugast wrote:
> This is the second take of uAPI updates that would lead to
> breakage in the compatibility, which it is not acceptable after
> we are merged upstream. So, let's break it before it is too late,
> and start upstreaming a good, reliable and clean uapi.
>
> This series is not complete yet but it is sent for early review
> as some patches are already a few weeks old.
>
> It series is intended to be applied after take 1 [1] which is not
> merged yet, so it will break CI.
LGTM to me in general.
Ack from Mesa side.
>
> [1] https://patchwork.freedesktop.org/series/124710/
>
> Francois Dugast (10):
> fixup! drm/xe: Correlate engine and cpu timestamps with better
> accuracy
> drm/xe/uapi: Add documentation for query
> drm/xe/uapi: Document DRM_XE_DEVICE_QUERY_HWCONFIG
> drm/xe: Extend uAPI to query HuC micro-controler firmware version
> drm/xe: Remove useless query config num_params
> drm/xe/uapi: Add missing DRM_ prefix in uAPI constants
> drm/xe/uapi: Add _FLAG to uAPI constants usable for flags
> fixup! drm/xe: Add uAPI to query micro-controler firmware version
> drm/xe/uapi: Make constant comments visible in kernel doc
> drm/xe/uapi: Remove unused inaccessible memory region
>
> José Roberto de Souza (1):
> drm/xe: Add uAPI to query micro-controler firmware version
>
> Mika Kuoppala (1):
> drm/xe: Extend drm_xe_vm_bind_op
>
> Rodrigo Vivi (4):
> drm/xe/uapi: Remove GT_TYPE_REMOTE
> drm/xe/uapi: Kill VM_MADVISE IOCTL
> drm/xe/uapi: Separate bo_create placement from flags
> drm/xe/uapi: Be more specific around GuC Version Type
>
> Umesh Nerlige Ramappa (1):
> fixup! drm/xe: Correlate engine and cpu timestamps with better
> accuracy
>
> drivers/gpu/drm/xe/Makefile | 1 -
> drivers/gpu/drm/xe/xe_bo.c | 27 +-
> drivers/gpu/drm/xe/xe_bo_types.h | 3 +
> drivers/gpu/drm/xe/xe_device.c | 8 +-
> drivers/gpu/drm/xe/xe_exec_queue.c | 20 +-
> drivers/gpu/drm/xe/xe_gt.c | 2 +-
> drivers/gpu/drm/xe/xe_pmu.c | 20 +-
> drivers/gpu/drm/xe/xe_query.c | 95 +++--
> drivers/gpu/drm/xe/xe_sync.c | 16 +-
> drivers/gpu/drm/xe/xe_vm.c | 86 ++---
> drivers/gpu/drm/xe/xe_vm_doc.h | 14 +-
> drivers/gpu/drm/xe/xe_vm_madvise.c | 299 ---------------
> drivers/gpu/drm/xe/xe_vm_madvise.h | 15 -
> drivers/gpu/drm/xe/xe_wait_user_fence.c | 10 +-
> include/uapi/drm/xe_drm.h | 478 +++++++++++++-----------
> 15 files changed, 435 insertions(+), 659 deletions(-)
> delete mode 100644 drivers/gpu/drm/xe/xe_vm_madvise.c
> delete mode 100644 drivers/gpu/drm/xe/xe_vm_madvise.h
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Intel-xe] [RFC v1 13/17] drm/xe/uapi: Remove GT_TYPE_REMOTE
2023-10-11 13:59 ` [Intel-xe] [RFC v1 13/17] drm/xe/uapi: Remove GT_TYPE_REMOTE Francois Dugast
@ 2023-10-11 14:56 ` Matt Roper
0 siblings, 0 replies; 28+ messages in thread
From: Matt Roper @ 2023-10-11 14:56 UTC (permalink / raw
To: Francois Dugast; +Cc: Carl Zhang, intel-xe, Rodrigo Vivi
On Wed, Oct 11, 2023 at 01:59:22PM +0000, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> With the split between tile and gt, this is currently unused.
> Also it is bringing confusion because main vs remote would be
> more a concept of the tile itself and not about GT.
>
> So, the MAIN one is the traditional GT used for every operation
> in older platforms, and for render/graphics and compute on platforms
> that contains the stand-alone Media GT.
>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Francois Dugast <francois.dugast@intel.com>
> Cc: Carl Zhang <carl.zhang@intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/xe/xe_query.c | 2 --
> include/uapi/drm/xe_drm.h | 5 ++---
> 2 files changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index 063a224492eb..c5196abbd15d 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -375,8 +375,6 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
> for_each_gt(gt, xe, id) {
> if (xe_gt_is_media_type(gt))
> gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA;
> - else if (gt_to_tile(gt)->id > 0)
> - gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_REMOTE;
> else
> gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
> gt_list->gt_list[id].gt_id = gt->info.id;
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 2c5bf02c9b0b..2008a7e61178 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -376,9 +376,8 @@ struct drm_xe_query_config {
> */
> struct drm_xe_query_gt {
> #define DRM_XE_QUERY_GT_TYPE_MAIN 0
> -#define DRM_XE_QUERY_GT_TYPE_REMOTE 1
> -#define DRM_XE_QUERY_GT_TYPE_MEDIA 2
> - /** @type: GT type: Main, Remote, or Media */
> +#define DRM_XE_QUERY_GT_TYPE_MEDIA 1
> + /** @type: GT type: Main or Media */
> __u16 type;
> /** @gt_id: Unique ID of this GT within the PCI Device */
> __u16 gt_id;
> --
> 2.34.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 28+ messages in thread
* [Intel-xe] ✗ CI.Patch_applied: failure for uAPI Alignment - take 2
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
` (17 preceding siblings ...)
2023-10-11 14:41 ` [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Souza, Jose
@ 2023-10-11 18:40 ` Patchwork
18 siblings, 0 replies; 28+ messages in thread
From: Patchwork @ 2023-10-11 18:40 UTC (permalink / raw
To: Francois Dugast; +Cc: intel-xe
== Series Details ==
Series: uAPI Alignment - take 2
URL : https://patchwork.freedesktop.org/series/124977/
State : failure
== Summary ==
=== Applying kernel patches on branch 'drm-xe-next' with base: ===
Base commit: 81cbfcc83 Revert "drm/i915/display: Fix a use-after-free when intel_edp_init_connector fails"
=== git am output follows ===
error: patch failed: drivers/gpu/drm/xe/xe_query.c:105
error: drivers/gpu/drm/xe/xe_query.c: patch does not apply
hint: Use 'git am --show-current-patch' to see the failed patch
Applying: fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy
Patch failed at 0001 fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Intel-xe] [RFC v1 04/17] drm/xe: Add uAPI to query micro-controler firmware version
2023-10-11 13:59 ` [Intel-xe] [RFC v1 04/17] drm/xe: Add uAPI to query micro-controler firmware version Francois Dugast
@ 2023-10-11 20:07 ` John Harrison
2023-10-11 20:17 ` Souza, Jose
0 siblings, 1 reply; 28+ messages in thread
From: John Harrison @ 2023-10-11 20:07 UTC (permalink / raw
To: Francois Dugast, intel-xe
On 10/11/2023 06:59, Francois Dugast wrote:
> From: José Roberto de Souza <jose.souza@intel.com>
>
> Due to a bug in GuC firmware, Mesa can't enable by default the usage of
> compute engines in DG2 and newer.
>
> A new GuC firmware fixed the issue but until now there was no way
> for Mesa to know if KMD was running with the fixed GuC version or not,
> so this uAPI is required.
>
> It may be expanded in future to query other firmware versions too.
>
> More information: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661
> Mesa usage: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233
>
> v2:
> - changed to submission version
> - added branch version to be future proof
> - checking if pads and reserved are zero
>
> v3:
> - add braces around case XE_QUERY_UC_TYPE_GUC to make CI happy
>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/xe/xe_query.c | 41 +++++++++++++++++++++++++++++++++++
> include/uapi/drm/xe_drm.h | 31 ++++++++++++++++++++++++++
> 2 files changed, 72 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index 10b9878ec95a..efbcf2ef436e 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -498,6 +498,46 @@ static int query_gt_topology(struct xe_device *xe,
> return 0;
> }
>
> +static int
> +query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
> +{
> + struct drm_xe_query_uc_fw_version __user *query_ptr = u64_to_user_ptr(query->data);
> + size_t size = sizeof(struct drm_xe_query_uc_fw_version);
> + struct drm_xe_query_uc_fw_version resp;
> +
> + if (query->size == 0) {
> + query->size = size;
> + return 0;
> + } else if (XE_IOCTL_DBG(xe, query->size != size)) {
> + return -EINVAL;
> + }
> +
> + if (copy_from_user(&resp, query_ptr, size))
> + return -EFAULT;
> +
> + if (XE_IOCTL_DBG(xe, resp.pad || resp.pad2 || resp.reserved))
> + return -EINVAL;
> +
> + switch (resp.uc_type) {
> + case XE_QUERY_UC_TYPE_GUC: {
> + struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
> +
> + resp.major_ver = guc->submission_state.version.major;
> + resp.minor_ver = guc->submission_state.version.minor;
> + resp.patch_ver = guc->submission_state.version.patch;
> + resp.branch_ver = 0;
> + break;
> + }
> + default:
> + return -EINVAL;
> + }
> +
> + if (copy_to_user(query_ptr, &resp, size))
> + return -EFAULT;
> +
> + return 0;
> +}
> +
> static int (* const xe_query_funcs[])(struct xe_device *xe,
> struct drm_xe_device_query *query) = {
> query_engines,
> @@ -507,6 +547,7 @@ static int (* const xe_query_funcs[])(struct xe_device *xe,
> query_hwconfig,
> query_gt_topology,
> query_engine_cycles,
> + query_uc_fw_version,
> };
>
> int xe_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 47d2d0468339..f7ca52aba79b 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -466,6 +466,36 @@ struct drm_xe_query_topology_mask {
> __u8 mask[];
> };
>
> +/**
> + * struct drm_xe_query_uc_fw_version - query a micro-controller firmware version
> + *
> + * Given a uc_type this will return the major, minor, patch and branch version
> + * of the micro-controller firmware.
> + */
> +struct drm_xe_query_uc_fw_version {
> + /** @uc: The micro-controller type to query firmware version */
> +#define XE_QUERY_UC_TYPE_GUC 0
I thought it was agreed to use TYPE_GUC_SUBMISSION to differentiate from
the file version which may need to be added at some point (e.g. for
reporting status in a control panel or something).
> + __u16 uc_type;
> +
> + /** @pad: MBZ */
> + __u16 pad;
And wasn't there a comment about just using a u32 for the type? What is
the advantage to splitting it into two u16 values?
John.
> +
> + /* @major_ver: major uc fw version */
> + __u32 major_ver;
> + /* @minor_ver: minor uc fw version */
> + __u32 minor_ver;
> + /* @patch_ver: patch uc fw version */
> + __u32 patch_ver;
> + /* @branch_ver: branch uc fw version */
> + __u32 branch_ver;
> +
> + /** @pad2: MBZ */
> + __u32 pad2;
> +
> + /** @reserved: Reserved */
> + __u64 reserved;
> +};
> +
> /**
> * struct drm_xe_device_query - main structure to query device information
> *
> @@ -518,6 +548,7 @@ struct drm_xe_device_query {
> #define DRM_XE_DEVICE_QUERY_HWCONFIG 4
> #define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
> #define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6
> +#define DRM_XE_DEVICE_QUERY_UC_FW_VERSION 7
> /** @query: The type of data to query */
> __u32 query;
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Intel-xe] [RFC v1 04/17] drm/xe: Add uAPI to query micro-controler firmware version
2023-10-11 20:07 ` John Harrison
@ 2023-10-11 20:17 ` Souza, Jose
2023-10-13 7:58 ` Francois Dugast
0 siblings, 1 reply; 28+ messages in thread
From: Souza, Jose @ 2023-10-11 20:17 UTC (permalink / raw
To: intel-xe@lists.freedesktop.org, Harrison, John C,
Dugast, Francois
On Wed, 2023-10-11 at 13:07 -0700, John Harrison wrote:
> On 10/11/2023 06:59, Francois Dugast wrote:
> > From: José Roberto de Souza <jose.souza@intel.com>
> >
> > Due to a bug in GuC firmware, Mesa can't enable by default the usage of
> > compute engines in DG2 and newer.
> >
> > A new GuC firmware fixed the issue but until now there was no way
> > for Mesa to know if KMD was running with the fixed GuC version or not,
> > so this uAPI is required.
> >
> > It may be expanded in future to query other firmware versions too.
> >
> > More information: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661
> > Mesa usage: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233
> >
> > v2:
> > - changed to submission version
> > - added branch version to be future proof
> > - checking if pads and reserved are zero
> >
> > v3:
> > - add braces around case XE_QUERY_UC_TYPE_GUC to make CI happy
> >
> > Cc: John Harrison <John.C.Harrison@Intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_query.c | 41 +++++++++++++++++++++++++++++++++++
> > include/uapi/drm/xe_drm.h | 31 ++++++++++++++++++++++++++
> > 2 files changed, 72 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> > index 10b9878ec95a..efbcf2ef436e 100644
> > --- a/drivers/gpu/drm/xe/xe_query.c
> > +++ b/drivers/gpu/drm/xe/xe_query.c
> > @@ -498,6 +498,46 @@ static int query_gt_topology(struct xe_device *xe,
> > return 0;
> > }
> >
> > +static int
> > +query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
> > +{
> > + struct drm_xe_query_uc_fw_version __user *query_ptr = u64_to_user_ptr(query->data);
> > + size_t size = sizeof(struct drm_xe_query_uc_fw_version);
> > + struct drm_xe_query_uc_fw_version resp;
> > +
> > + if (query->size == 0) {
> > + query->size = size;
> > + return 0;
> > + } else if (XE_IOCTL_DBG(xe, query->size != size)) {
> > + return -EINVAL;
> > + }
> > +
> > + if (copy_from_user(&resp, query_ptr, size))
> > + return -EFAULT;
> > +
> > + if (XE_IOCTL_DBG(xe, resp.pad || resp.pad2 || resp.reserved))
> > + return -EINVAL;
> > +
> > + switch (resp.uc_type) {
> > + case XE_QUERY_UC_TYPE_GUC: {
> > + struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
> > +
> > + resp.major_ver = guc->submission_state.version.major;
> > + resp.minor_ver = guc->submission_state.version.minor;
> > + resp.patch_ver = guc->submission_state.version.patch;
> > + resp.branch_ver = 0;
> > + break;
> > + }
> > + default:
> > + return -EINVAL;
> > + }
> > +
> > + if (copy_to_user(query_ptr, &resp, size))
> > + return -EFAULT;
> > +
> > + return 0;
> > +}
> > +
> > static int (* const xe_query_funcs[])(struct xe_device *xe,
> > struct drm_xe_device_query *query) = {
> > query_engines,
> > @@ -507,6 +547,7 @@ static int (* const xe_query_funcs[])(struct xe_device *xe,
> > query_hwconfig,
> > query_gt_topology,
> > query_engine_cycles,
> > + query_uc_fw_version,
> > };
> >
> > int xe_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > index 47d2d0468339..f7ca52aba79b 100644
> > --- a/include/uapi/drm/xe_drm.h
> > +++ b/include/uapi/drm/xe_drm.h
> > @@ -466,6 +466,36 @@ struct drm_xe_query_topology_mask {
> > __u8 mask[];
> > };
> >
> > +/**
> > + * struct drm_xe_query_uc_fw_version - query a micro-controller firmware version
> > + *
> > + * Given a uc_type this will return the major, minor, patch and branch version
> > + * of the micro-controller firmware.
> > + */
> > +struct drm_xe_query_uc_fw_version {
> > + /** @uc: The micro-controller type to query firmware version */
> > +#define XE_QUERY_UC_TYPE_GUC 0
> I thought it was agreed to use TYPE_GUC_SUBMISSION to differentiate from
> the file version which may need to be added at some point (e.g. for
> reporting status in a control panel or something).
It is being renamed in '[RFC v1 16/17] drm/xe/uapi: Be more specific around GuC Version Type'
In my opinion it should be squashed but up to Francois and Rodrigo.
>
> > + __u16 uc_type;
> > +
> > + /** @pad: MBZ */
> > + __u16 pad;
> And wasn't there a comment about just using a u32 for the type? What is
> the advantage to splitting it into two u16 values?
yeah good point or rename to rsvd so it can be used in future.
>
> John.
>
> > +
> > + /* @major_ver: major uc fw version */
> > + __u32 major_ver;
> > + /* @minor_ver: minor uc fw version */
> > + __u32 minor_ver;
> > + /* @patch_ver: patch uc fw version */
> > + __u32 patch_ver;
> > + /* @branch_ver: branch uc fw version */
> > + __u32 branch_ver;
> > +
> > + /** @pad2: MBZ */
> > + __u32 pad2;
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved;
> > +};
> > +
> > /**
> > * struct drm_xe_device_query - main structure to query device information
> > *
> > @@ -518,6 +548,7 @@ struct drm_xe_device_query {
> > #define DRM_XE_DEVICE_QUERY_HWCONFIG 4
> > #define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
> > #define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6
> > +#define DRM_XE_DEVICE_QUERY_UC_FW_VERSION 7
> > /** @query: The type of data to query */
> > __u32 query;
> >
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Intel-xe] [RFC v1 04/17] drm/xe: Add uAPI to query micro-controler firmware version
2023-10-11 20:17 ` Souza, Jose
@ 2023-10-13 7:58 ` Francois Dugast
0 siblings, 0 replies; 28+ messages in thread
From: Francois Dugast @ 2023-10-13 7:58 UTC (permalink / raw
To: Souza, Jose; +Cc: intel-xe@lists.freedesktop.org
On Wed, Oct 11, 2023 at 10:17:41PM +0200, Souza, Jose wrote:
> On Wed, 2023-10-11 at 13:07 -0700, John Harrison wrote:
> > On 10/11/2023 06:59, Francois Dugast wrote:
> > > From: José Roberto de Souza <jose.souza@intel.com>
> > >
> > > Due to a bug in GuC firmware, Mesa can't enable by default the usage of
> > > compute engines in DG2 and newer.
> > >
> > > A new GuC firmware fixed the issue but until now there was no way
> > > for Mesa to know if KMD was running with the fixed GuC version or not,
> > > so this uAPI is required.
> > >
> > > It may be expanded in future to query other firmware versions too.
> > >
> > > More information: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661
> > > Mesa usage: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233
> > >
> > > v2:
> > > - changed to submission version
> > > - added branch version to be future proof
> > > - checking if pads and reserved are zero
> > >
> > > v3:
> > > - add braces around case XE_QUERY_UC_TYPE_GUC to make CI happy
> > >
> > > Cc: John Harrison <John.C.Harrison@Intel.com>
> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > > ---
> > > drivers/gpu/drm/xe/xe_query.c | 41 +++++++++++++++++++++++++++++++++++
> > > include/uapi/drm/xe_drm.h | 31 ++++++++++++++++++++++++++
> > > 2 files changed, 72 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> > > index 10b9878ec95a..efbcf2ef436e 100644
> > > --- a/drivers/gpu/drm/xe/xe_query.c
> > > +++ b/drivers/gpu/drm/xe/xe_query.c
> > > @@ -498,6 +498,46 @@ static int query_gt_topology(struct xe_device *xe,
> > > return 0;
> > > }
> > >
> > > +static int
> > > +query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
> > > +{
> > > + struct drm_xe_query_uc_fw_version __user *query_ptr = u64_to_user_ptr(query->data);
> > > + size_t size = sizeof(struct drm_xe_query_uc_fw_version);
> > > + struct drm_xe_query_uc_fw_version resp;
> > > +
> > > + if (query->size == 0) {
> > > + query->size = size;
> > > + return 0;
> > > + } else if (XE_IOCTL_DBG(xe, query->size != size)) {
> > > + return -EINVAL;
> > > + }
> > > +
> > > + if (copy_from_user(&resp, query_ptr, size))
> > > + return -EFAULT;
> > > +
> > > + if (XE_IOCTL_DBG(xe, resp.pad || resp.pad2 || resp.reserved))
> > > + return -EINVAL;
> > > +
> > > + switch (resp.uc_type) {
> > > + case XE_QUERY_UC_TYPE_GUC: {
> > > + struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
> > > +
> > > + resp.major_ver = guc->submission_state.version.major;
> > > + resp.minor_ver = guc->submission_state.version.minor;
> > > + resp.patch_ver = guc->submission_state.version.patch;
> > > + resp.branch_ver = 0;
> > > + break;
> > > + }
> > > + default:
> > > + return -EINVAL;
> > > + }
> > > +
> > > + if (copy_to_user(query_ptr, &resp, size))
> > > + return -EFAULT;
> > > +
> > > + return 0;
> > > +}
> > > +
> > > static int (* const xe_query_funcs[])(struct xe_device *xe,
> > > struct drm_xe_device_query *query) = {
> > > query_engines,
> > > @@ -507,6 +547,7 @@ static int (* const xe_query_funcs[])(struct xe_device *xe,
> > > query_hwconfig,
> > > query_gt_topology,
> > > query_engine_cycles,
> > > + query_uc_fw_version,
> > > };
> > >
> > > int xe_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > > index 47d2d0468339..f7ca52aba79b 100644
> > > --- a/include/uapi/drm/xe_drm.h
> > > +++ b/include/uapi/drm/xe_drm.h
> > > @@ -466,6 +466,36 @@ struct drm_xe_query_topology_mask {
> > > __u8 mask[];
> > > };
> > >
> > > +/**
> > > + * struct drm_xe_query_uc_fw_version - query a micro-controller firmware version
> > > + *
> > > + * Given a uc_type this will return the major, minor, patch and branch version
> > > + * of the micro-controller firmware.
> > > + */
> > > +struct drm_xe_query_uc_fw_version {
> > > + /** @uc: The micro-controller type to query firmware version */
> > > +#define XE_QUERY_UC_TYPE_GUC 0
> > I thought it was agreed to use TYPE_GUC_SUBMISSION to differentiate from
> > the file version which may need to be added at some point (e.g. for
> > reporting status in a control panel or something).
>
> It is being renamed in '[RFC v1 16/17] drm/xe/uapi: Be more specific around GuC Version Type'
>
> In my opinion it should be squashed but up to Francois and Rodrigo.
>
> >
> > > + __u16 uc_type;
> > > +
> > > + /** @pad: MBZ */
> > > + __u16 pad;
> > And wasn't there a comment about just using a u32 for the type? What is
> > the advantage to splitting it into two u16 values?
>
> yeah good point or rename to rsvd so it can be used in future.
Sure this will be in the next version.
Francois
>
>
> >
> > John.
> >
> > > +
> > > + /* @major_ver: major uc fw version */
> > > + __u32 major_ver;
> > > + /* @minor_ver: minor uc fw version */
> > > + __u32 minor_ver;
> > > + /* @patch_ver: patch uc fw version */
> > > + __u32 patch_ver;
> > > + /* @branch_ver: branch uc fw version */
> > > + __u32 branch_ver;
> > > +
> > > + /** @pad2: MBZ */
> > > + __u32 pad2;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved;
> > > +};
> > > +
> > > /**
> > > * struct drm_xe_device_query - main structure to query device information
> > > *
> > > @@ -518,6 +548,7 @@ struct drm_xe_device_query {
> > > #define DRM_XE_DEVICE_QUERY_HWCONFIG 4
> > > #define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
> > > #define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6
> > > +#define DRM_XE_DEVICE_QUERY_UC_FW_VERSION 7
> > > /** @query: The type of data to query */
> > > __u32 query;
> > >
> >
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Intel-xe] [RFC v1 15/17] drm/xe/uapi: Separate bo_create placement from flags
2023-10-11 14:14 ` Souza, Jose
@ 2023-10-19 11:04 ` Francois Dugast
0 siblings, 0 replies; 28+ messages in thread
From: Francois Dugast @ 2023-10-19 11:04 UTC (permalink / raw
To: Souza, Jose; +Cc: intel-xe@lists.freedesktop.org, Vivi, Rodrigo
On Wed, Oct 11, 2023 at 04:14:26PM +0200, Souza, Jose wrote:
> On Wed, 2023-10-11 at 13:59 +0000, Francois Dugast wrote:
> > From: Rodrigo Vivi <rodrigo.vivi@intel.com>
> >
> > Although the flags are about the creation, the memory placement
> > of the BO deserves a proper dedicated field in the uapi.
> >
> > Besides getting more clear, it also allows to remove the
> > 'magic' shifts from the flags that was a concern during the
> > uapi reviews.
> >
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_bo.c | 15 +++++++--------
> > include/uapi/drm/xe_drm.h | 12 ++++++------
> > 2 files changed, 13 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> > index 4f0cd65c8522..c2cc859b0921 100644
> > --- a/drivers/gpu/drm/xe/xe_bo.c
> > +++ b/drivers/gpu/drm/xe/xe_bo.c
> > @@ -1768,19 +1768,18 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
> > u32 handle;
> > int err;
> >
> > - if (XE_IOCTL_DBG(xe, args->extensions) || XE_IOCTL_DBG(xe, args->pad) ||
> > + if (XE_IOCTL_DBG(xe, args->extensions) ||
> > XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]))
> > return -EINVAL;
> >
> > + /* at least one valid memory placement must be specified */
> > + if (XE_IOCTL_DBG(xe, !(args->placement & xe->info.mem_region_mask)))
> > + return -EINVAL;
> > +
> > if (XE_IOCTL_DBG(xe, args->flags &
> > ~(DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING |
> > DRM_XE_GEM_CREATE_FLAG_SCANOUT |
> > - DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM |
> > - xe->info.mem_region_mask)))
> > - return -EINVAL;
> > -
> > - /* at least one memory type must be specified */
> > - if (XE_IOCTL_DBG(xe, !(args->flags & xe->info.mem_region_mask)))
> > + DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM)))
> > return -EINVAL;
> >
> > if (XE_IOCTL_DBG(xe, args->handle))
> > @@ -1801,7 +1800,7 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
> > if (args->flags & DRM_XE_GEM_CREATE_FLAG_SCANOUT)
> > bo_flags |= XE_BO_SCANOUT_BIT;
> >
> > - bo_flags |= args->flags << (ffs(XE_BO_CREATE_SYSTEM_BIT) - 1);
> > + bo_flags |= args->placement << (ffs(XE_BO_CREATE_SYSTEM_BIT) - 1);
> >
> > if (args->flags & DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM) {
> > if (XE_IOCTL_DBG(xe, !(bo_flags & XE_BO_CREATE_VRAM_MASK)))
> > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > index df0561fc6c37..97e5f8f4aca3 100644
> > --- a/include/uapi/drm/xe_drm.h
> > +++ b/include/uapi/drm/xe_drm.h
> > @@ -607,9 +607,12 @@ struct drm_xe_gem_create {
> > */
> > __u64 size;
> >
> > -#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
> > -#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
> > -#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)
> > + /** @placement: A mask of memory instances of where BO can be placed. */
> > + __u32 placement;
> > +
> > +#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (1 << 0)
> > +#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (1 << 1)
> > +#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (1 << 2)
>
> #define DRM_XE_GEM_CREATE_PLACEMENT_FLAG_DEFER_BACKING...
>
> also this 3 flags should be define above the __u32 placement; like all other flags in xe_drm.h
>
At first I also read it like you did because placement and the new constant
values come next to each other in the diff but actually those constants
are meant to be used as flags, not as placement.
This means the naming DRM_XE_GEM_CREATE_FLAG_* is consistent and the define
location is correct, it follows the same rules as for other defines:
#define ...
#define ...
/** @flags ...
__u32 flags;
Francois
>
>
> > /**
> > * @flags: Flags, currently a mask of memory instances of where BO can
> > * be placed
> > @@ -633,9 +636,6 @@ struct drm_xe_gem_create {
> > */
> > __u32 handle;
> >
> > - /** @pad: MBZ */
> > - __u32 pad;
> > -
> > /** @reserved: Reserved */
> > __u64 reserved[2];
> > };
>
^ permalink raw reply [flat|nested] 28+ messages in thread
end of thread, other threads:[~2023-10-19 11:05 UTC | newest]
Thread overview: 28+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-10-11 13:59 [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 01/17] fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 02/17] drm/xe/uapi: Add documentation for query Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 03/17] drm/xe: Extend drm_xe_vm_bind_op Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 04/17] drm/xe: Add uAPI to query micro-controler firmware version Francois Dugast
2023-10-11 20:07 ` John Harrison
2023-10-11 20:17 ` Souza, Jose
2023-10-13 7:58 ` Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 05/17] drm/xe/uapi: Document DRM_XE_DEVICE_QUERY_HWCONFIG Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 06/17] drm/xe: Extend uAPI to query HuC micro-controler firmware version Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 07/17] drm/xe: Remove useless query config num_params Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 08/17] drm/xe/uapi: Add missing DRM_ prefix in uAPI constants Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 09/17] drm/xe/uapi: Add _FLAG to uAPI constants usable for flags Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 10/17] fixup! drm/xe: Add uAPI to query micro-controler firmware version Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 11/17] drm/xe/uapi: Make constant comments visible in kernel doc Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 12/17] fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 13/17] drm/xe/uapi: Remove GT_TYPE_REMOTE Francois Dugast
2023-10-11 14:56 ` Matt Roper
2023-10-11 13:59 ` [Intel-xe] [RFC v1 14/17] drm/xe/uapi: Kill VM_MADVISE IOCTL Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 15/17] drm/xe/uapi: Separate bo_create placement from flags Francois Dugast
2023-10-11 14:14 ` Souza, Jose
2023-10-19 11:04 ` Francois Dugast
2023-10-11 13:59 ` [Intel-xe] [RFC v1 16/17] drm/xe/uapi: Be more specific around GuC Version Type Francois Dugast
2023-10-11 14:15 ` Souza, Jose
2023-10-11 13:59 ` [Intel-xe] [RFC v1 17/17] drm/xe/uapi: Remove unused inaccessible memory region Francois Dugast
2023-10-11 14:16 ` Souza, Jose
2023-10-11 14:41 ` [Intel-xe] [RFC v1 00/17] uAPI Alignment - take 2 Souza, Jose
2023-10-11 18:40 ` [Intel-xe] ✗ CI.Patch_applied: failure for " Patchwork
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