From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 490804778C; Mon, 1 Apr 2024 16:44:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711989857; cv=none; b=jmuAt18SoKlt6sJKA/o9XTt8X41p/P4trOL3UdYnUwomlritNUMHcybHbJ8ft8wRIS+pkLXkCL7KuhvNvo4eLPlk6LkwXduRoFqIGyWw4QS2tM86nqf9tOrMtJepT/xlkNd7RVYwfh0EP7joCjKesi2GsciFT32hQXSWrQ0k1Tw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711989857; c=relaxed/simple; bh=h6nm+Z5TfYGEPCJ7w6F1mRVR137XQNOB4PyIZqLJUuE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=P5C6UJFqEyZJ0rsgXk5TR0MyKS1g42jzwyYqdNDC+8ckmYGyQldFBqCpO5oG0TlN9Pl9dSR7tUHeeWzIp7UhNInwjBDGVG2HS1Zok6qgt4gCJIXDx8y6Oykn+ntTAElA+N4VXT8pBg/xH962mT2Ko4+d8/F3PVPSeb/eTiQCj0Y= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=xjOQG4c4; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="xjOQG4c4" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 391A0C433C7; Mon, 1 Apr 2024 16:44:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1711989856; bh=h6nm+Z5TfYGEPCJ7w6F1mRVR137XQNOB4PyIZqLJUuE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=xjOQG4c4E/Gs3oGoGEcpakbkXyAVJLldVzyTH9gDYspXV2OERyXjDMqWu9NyDPeIm DLixOxpTn63Eko0pTdCCyJWRZfkloPCeJMczg5Pjs0b2KcXiKcH5CWZhTOcl+uU/eD FKQblnzTTbwoM2S8iSuWTx0DPFxll/s/uOWcJiSw= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Xiaotian Wu , Miao Wang , Xing Li , Hongchen Zhang , Rui Wang , Huacai Chen , Sasha Levin Subject: [PATCH 6.6 173/396] LoongArch: Change __my_cpu_offset definition to avoid mis-optimization Date: Mon, 1 Apr 2024 17:43:42 +0200 Message-ID: <20240401152553.101934630@linuxfoundation.org> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240401152547.867452742@linuxfoundation.org> References: <20240401152547.867452742@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.6-stable review patch. If anyone has any objections, please let me know. ------------------ From: Huacai Chen [ Upstream commit c87e12e0e8c1241410e758e181ca6bf23efa5b5b ] >>From GCC commit 3f13154553f8546a ("df-scan: remove ad-hoc handling of global regs in asms"), global registers will no longer be forced to add to the def-use chain. Then current_thread_info(), current_stack_pointer and __my_cpu_offset may be lifted out of the loop because they are no longer treated as "volatile variables". This optimization is still correct for the current_thread_info() and current_stack_pointer usages because they are associated to a thread. However it is wrong for __my_cpu_offset because it is associated to a CPU rather than a thread: if the thread migrates to a different CPU in the loop, __my_cpu_offset should be changed. Change __my_cpu_offset definition to treat it as a "volatile variable", in order to avoid such a mis-optimization. Cc: stable@vger.kernel.org Reported-by: Xiaotian Wu Reported-by: Miao Wang Signed-off-by: Xing Li Signed-off-by: Hongchen Zhang Signed-off-by: Rui Wang Signed-off-by: Huacai Chen Signed-off-by: Sasha Levin --- arch/loongarch/include/asm/percpu.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/loongarch/include/asm/percpu.h b/arch/loongarch/include/asm/percpu.h index ed5da02b1cf6f..7e804140500f1 100644 --- a/arch/loongarch/include/asm/percpu.h +++ b/arch/loongarch/include/asm/percpu.h @@ -29,7 +29,12 @@ static inline void set_my_cpu_offset(unsigned long off) __my_cpu_offset = off; csr_write64(off, PERCPU_BASE_KS); } -#define __my_cpu_offset __my_cpu_offset + +#define __my_cpu_offset \ +({ \ + __asm__ __volatile__("":"+r"(__my_cpu_offset)); \ + __my_cpu_offset; \ +}) #define PERCPU_OP(op, asm_op, c_op) \ static __always_inline unsigned long __percpu_##op(void *ptr, \ -- 2.43.0