From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org,
"David Hildenbrand" <david@redhat.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Anton Johansson" <anjo@rev.ng>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH 12/24] exec: Move CPUTLBEntry helpers to cputlb.c
Date: Thu, 18 Apr 2024 21:25:11 +0200 [thread overview]
Message-ID: <20240418192525.97451-13-philmd@linaro.org> (raw)
In-Reply-To: <20240418192525.97451-1-philmd@linaro.org>
The following CPUTLBEntry helpers are only used in accel/tcg/cputlb.c:
- tlb_index()
- tlb_entry()
- tlb_read_idx()
- tlb_addr_write()
Move them to this file, allowing to remove the huge "cpu.h" header
inclusion from "exec/cpu_ldst.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/exec/cpu_ldst.h | 55 -----------------------------------------
accel/tcg/cputlb.c | 51 ++++++++++++++++++++++++++++++++++++++
2 files changed, 51 insertions(+), 55 deletions(-)
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
index 7032949dba..2c5a0a5c81 100644
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -70,7 +70,6 @@
#include "exec/abi_ptr.h"
#include "exec/mmu-access-type.h"
#include "qemu/int128.h"
-#include "cpu.h"
#if defined(CONFIG_USER_ONLY)
@@ -294,60 +293,6 @@ Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, abi_ptr addr,
Int128 cmpv, Int128 newv,
MemOpIdx oi, uintptr_t retaddr);
-#if !defined(CONFIG_USER_ONLY)
-
-#include "tcg/oversized-guest.h"
-
-static inline uint64_t tlb_read_idx(const CPUTLBEntry *entry,
- MMUAccessType access_type)
-{
- /* Do not rearrange the CPUTLBEntry structure members. */
- QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_read) !=
- MMU_DATA_LOAD * sizeof(uint64_t));
- QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_write) !=
- MMU_DATA_STORE * sizeof(uint64_t));
- QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_code) !=
- MMU_INST_FETCH * sizeof(uint64_t));
-
-#if TARGET_LONG_BITS == 32
- /* Use qatomic_read, in case of addr_write; only care about low bits. */
- const uint32_t *ptr = (uint32_t *)&entry->addr_idx[access_type];
- ptr += HOST_BIG_ENDIAN;
- return qatomic_read(ptr);
-#else
- const uint64_t *ptr = &entry->addr_idx[access_type];
-# if TCG_OVERSIZED_GUEST
- return *ptr;
-# else
- /* ofs might correspond to .addr_write, so use qatomic_read */
- return qatomic_read(ptr);
-# endif
-#endif
-}
-
-static inline uint64_t tlb_addr_write(const CPUTLBEntry *entry)
-{
- return tlb_read_idx(entry, MMU_DATA_STORE);
-}
-
-/* Find the TLB index corresponding to the mmu_idx + address pair. */
-static inline uintptr_t tlb_index(CPUState *cpu, uintptr_t mmu_idx,
- vaddr addr)
-{
- uintptr_t size_mask = cpu->neg.tlb.f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS;
-
- return (addr >> TARGET_PAGE_BITS) & size_mask;
-}
-
-/* Find the TLB entry corresponding to the mmu_idx + address pair. */
-static inline CPUTLBEntry *tlb_entry(CPUState *cpu, uintptr_t mmu_idx,
- vaddr addr)
-{
- return &cpu->neg.tlb.f[mmu_idx].table[tlb_index(cpu, mmu_idx, addr)];
-}
-
-#endif /* !defined(CONFIG_USER_ONLY) */
-
#if TARGET_BIG_ENDIAN
# define cpu_lduw_data cpu_lduw_be_data
# define cpu_ldsw_data cpu_ldsw_be_data
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index e16d02a62c..953c437ba9 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -27,6 +27,9 @@
#include "exec/tb-flush.h"
#include "exec/memory-internal.h"
#include "exec/ram_addr.h"
+#include "exec/mmu-access-type.h"
+#include "exec/tlb-common.h"
+#include "exec/vaddr.h"
#include "tcg/tcg.h"
#include "qemu/error-report.h"
#include "exec/log.h"
@@ -95,6 +98,54 @@ static inline size_t sizeof_tlb(CPUTLBDescFast *fast)
return fast->mask + (1 << CPU_TLB_ENTRY_BITS);
}
+static inline uint64_t tlb_read_idx(const CPUTLBEntry *entry,
+ MMUAccessType access_type)
+{
+ /* Do not rearrange the CPUTLBEntry structure members. */
+ QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_read) !=
+ MMU_DATA_LOAD * sizeof(uint64_t));
+ QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_write) !=
+ MMU_DATA_STORE * sizeof(uint64_t));
+ QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_code) !=
+ MMU_INST_FETCH * sizeof(uint64_t));
+
+#if TARGET_LONG_BITS == 32
+ /* Use qatomic_read, in case of addr_write; only care about low bits. */
+ const uint32_t *ptr = (uint32_t *)&entry->addr_idx[access_type];
+ ptr += HOST_BIG_ENDIAN;
+ return qatomic_read(ptr);
+#else
+ const uint64_t *ptr = &entry->addr_idx[access_type];
+# if TCG_OVERSIZED_GUEST
+ return *ptr;
+# else
+ /* ofs might correspond to .addr_write, so use qatomic_read */
+ return qatomic_read(ptr);
+# endif
+#endif
+}
+
+static inline uint64_t tlb_addr_write(const CPUTLBEntry *entry)
+{
+ return tlb_read_idx(entry, MMU_DATA_STORE);
+}
+
+/* Find the TLB index corresponding to the mmu_idx + address pair. */
+static inline uintptr_t tlb_index(CPUState *cpu, uintptr_t mmu_idx,
+ vaddr addr)
+{
+ uintptr_t size_mask = cpu->neg.tlb.f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS;
+
+ return (addr >> TARGET_PAGE_BITS) & size_mask;
+}
+
+/* Find the TLB entry corresponding to the mmu_idx + address pair. */
+static inline CPUTLBEntry *tlb_entry(CPUState *cpu, uintptr_t mmu_idx,
+ vaddr addr)
+{
+ return &cpu->neg.tlb.f[mmu_idx].table[tlb_index(cpu, mmu_idx, addr)];
+}
+
static void tlb_window_reset(CPUTLBDesc *desc, int64_t ns,
size_t max_entries)
{
--
2.41.0
next prev parent reply other threads:[~2024-04-18 19:31 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-18 19:24 [PATCH 00/24] include/exec: Rework (part 2) Philippe Mathieu-Daudé
2024-04-18 19:25 ` [PATCH 01/24] exec: Declare MMUAccessType type in 'mmu-access-type.h' header Philippe Mathieu-Daudé
2024-04-21 5:13 ` Richard Henderson
2024-04-18 19:25 ` [PATCH 02/24] exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' header Philippe Mathieu-Daudé
2024-04-18 19:29 ` Philippe Mathieu-Daudé
2024-04-25 6:29 ` Anton Johansson via
2024-04-25 6:29 ` Anton Johansson via
2024-04-21 5:19 ` Richard Henderson
2024-04-18 19:25 ` [PATCH 03/24] hw/core: Avoid including the full 'hw/core/cpu.h' in 'tcg-cpu-ops.h' Philippe Mathieu-Daudé
2024-04-21 5:20 ` Richard Henderson
2024-04-18 19:25 ` [PATCH 04/24] exec: Restrict TCG specific declarations of 'cputlb.h' Philippe Mathieu-Daudé
2024-04-21 5:28 ` Richard Henderson
2024-04-18 19:25 ` [PATCH 05/24] exec: Restrict 'cpu_ldst.h' to TCG accelerator Philippe Mathieu-Daudé
2024-04-21 16:27 ` Richard Henderson
2024-04-18 19:25 ` [PATCH 06/24] exec: Have guest_addr_valid() methods take abi_ptr/size_t arguments Philippe Mathieu-Daudé
2024-04-21 16:29 ` Richard Henderson
2024-04-18 19:25 ` [PATCH 07/24] exec: Un-inline tlb_vaddr_to_host() and declare it in 'exec/cputlb.h' Philippe Mathieu-Daudé
2024-04-21 16:33 ` Richard Henderson
2024-04-25 6:43 ` Anton Johansson via
2024-04-25 6:43 ` Anton Johansson via
2024-04-25 7:52 ` Anton Johansson via
2024-04-25 7:52 ` Anton Johansson via
2024-04-18 19:25 ` [PATCH 08/24] physmem: Move TCG CPU IOTLB methods around Philippe Mathieu-Daudé
2024-04-21 16:34 ` Richard Henderson
2024-04-18 19:25 ` [PATCH 09/24] physmem: Restrict TCG CPU IOTLB code to TCG accel Philippe Mathieu-Daudé
2024-04-25 7:30 ` Anton Johansson via
2024-04-25 7:30 ` Anton Johansson via
2024-04-18 19:25 ` [PATCH 10/24] exec: Reduce tlb_set_dirty() declaration scope Philippe Mathieu-Daudé
2024-04-21 16:36 ` Richard Henderson
2024-04-18 19:25 ` [PATCH 11/24] exec: Move tlb_reset_dirty*() declarations to 'exec/cputlb.h' Philippe Mathieu-Daudé
2024-04-25 7:25 ` Anton Johansson via
2024-04-25 7:25 ` Anton Johansson via
2024-04-18 19:25 ` Philippe Mathieu-Daudé [this message]
2024-04-21 16:39 ` [PATCH 12/24] exec: Move CPUTLBEntry helpers to cputlb.c Richard Henderson
2024-04-18 19:25 ` [PATCH 13/24] target/sparc: Replace abi_ulong by uint32_t for TARGET_ABI32 Philippe Mathieu-Daudé
2024-04-21 16:39 ` Richard Henderson
2024-04-18 19:25 ` [PATCH 14/24] exec: Rename 'exec/user/guest-base.h' as 'user/guest-base.h' Philippe Mathieu-Daudé
2024-04-25 7:39 ` Anton Johansson via
2024-04-25 7:39 ` Anton Johansson via
2024-04-25 8:30 ` Philippe Mathieu-Daudé
2024-04-18 19:25 ` [PATCH 15/24] exec: Restrict inclusion of 'user/guest-base.h' Philippe Mathieu-Daudé
2024-04-25 7:42 ` Anton Johansson via
2024-04-25 7:42 ` Anton Johansson via
2024-04-18 19:25 ` [PATCH 16/24] exec: Move GUEST_ADDR_MAX definition to 'cpu_ldst.h' Philippe Mathieu-Daudé
2024-04-25 7:44 ` Anton Johansson via
2024-04-25 7:44 ` Anton Johansson via
2024-04-18 19:25 ` [PATCH 17/24] exec: Include missing 'qemu/log-for-trace.h' header in 'exec/log.h' Philippe Mathieu-Daudé
2024-04-21 16:44 ` Richard Henderson
2024-04-22 9:05 ` Philippe Mathieu-Daudé
2024-04-22 11:44 ` Philippe Mathieu-Daudé
2024-04-18 19:25 ` [PATCH 18/24] plugins: Include missing 'qemu/bitmap.h' header Philippe Mathieu-Daudé
2024-04-21 16:45 ` Richard Henderson
2024-04-26 19:34 ` Pierrick Bouvier
2024-04-18 19:25 ` [PATCH 19/24] gdbstub: Avoid including 'cpu.h' in 'gdbstub/helpers.h' Philippe Mathieu-Daudé
2024-04-21 16:49 ` Richard Henderson
2024-04-18 19:25 ` [PATCH 20/24] hw/xtensa: Include missing 'exec/cpu-common.h' in 'bootparam.h' Philippe Mathieu-Daudé
2024-04-25 7:46 ` Anton Johansson via
2024-04-25 7:46 ` Anton Johansson via
2024-04-18 19:25 ` [PATCH 21/24] plugins: Un-inline qemu_plugin_disable_mem_helpers() Philippe Mathieu-Daudé
2024-04-21 16:52 ` Richard Henderson
2024-04-18 19:25 ` [PATCH 22/24] exec: Remove 'exec/tswap.h' from 'exec/cpu-all.h' Philippe Mathieu-Daudé
2024-04-19 4:25 ` Harsh Prateek Bora
2024-04-18 19:25 ` [PATCH 23/24] exec: Remove 'disas/disas.h' from 'exec/log.h' Philippe Mathieu-Daudé
2024-04-21 17:00 ` Richard Henderson
2024-04-18 19:25 ` [PATCH 24/24] exec: Remove unnecessary inclusions of 'hw/core/cpu.h' Philippe Mathieu-Daudé
2024-04-21 17:02 ` Richard Henderson
2024-04-18 19:35 ` [PATCH 00/24] include/exec: Rework (part 2) Philippe Mathieu-Daudé
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