From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org,
qemu-s390x@nongnu.org, qemu-ppc@nongnu.org,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>
Subject: [PULL 36/38] exec: Move CPUTLBEntry helpers to cputlb.c
Date: Fri, 26 Apr 2024 21:41:56 +0200 [thread overview]
Message-ID: <20240426194200.43723-37-philmd@linaro.org> (raw)
In-Reply-To: <20240426194200.43723-1-philmd@linaro.org>
The following CPUTLBEntry helpers are only used in accel/tcg/cputlb.c:
- tlb_index()
- tlb_entry()
- tlb_read_idx()
- tlb_addr_write()
Move them to this file, allowing to remove the huge "cpu.h" header
inclusion from "exec/cpu_ldst.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240418192525.97451-13-philmd@linaro.org>
---
include/exec/cpu_ldst.h | 55 -----------------------------------------
accel/tcg/cputlb.c | 51 ++++++++++++++++++++++++++++++++++++++
2 files changed, 51 insertions(+), 55 deletions(-)
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
index 7d0a0412ad..11ba3778ba 100644
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -70,7 +70,6 @@
#include "exec/abi_ptr.h"
#include "exec/mmu-access-type.h"
#include "qemu/int128.h"
-#include "cpu.h"
#if defined(CONFIG_USER_ONLY)
@@ -296,60 +295,6 @@ Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, abi_ptr addr,
Int128 cmpv, Int128 newv,
MemOpIdx oi, uintptr_t retaddr);
-#if !defined(CONFIG_USER_ONLY)
-
-#include "tcg/oversized-guest.h"
-
-static inline uint64_t tlb_read_idx(const CPUTLBEntry *entry,
- MMUAccessType access_type)
-{
- /* Do not rearrange the CPUTLBEntry structure members. */
- QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_read) !=
- MMU_DATA_LOAD * sizeof(uint64_t));
- QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_write) !=
- MMU_DATA_STORE * sizeof(uint64_t));
- QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_code) !=
- MMU_INST_FETCH * sizeof(uint64_t));
-
-#if TARGET_LONG_BITS == 32
- /* Use qatomic_read, in case of addr_write; only care about low bits. */
- const uint32_t *ptr = (uint32_t *)&entry->addr_idx[access_type];
- ptr += HOST_BIG_ENDIAN;
- return qatomic_read(ptr);
-#else
- const uint64_t *ptr = &entry->addr_idx[access_type];
-# if TCG_OVERSIZED_GUEST
- return *ptr;
-# else
- /* ofs might correspond to .addr_write, so use qatomic_read */
- return qatomic_read(ptr);
-# endif
-#endif
-}
-
-static inline uint64_t tlb_addr_write(const CPUTLBEntry *entry)
-{
- return tlb_read_idx(entry, MMU_DATA_STORE);
-}
-
-/* Find the TLB index corresponding to the mmu_idx + address pair. */
-static inline uintptr_t tlb_index(CPUState *cpu, uintptr_t mmu_idx,
- vaddr addr)
-{
- uintptr_t size_mask = cpu->neg.tlb.f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS;
-
- return (addr >> TARGET_PAGE_BITS) & size_mask;
-}
-
-/* Find the TLB entry corresponding to the mmu_idx + address pair. */
-static inline CPUTLBEntry *tlb_entry(CPUState *cpu, uintptr_t mmu_idx,
- vaddr addr)
-{
- return &cpu->neg.tlb.f[mmu_idx].table[tlb_index(cpu, mmu_idx, addr)];
-}
-
-#endif /* !defined(CONFIG_USER_ONLY) */
-
#if TARGET_BIG_ENDIAN
# define cpu_lduw_data cpu_lduw_be_data
# define cpu_ldsw_data cpu_ldsw_be_data
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index e16d02a62c..953c437ba9 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -27,6 +27,9 @@
#include "exec/tb-flush.h"
#include "exec/memory-internal.h"
#include "exec/ram_addr.h"
+#include "exec/mmu-access-type.h"
+#include "exec/tlb-common.h"
+#include "exec/vaddr.h"
#include "tcg/tcg.h"
#include "qemu/error-report.h"
#include "exec/log.h"
@@ -95,6 +98,54 @@ static inline size_t sizeof_tlb(CPUTLBDescFast *fast)
return fast->mask + (1 << CPU_TLB_ENTRY_BITS);
}
+static inline uint64_t tlb_read_idx(const CPUTLBEntry *entry,
+ MMUAccessType access_type)
+{
+ /* Do not rearrange the CPUTLBEntry structure members. */
+ QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_read) !=
+ MMU_DATA_LOAD * sizeof(uint64_t));
+ QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_write) !=
+ MMU_DATA_STORE * sizeof(uint64_t));
+ QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_code) !=
+ MMU_INST_FETCH * sizeof(uint64_t));
+
+#if TARGET_LONG_BITS == 32
+ /* Use qatomic_read, in case of addr_write; only care about low bits. */
+ const uint32_t *ptr = (uint32_t *)&entry->addr_idx[access_type];
+ ptr += HOST_BIG_ENDIAN;
+ return qatomic_read(ptr);
+#else
+ const uint64_t *ptr = &entry->addr_idx[access_type];
+# if TCG_OVERSIZED_GUEST
+ return *ptr;
+# else
+ /* ofs might correspond to .addr_write, so use qatomic_read */
+ return qatomic_read(ptr);
+# endif
+#endif
+}
+
+static inline uint64_t tlb_addr_write(const CPUTLBEntry *entry)
+{
+ return tlb_read_idx(entry, MMU_DATA_STORE);
+}
+
+/* Find the TLB index corresponding to the mmu_idx + address pair. */
+static inline uintptr_t tlb_index(CPUState *cpu, uintptr_t mmu_idx,
+ vaddr addr)
+{
+ uintptr_t size_mask = cpu->neg.tlb.f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS;
+
+ return (addr >> TARGET_PAGE_BITS) & size_mask;
+}
+
+/* Find the TLB entry corresponding to the mmu_idx + address pair. */
+static inline CPUTLBEntry *tlb_entry(CPUState *cpu, uintptr_t mmu_idx,
+ vaddr addr)
+{
+ return &cpu->neg.tlb.f[mmu_idx].table[tlb_index(cpu, mmu_idx, addr)];
+}
+
static void tlb_window_reset(CPUTLBDesc *desc, int64_t ns,
size_t max_entries)
{
--
2.41.0
next prev parent reply other threads:[~2024-04-26 19:47 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-26 19:41 [PULL 00/38] Exec / accelerators patches Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 01/38] exec: Rename NEED_CPU_H -> COMPILING_PER_TARGET Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 02/38] exec: Reduce tlb_set_dirty() declaration scope Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 03/38] exec: Include 'cpu.h' before validating CPUArchState placement Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 04/38] exec: Expose 'target_page.h' API to user emulation Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 05/38] accel: Include missing 'exec/cpu_ldst.h' header Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 06/38] gdbstub: Include missing 'hw/core/cpu.h' header Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 07/38] gdbstub: Simplify #ifdef'ry in helpers.h Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 08/38] gdbstub: Avoid including 'cpu.h' in 'gdbstub/helpers.h' Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 09/38] semihosting/uaccess: Avoid including 'cpu.h' Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 10/38] semihosting/guestfd: Remove unused 'semihosting/uaccess.h' header Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 11/38] target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h' Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 12/38] target/ppc/excp_helper: Avoid 'abi_ptr' in system emulation Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 13/38] target/sparc: Replace abi_ulong by uint32_t for TARGET_ABI32 Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 14/38] target/i386: Include missing 'exec/exec-all.h' header Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 15/38] accel/tcg: Un-inline retaddr helpers to 'user-retaddr.h' Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 16/38] accel/tcg: Include missing 'hw/core/cpu.h' header Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 17/38] accel/tcg: Include missing headers in 'tb-jmp-cache.h' Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 18/38] accel/tcg: Rename load-extract/store-insert headers using .h.inc suffix Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 19/38] accel/tcg: Rename helper-head.h -> helper-head.h.inc Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 20/38] accel/whpx: Use accel-specific per-vcpu @dirty field Philippe Mathieu-Daudé
2024-04-28 20:12 ` Volker Rümelin
2024-04-29 8:22 ` Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 21/38] accel/nvmm: " Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 22/38] accel/hvf: " Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 23/38] exec/cpu-all: Reduce 'qemu/rcu.h' header inclusion Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 24/38] exec/cpu-all: Remove unused 'qemu/thread.h' header Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 25/38] exec/cpu-all: Remove unused tswapls() definitions Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 26/38] exec: Declare target_words_bigendian() in 'exec/tswap.h' Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 27/38] exec: Move [b]tswapl() declarations to 'exec/user/tswap-target.h' Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 28/38] exec/user: Do not include 'cpu.h' in 'abitypes.h' Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 29/38] exec: Declare abi_ptr type in its own 'abi_ptr.h' header Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 30/38] exec: Declare MMUAccessType type in 'mmu-access-type.h' header Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 31/38] exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' header Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 32/38] exec: Restrict TCG specific declarations of 'cputlb.h' Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 33/38] exec: Restrict 'cpu_ldst.h' to TCG accelerator Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 34/38] exec: Rename 'exec/user/guest-base.h' as 'user/guest-base.h' Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 35/38] exec: Restrict inclusion of 'user/guest-base.h' Philippe Mathieu-Daudé
2024-04-26 19:41 ` Philippe Mathieu-Daudé [this message]
2024-04-26 19:41 ` [PULL 37/38] hw/core: Avoid including the full 'hw/core/cpu.h' in 'tcg-cpu-ops.h' Philippe Mathieu-Daudé
2024-04-26 19:41 ` [PULL 38/38] plugins: Include missing 'qemu/bitmap.h' header Philippe Mathieu-Daudé
2024-04-27 14:47 ` [PULL 00/38] Exec / accelerators patches Richard Henderson
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