From: kernel test robot <lkp@intel.com>
To: Otavio Salvador <otavio@ossystems.com.br>
Cc: oe-kbuild-all@lists.linux.dev
Subject: [freescale-fslc:5.15-2.2.x-imx 28553/29910] drivers/clk/imx/clk-imx8mp.c:413:27: warning: unused variable 'imx8mp_media_disp2_pix_sels'
Date: Sat, 27 Apr 2024 11:57:14 +0800 [thread overview]
Message-ID: <202404271144.NcgRCpee-lkp@intel.com> (raw)
tree: https://github.com/Freescale/linux-fslc 5.15-2.2.x-imx
head: ebcdbe7ec49f9c3405ee4b89e7ec279e313026f3
commit: 69287fcf758185a65653524231e60ca800b6a325 [28553/29910] dt-bindings: clocks: imx8mp: Add ID for usb suspend clock
config: hexagon-allmodconfig (https://download.01.org/0day-ci/archive/20240427/202404271144.NcgRCpee-lkp@intel.com/config)
compiler: clang version 19.0.0git (https://github.com/llvm/llvm-project 5ef5eb66fb428aaf61fb51b709f065c069c11242)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240427/202404271144.NcgRCpee-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202404271144.NcgRCpee-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> drivers/clk/imx/clk-imx8mp.c:413:27: warning: unused variable 'imx8mp_media_disp2_pix_sels' [-Wunused-const-variable]
413 | static const char * const imx8mp_media_disp2_pix_sels[] = {"osc_24m", "video_pll1_out", "audio_pll2_out",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
1 warning generated.
vim +/imx8mp_media_disp2_pix_sels +413 drivers/clk/imx/clk-imx8mp.c
7ab227210110a4 Peng Fan 2020-02-19 320
9c140d9926761b Anson Huang 2020-01-08 321 static const char * const imx8mp_m7_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll2_250m",
9c140d9926761b Anson Huang 2020-01-08 322 "vpu_pll_out", "sys_pll1_800m", "audio_pll1_out",
9c140d9926761b Anson Huang 2020-01-08 323 "video_pll1_out", "sys_pll3_out", };
9c140d9926761b Anson Huang 2020-01-08 324
9c140d9926761b Anson Huang 2020-01-08 325 static const char * const imx8mp_ml_sels[] = {"osc_24m", "gpu_pll_out", "sys_pll1_800m",
9c140d9926761b Anson Huang 2020-01-08 326 "sys_pll3_out", "sys_pll2_1000m", "audio_pll1_out",
9c140d9926761b Anson Huang 2020-01-08 327 "video_pll1_out", "audio_pll2_out", };
9c140d9926761b Anson Huang 2020-01-08 328
9c140d9926761b Anson Huang 2020-01-08 329 static const char * const imx8mp_gpu3d_core_sels[] = {"osc_24m", "gpu_pll_out", "sys_pll1_800m",
9c140d9926761b Anson Huang 2020-01-08 330 "sys_pll3_out", "sys_pll2_1000m", "audio_pll1_out",
9c140d9926761b Anson Huang 2020-01-08 331 "video_pll1_out", "audio_pll2_out", };
9c140d9926761b Anson Huang 2020-01-08 332
9c140d9926761b Anson Huang 2020-01-08 333 static const char * const imx8mp_gpu3d_shader_sels[] = {"osc_24m", "gpu_pll_out", "sys_pll1_800m",
9c140d9926761b Anson Huang 2020-01-08 334 "sys_pll3_out", "sys_pll2_1000m", "audio_pll1_out",
9c140d9926761b Anson Huang 2020-01-08 335 "video_pll1_out", "audio_pll2_out", };
9c140d9926761b Anson Huang 2020-01-08 336
9c140d9926761b Anson Huang 2020-01-08 337 static const char * const imx8mp_gpu2d_sels[] = {"osc_24m", "gpu_pll_out", "sys_pll1_800m",
9c140d9926761b Anson Huang 2020-01-08 338 "sys_pll3_out", "sys_pll2_1000m", "audio_pll1_out",
9c140d9926761b Anson Huang 2020-01-08 339 "video_pll1_out", "audio_pll2_out", };
9c140d9926761b Anson Huang 2020-01-08 340
9c140d9926761b Anson Huang 2020-01-08 341 static const char * const imx8mp_audio_axi_sels[] = {"osc_24m", "gpu_pll_out", "sys_pll1_800m",
9c140d9926761b Anson Huang 2020-01-08 342 "sys_pll3_out", "sys_pll2_1000m", "audio_pll1_out",
9c140d9926761b Anson Huang 2020-01-08 343 "video_pll1_out", "audio_pll2_out", };
9c140d9926761b Anson Huang 2020-01-08 344
9c140d9926761b Anson Huang 2020-01-08 345 static const char * const imx8mp_hsio_axi_sels[] = {"osc_24m", "sys_pll2_500m", "sys_pll1_800m",
9c140d9926761b Anson Huang 2020-01-08 346 "sys_pll2_100m", "sys_pll2_200m", "clk_ext2",
9c140d9926761b Anson Huang 2020-01-08 347 "clk_ext4", "audio_pll2_out", };
9c140d9926761b Anson Huang 2020-01-08 348
9c140d9926761b Anson Huang 2020-01-08 349 static const char * const imx8mp_media_isp_sels[] = {"osc_24m", "sys_pll2_1000m", "sys_pll1_800m",
9c140d9926761b Anson Huang 2020-01-08 350 "sys_pll3_out", "sys_pll1_400m", "audio_pll2_out",
9c140d9926761b Anson Huang 2020-01-08 351 "clk_ext1", "sys_pll2_500m", };
9c140d9926761b Anson Huang 2020-01-08 352
9c140d9926761b Anson Huang 2020-01-08 353 static const char * const imx8mp_main_axi_sels[] = {"osc_24m", "sys_pll2_333m", "sys_pll1_800m",
9c140d9926761b Anson Huang 2020-01-08 354 "sys_pll2_250m", "sys_pll2_1000m", "audio_pll1_out",
9c140d9926761b Anson Huang 2020-01-08 355 "video_pll1_out", "sys_pll1_100m",};
9c140d9926761b Anson Huang 2020-01-08 356
9c140d9926761b Anson Huang 2020-01-08 357 static const char * const imx8mp_enet_axi_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll1_800m",
9c140d9926761b Anson Huang 2020-01-08 358 "sys_pll2_250m", "sys_pll2_200m", "audio_pll1_out",
9c140d9926761b Anson Huang 2020-01-08 359 "video_pll1_out", "sys_pll3_out", };
9c140d9926761b Anson Huang 2020-01-08 360
9c140d9926761b Anson Huang 2020-01-08 361 static const char * const imx8mp_nand_usdhc_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll1_800m",
9c140d9926761b Anson Huang 2020-01-08 362 "sys_pll2_200m", "sys_pll1_133m", "sys_pll3_out",
9c140d9926761b Anson Huang 2020-01-08 363 "sys_pll2_250m", "audio_pll1_out", };
9c140d9926761b Anson Huang 2020-01-08 364
9c140d9926761b Anson Huang 2020-01-08 365 static const char * const imx8mp_vpu_bus_sels[] = {"osc_24m", "sys_pll1_800m", "vpu_pll_out",
9c140d9926761b Anson Huang 2020-01-08 366 "audio_pll2_out", "sys_pll3_out", "sys_pll2_1000m",
9c140d9926761b Anson Huang 2020-01-08 367 "sys_pll2_200m", "sys_pll1_100m", };
9c140d9926761b Anson Huang 2020-01-08 368
9c140d9926761b Anson Huang 2020-01-08 369 static const char * const imx8mp_media_axi_sels[] = {"osc_24m", "sys_pll2_1000m", "sys_pll1_800m",
9c140d9926761b Anson Huang 2020-01-08 370 "sys_pll3_out", "sys_pll1_40m", "audio_pll2_out",
9c140d9926761b Anson Huang 2020-01-08 371 "clk_ext1", "sys_pll2_500m", };
9c140d9926761b Anson Huang 2020-01-08 372
9c140d9926761b Anson Huang 2020-01-08 373 static const char * const imx8mp_media_apb_sels[] = {"osc_24m", "sys_pll2_125m", "sys_pll1_800m",
9c140d9926761b Anson Huang 2020-01-08 374 "sys_pll3_out", "sys_pll1_40m", "audio_pll2_out",
9c140d9926761b Anson Huang 2020-01-08 375 "clk_ext1", "sys_pll1_133m", };
9c140d9926761b Anson Huang 2020-01-08 376
9c140d9926761b Anson Huang 2020-01-08 377 static const char * const imx8mp_gpu_axi_sels[] = {"osc_24m", "sys_pll1_800m", "gpu_pll_out",
9c140d9926761b Anson Huang 2020-01-08 378 "sys_pll3_out", "sys_pll2_1000m", "audio_pll1_out",
9c140d9926761b Anson Huang 2020-01-08 379 "video_pll1_out", "audio_pll2_out", };
9c140d9926761b Anson Huang 2020-01-08 380
9c140d9926761b Anson Huang 2020-01-08 381 static const char * const imx8mp_gpu_ahb_sels[] = {"osc_24m", "sys_pll1_800m", "gpu_pll_out",
9c140d9926761b Anson Huang 2020-01-08 382 "sys_pll3_out", "sys_pll2_1000m", "audio_pll1_out",
9c140d9926761b Anson Huang 2020-01-08 383 "video_pll1_out", "audio_pll2_out", };
9c140d9926761b Anson Huang 2020-01-08 384
9c140d9926761b Anson Huang 2020-01-08 385 static const char * const imx8mp_noc_sels[] = {"osc_24m", "sys_pll1_800m", "sys_pll3_out",
9c140d9926761b Anson Huang 2020-01-08 386 "sys_pll2_1000m", "sys_pll2_500m", "audio_pll1_out",
9c140d9926761b Anson Huang 2020-01-08 387 "video_pll1_out", "audio_pll2_out", };
9c140d9926761b Anson Huang 2020-01-08 388
9c140d9926761b Anson Huang 2020-01-08 389 static const char * const imx8mp_noc_io_sels[] = {"osc_24m", "sys_pll1_800m", "sys_pll3_out",
9c140d9926761b Anson Huang 2020-01-08 390 "sys_pll2_1000m", "sys_pll2_500m", "audio_pll1_out",
9c140d9926761b Anson Huang 2020-01-08 391 "video_pll1_out", "audio_pll2_out", };
9c140d9926761b Anson Huang 2020-01-08 392
9c140d9926761b Anson Huang 2020-01-08 393 static const char * const imx8mp_ml_axi_sels[] = {"osc_24m", "sys_pll1_800m", "gpu_pll_out",
9c140d9926761b Anson Huang 2020-01-08 394 "sys_pll3_out", "sys_pll2_1000m", "audio_pll1_out",
9c140d9926761b Anson Huang 2020-01-08 395 "video_pll1_out", "audio_pll2_out", };
9c140d9926761b Anson Huang 2020-01-08 396
9c140d9926761b Anson Huang 2020-01-08 397 static const char * const imx8mp_ml_ahb_sels[] = {"osc_24m", "sys_pll1_800m", "gpu_pll_out",
9c140d9926761b Anson Huang 2020-01-08 398 "sys_pll3_out", "sys_pll2_1000m", "audio_pll1_out",
9c140d9926761b Anson Huang 2020-01-08 399 "video_pll1_out", "audio_pll2_out", };
9c140d9926761b Anson Huang 2020-01-08 400
9c140d9926761b Anson Huang 2020-01-08 401 static const char * const imx8mp_ahb_sels[] = {"osc_24m", "sys_pll1_133m", "sys_pll1_800m",
9c140d9926761b Anson Huang 2020-01-08 402 "sys_pll1_400m", "sys_pll2_125m", "sys_pll3_out",
9c140d9926761b Anson Huang 2020-01-08 403 "audio_pll1_out", "video_pll1_out", };
9c140d9926761b Anson Huang 2020-01-08 404
9c140d9926761b Anson Huang 2020-01-08 405 static const char * const imx8mp_audio_ahb_sels[] = {"osc_24m", "sys_pll2_500m", "sys_pll1_800m",
9c140d9926761b Anson Huang 2020-01-08 406 "sys_pll2_1000m", "sys_pll2_166m", "sys_pll3_out",
9c140d9926761b Anson Huang 2020-01-08 407 "audio_pll1_out", "video_pll1_out", };
9c140d9926761b Anson Huang 2020-01-08 408
9c140d9926761b Anson Huang 2020-01-08 409 static const char * const imx8mp_mipi_dsi_esc_rx_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_80m",
9c140d9926761b Anson Huang 2020-01-08 410 "sys_pll1_800m", "sys_pll2_1000m",
9c140d9926761b Anson Huang 2020-01-08 411 "sys_pll3_out", "clk_ext3", "audio_pll2_out", };
9c140d9926761b Anson Huang 2020-01-08 412
1cd6b5552d3f67 Liu Ying 2019-10-16 @413 static const char * const imx8mp_media_disp2_pix_sels[] = {"osc_24m", "video_pll1_out", "audio_pll2_out",
1cd6b5552d3f67 Liu Ying 2019-10-16 414 "audio_pll1_out", "sys_pll1_800m", "sys_pll2_1000m",
1cd6b5552d3f67 Liu Ying 2019-10-16 415 "sys_pll3_out", "clk_ext4", };
1cd6b5552d3f67 Liu Ying 2019-10-16 416
:::::: The code at line 413 was first introduced by commit
:::::: 1cd6b5552d3f6706ed84289fb8a3d527c18b5bab MLK-23252-1 clk: imx8mp: Add DISP2 pixel clock
:::::: TO: Liu Ying <victor.liu@nxp.com>
:::::: CC: Dong Aisheng <aisheng.dong@nxp.com>
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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