From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexander Stein Date: Sun, 12 Jul 2015 09:26:32 +0200 Subject: [U-Boot] [PATCH 2/5] arm1176/cpu: Add icache and dcache support In-Reply-To: <55A0A7DC.5020002@wwwdotorg.org> References: <1436003324-8769-1-git-send-email-alexanders83@web.de> <1436003324-8769-3-git-send-email-alexanders83@web.de> <55A0A7DC.5020002@wwwdotorg.org> Message-ID: <3357956.WLmRVSDGQj@kongar> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Friday 10 July 2015, 23:21:32 wrote Stephen Warren: > On 07/04/2015 03:48 AM, Alexander Stein wrote: > > The code is copied 1:1 from arm1136 which uses the same cp15 registers. > > Same comment here. Perhaps create a cache-armv6.c (or whatever name is > appropriate; I'm not sure if ARMv6 mandates caches work this way, or if > ARM11 is a better name, or ...? I know that cortex-m0 and cortex-m1 are also ARMv6(-M). I have no idea how cache works there or even if there is any. I think ARM11 seems more suitable for me. But where to put? Currently each CPU core has it's own directory. Alexander