From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754310AbbFOX57 (ORCPT ); Mon, 15 Jun 2015 19:57:59 -0400 Received: from mailout4.w1.samsung.com ([210.118.77.14]:40570 "EHLO mailout4.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750989AbbFOX5u (ORCPT ); Mon, 15 Jun 2015 19:57:50 -0400 X-AuditID: cbfec7f4-f79c56d0000012ee-9b-557f667bcf68 Message-id: <557F6677.8080507@samsung.com> Date: Tue, 16 Jun 2015 08:57:43 +0900 From: Krzysztof Kozlowski User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 MIME-version: 1.0 To: Javier Martinez Canillas , Sudeep Holla , Doug Anderson Cc: "linux-samsung-soc@vger.kernel.org" , Jason Cooper , Chanho Park , "linux-kernel@vger.kernel.org" , Kukjin Kim , Peter Chubb , Shuah Khan , Thomas Gleixner , Tomasz Figa , "linux-arm-kernel@lists.infradead.org" Subject: Re: [PATCH v2 1/1] irqchip: exynos-combiner: Save IRQ enable set on suspend References: <1434087795-13990-1-git-send-email-javier.martinez@collabora.co.uk> <557AB00C.5040606@arm.com> <557AC23D.8040602@collabora.co.uk> <557AC85E.5070705@arm.com> <557AD728.7090908@collabora.co.uk> <557B34A7.4090507@collabora.co.uk> <557E82BC.7080203@collabora.co.uk> <557E947B.3030804@arm.com> <557EE890.2050001@collabora.co.uk> <557EEA6C.6020002@arm.com> <557EEDFB.7080502@collabora.co.uk> In-reply-to: <557EEDFB.7080502@collabora.co.uk> Content-type: text/plain; charset=utf-8 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprJIsWRmVeSWpSXmKPExsVy+t/xq7rVafWhBodbxSzOLjvIZtG45DKL xdHfBRavXxha9D9+zWyx6fE1VovLu+awWcw4v4/J4v37hWwW37p6WC2+/nSwWH5qB4vF5k1T mS1W7frD6MDnsWbeGkaP2Q0XWTz+Pr/O4rFz1l12j02rOtk8Gg6cZ/F4d+4cu8fmJfUeB9/t ZPXo27KK0ePzJrkA7igum5TUnMyy1CJ9uwSujCfnbjIWHGCtOLT/IWsD4xqWLkYODgkBE4mr zUldjJxAppjEhXvr2boYuTiEBJYyStxtW8wK4TxllDi04Ss7SBWvgJZE992bbCA2i4CqROfE HcwgNpuAscTm5UvA4qICERJvL59kgqgXlPgx+R4LyCARgR5GiZ1v+8EcZoEHzBITD9wEqxIW CJM48noj1G6gxJ89W1lAEpwC+hJ3j31lA7mVWUBdYsqUXJAws4C8xOY1b5knMArMQrJkFkLV LCRVCxiZVzGKppYmFxQnpeca6hUn5haX5qXrJefnbmKERNiXHYyLj1kdYhTgYFTi4Y34VBsq xJpYVlyZe4hRgoNZSYTXyaI+VIg3JbGyKrUoP76oNCe1+BCjNAeLkjjv3F3vQ4QE0hNLUrNT UwtSi2CyTBycUg2MPAXPKlrtV8t6PIzs1Nsmm7/B0LXR0pkrlMNDxqJpz6IP046t+CG16M13 F47Jtv3XpgeeZt33ba+/ydFTjl97F8af8FqwU9zlhdj0fQ19/1zqfD9tq2DlbfP8aCts9J3J y3/xph8xZev/vpaRvGsy285T+uKfQw/ftPf9M1wh27FQZtvOVy82KbEUZyQaajEXFScCAOtA VL2sAgAA Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 16.06.2015 00:23, Javier Martinez Canillas wrote: (...) >>> To do a more intrusive change, I should better understand the interactions >>> between the Exynos pinctrl / GPIO, interrupt combiner and the GIC and in the >>> meantime S2R will continue to be broken on these platforms unless someone >>> more familiar with all this could point me in the right direction. >>> >> >> As I said I am fine with this patch for now and I don't want to block it. >> > > Thanks a lot, Krzysztof who is one of the Exynos maintainers has also agreed > with the patch so hopefully this can land sooner rather than later. I assume this will go through irqchip tree, right? Best regards, Krzysztof From mboxrd@z Thu Jan 1 00:00:00 1970 From: k.kozlowski@samsung.com (Krzysztof Kozlowski) Date: Tue, 16 Jun 2015 08:57:43 +0900 Subject: [PATCH v2 1/1] irqchip: exynos-combiner: Save IRQ enable set on suspend In-Reply-To: <557EEDFB.7080502@collabora.co.uk> References: <1434087795-13990-1-git-send-email-javier.martinez@collabora.co.uk> <557AB00C.5040606@arm.com> <557AC23D.8040602@collabora.co.uk> <557AC85E.5070705@arm.com> <557AD728.7090908@collabora.co.uk> <557B34A7.4090507@collabora.co.uk> <557E82BC.7080203@collabora.co.uk> <557E947B.3030804@arm.com> <557EE890.2050001@collabora.co.uk> <557EEA6C.6020002@arm.com> <557EEDFB.7080502@collabora.co.uk> Message-ID: <557F6677.8080507@samsung.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 16.06.2015 00:23, Javier Martinez Canillas wrote: (...) >>> To do a more intrusive change, I should better understand the interactions >>> between the Exynos pinctrl / GPIO, interrupt combiner and the GIC and in the >>> meantime S2R will continue to be broken on these platforms unless someone >>> more familiar with all this could point me in the right direction. >>> >> >> As I said I am fine with this patch for now and I don't want to block it. >> > > Thanks a lot, Krzysztof who is one of the Exynos maintainers has also agreed > with the patch so hopefully this can land sooner rather than later. I assume this will go through irqchip tree, right? Best regards, Krzysztof