From mboxrd@z Thu Jan  1 00:00:00 1970
From: Julien Grall <julien.grall.oss@gmail.com>
Subject: Re: [PATCHv2 5/5] evtchn: pad struct evtchn to 64 bytes
Date: Tue, 16 Jun 2015 13:57:45 +0100
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To: Jan Beulich <JBeulich@suse.com>, Julien Grall <julien.grall@citrix.com>
Cc: xen-devel@lists.xenproject.org, Keir Fraser <keir@xen.org>, Tim Deegan <tim@xen.org>, David Vrabel <david.vrabel@citrix.com>, Ian Campbell <ian.campbell@citrix.com>
List-Id: xen-devel@lists.xenproject.org

On 16/06/15 12:59, Jan Beulich wrote:
>>>> On 16.06.15 at 13:14, <julien.grall@citrix.com> wrote:
>> On 15/06/2015 16:48, David Vrabel wrote:
>>> diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h
>>> index 44ea92d..a0ff9d2 100644
>>> --- a/xen/include/xen/sched.h
>>> +++ b/xen/include/xen/sched.h
>>> @@ -129,7 +129,7 @@ struct evtchn
>>>   #endif
>>>       } ssid;
>>>   #endif
>>> -};
>>> +} __attribute__((aligned(64)));
>>
>> Why don't you use __cacheline_aligned?
> 
> That would double the size on x86, for little or no benefit.

Well, the cache line size is not necessarily 64 bytes on every
architecture. In the case of ARM, the cache line depends on the
processor version.

__cacheline_aligned is the only way to ensure that the cache line is not
shared on ARM.

AFAIU, the goal of this patch is to avoid sharing the cache line. If
not, the commit message is misleading because it claims that a cache
line is always 64 bytes...

Regards,

-- 
Julien Grall