From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Vrabel Subject: Re: [PATCHv2 5/5] evtchn: pad struct evtchn to 64 bytes Date: Tue, 16 Jun 2015 14:13:09 +0100 Message-ID: <558020E5.7050707@citrix.com> References: <1434383299-21833-1-git-send-email-david.vrabel@citrix.com> <1434383299-21833-6-git-send-email-david.vrabel@citrix.com> <55800532.7070904@citrix.com> <55802BC60200007800085766@mail.emea.novell.com> <55801D49.3030508@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Z4qgI-00028J-Rh for xen-devel@lists.xenproject.org; Tue, 16 Jun 2015 13:13:34 +0000 In-Reply-To: <55801D49.3030508@gmail.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Julien Grall , Jan Beulich , Julien Grall Cc: xen-devel@lists.xenproject.org, Ian Campbell , Keir Fraser , David Vrabel , Tim Deegan List-Id: xen-devel@lists.xenproject.org On 16/06/15 13:57, Julien Grall wrote: > On 16/06/15 12:59, Jan Beulich wrote: >>>>> On 16.06.15 at 13:14, wrote: >>> On 15/06/2015 16:48, David Vrabel wrote: >>>> diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h >>>> index 44ea92d..a0ff9d2 100644 >>>> --- a/xen/include/xen/sched.h >>>> +++ b/xen/include/xen/sched.h >>>> @@ -129,7 +129,7 @@ struct evtchn >>>> #endif >>>> } ssid; >>>> #endif >>>> -}; >>>> +} __attribute__((aligned(64))); >>> >>> Why don't you use __cacheline_aligned? >> >> That would double the size on x86, for little or no benefit. > > Well, the cache line size is not necessarily 64 bytes on every > architecture. In the case of ARM, the cache line depends on the > processor version. > > __cacheline_aligned is the only way to ensure that the cache line is not > shared on ARM. > > AFAIU, the goal of this patch is to avoid sharing the cache line. If > not, the commit message is misleading because it claims that a cache > line is always 64 bytes... We want to avoid sharing the cache line where we can do so for no additional memory cost. David