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Date: Tue, 16 Jun 2015 15:38:59 +0100
From: "Jan Beulich" <JBeulich@suse.com>
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Subject: Re: [Qemu-devel] [PATCH 4/6] xen/pass-through: correctly deal with
 RW1C bits
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To: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Cc: xen-devel <xen-devel@lists.xenproject.org>, qemu-devel@nongnu.org

>>> On 16.06.15 at 16:19, <stefano.stabellini@eu.citrix.com> wrote:
> On Fri, 5 Jun 2015, Jan Beulich wrote:
>> @@ -1016,11 +1002,12 @@ static XenPTRegInfo xen_pt_emu_reg_pm[]=20
>>          .size       =3D 2,
>>          .init_val   =3D 0x0008,
>>          .res_mask   =3D 0x00F0,
>> -        .ro_mask    =3D 0xE10C,
>> +        .ro_mask    =3D 0x610C,
>> +        .rw1c_mask  =3D 0x8000,
>>          .emu_mask   =3D 0x810B,
>>          .init       =3D xen_pt_common_reg_init,
>>          .u.w.read   =3D xen_pt_word_reg_read,
>> -        .u.w.write  =3D xen_pt_pmcsr_reg_write,
>> +        .u.w.write  =3D xen_pt_word_reg_write,
>>      },
>>      {
>>          .size =3D 0,
>=20
> I can see that the code change doesn't cause a change in behaviour for
> PCI_PM_CTRL, but it does for PCI_STATUS, PCI_EXP_DEVSTA and
> PCI_EXP_LNKSTA. Please explain why in the commit message.

I'm not sure what you're after in a patch titled "correctly deal with
RW1C bits".

Jan