From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51593) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z5IoC-0000rk-Un for qemu-devel@nongnu.org; Wed, 17 Jun 2015 15:15:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z5Io7-00043s-Qw for qemu-devel@nongnu.org; Wed, 17 Jun 2015 15:15:36 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36643) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z5Io7-00043l-LS for qemu-devel@nongnu.org; Wed, 17 Jun 2015 15:15:31 -0400 Message-ID: <5581C74C.5070405@redhat.com> Date: Wed, 17 Jun 2015 21:15:24 +0200 From: Laszlo Ersek MIME-Version: 1.0 References: <1434545105-5811-1-git-send-email-lersek@redhat.com> <1434545105-5811-8-git-send-email-lersek@redhat.com> <20150617155237-mutt-send-email-mst@redhat.com> <20150617141820.GA11337@morn.localdomain> <55818819.3010107@redhat.com> <20150617150544.GA26500@redhat.com> <5581B97E.8020707@redhat.com> <20150617204828-mutt-send-email-mst@redhat.com> In-Reply-To: <20150617204828-mutt-send-email-mst@redhat.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v6 7/7] hw/pci-bridge: format SeaBIOS-compliant OFW device node for PXB List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: Marcel Apfelbaum , Kevin O'Connor , qemu-devel@nongnu.org, Markus Armbruster (I'm not trying to answer instead of Kevin, just to comment.) On 06/17/15 20:54, Michael S. Tsirkin wrote: > On Wed, Jun 17, 2015 at 08:16:30PM +0200, Laszlo Ersek wrote: >>> We do need to agree about the correct paths however, this is host/guest >>> interface which we have to maintain forever, and it's important to get >>> it right. I kept hoping we can come up with something saner than >>> the sequence # but oh well. Do you disagree with the statement >>> that seabios path is currently incorrect? Kevin seems to agree. >> >> As discussed earlier, there are two questions to consider about the OFW >> devpath pattern >> >> /pci-root@N/pci@i0cf8/... >> >> that SeaBIOS currently recognizes for devices that reside behind extra >> PCI root buses. >> >> Q1: everything in that pattern that is not "N" >> Q2: what goes into N >> >> These are independent questions. > > > Right. But what I was discussing is a different issue. The point is > that it does not make sense to have /pci@i0cf8 under two hierarchies: > it's the same register. What happens is that you access /pci@i0cf8 and > then *through that* you access another pci root. Not the other way > around. The proposal thus is to switch to /pci@i0cf8/pci-root@N in > seabios, For me this is still Question 1 -- 'everything in that pattern that is not "N"'. You seem to care about the *semantics* of that OFW device path fragment. I don't. First, the relevant IEEE spec is prohibitively hard for me to interpret semantically. Second, there is no known firmware that actually looks at the "i0cf8" unit-address term and decides *based on that term* that it has to talk PCI via 0xCF8 and 0xCFC. In other words, the current second node is entirely opaque in my interpretation. > unconditionally - not if (QEMU). This might qualify as some kind of semantic cleanup, but it will nonetheless break the SeaBIOS boot options expressed in OFW notation that are already persistently stored in cbfs, on physical machines. (As far as I understood.) It might not break the Coreboot-SeaBIOS interface, but it might invalidate preexistent entries that exist in the prior form (wherever they exist on physical hardware). > And I thought Kevin agreed > it's a good idea. > > Kevin - is this a good summary of your opinion? Kevin, please do answer. Thanks Laszlo