From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Nelson Date: Fri, 4 Dec 2015 09:08:27 -0700 Subject: [U-Boot] mmc erase fails from U-Boot command line In-Reply-To: References: <5620E3A7.7040909@defengcorp.com> <5624CEC5.8040901@digi.com> <52F917CEA1B9C64C94833D53889D478C269236@dor-sms-xch01.digi.com> <565DEF80.90204@nelint.com> <565F3CD3.1010100@nelint.com> Message-ID: <5661BA7B.8030904@nelint.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Michael, On 12/02/2015 01:00 PM, Michael Trimarchi wrote: > Hi > > On Wed, Dec 2, 2015 at 8:54 PM, Fabio Estevam wrote: >> Hi Michael, >> >> On Wed, Dec 2, 2015 at 5:37 PM, Michael Trimarchi >> wrote: >> >>> Can you print the sysctl & 0xF? I want to check if this workaround is >>> really applied >> >> In my testing I see the error with or without the ENGcm03648 workaround. >> > > Well the workaround works if the sysctl is 0xf on the last bits, > because it needs the > clocks enable according to the original description. > > http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01&id=e436525a70fe47623d346bc7d9f08f12ff8ad787 > > So if you hit this timeout without having this set, I don't think it can work > I think you're onto something. According to the i.MX35 reference manual, which I think was the origin of this patch, the low four bits of the SYSCTL register of the SDHC5 3 - SDCLKEN 2 - PEREN 1 - HCKEN 0 - IPGEN See page 603 of http://cache.freescale.com/files/dsp/doc/ref_manual/IMX35RM.pdf But in the i.MX6 reference manual, the low four bits are reserved and say "Always write as 1". See pages 5679-5680 of http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf It appears that when this patch was ported from the Freescale version, the test for "is_usdhc" was lost. http://git.denx.de/?p=u-boot.git;a=commitdiff;h=7a5b80297bc6cef0c10e5f57ac0450678dc7bc5e