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From: "Jan Beulich" <JBeulich@suse.com>
To: Stefano Stabellini <sstabellini@kernel.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
	Julien Grall <julien.grall@arm.com>,
	Stefano Stabellini <stefanos@xilinx.com>,
	xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: [PATCH 1/6] xen: extend XEN_DOMCTL_memory_mapping to handle cacheability
Date: Fri, 26 Apr 2019 01:12:14 -0600	[thread overview]
Message-ID: <5CC2AF4E0200007800229537@prv1-mh.provo.novell.com> (raw)
In-Reply-To: <alpine.DEB.2.10.1904251523070.24598@sstabellini-ThinkPad-X260>

>>> On 26.04.19 at 00:31, <sstabellini@kernel.org> wrote:
> On Thu, 25 Apr 2019, Jan Beulich wrote:
>> But I agree with Julien (in case this wasn't explicit enough from
>> my earlier replay) that it first needs to be clarified whether such
>> an interface is wanted in the first place.
> 
> I have written down a few more details about the use-case elsewhere,
> I'll copy/paste here:
> 
>   Xilinx MPSoC has two Cortex R5 cpus in addition to four Cortex A53 cpus
>   on the board.  It is also possible to add additional Cortex M4 cpus and
>   Microblaze cpus in fabric. There could be dozen independent processors.
>   Users need to exchange data between the heterogeneous cpus. They usually
>   set up their own ring structures over shared memory, or they use
>   OpenAMP.  Either way, they need to share a cacheable memory region
>   between them.  The MPSoC is very flexible and the memory region can come
>   from a multitude of sources, including a portion of normal memory, or a
>   portion of a special memory area on the board. There are a couple of
>   special SRAM banks 64K or 256K large that could be used for that. Also,
>   PRAM can be easily added in fabric and used for the purpose.
> 
> At the very least to handle the special memory regions, we need to be
> able to allow iomem to map them as cacheable memory to a DomU. So I do
> think we need this interface extension.
> 
> Let me know if you still have any doubts/questions. Otherwise I'll work
> toward respinning the series in the proposed direction.

Well, as long as Julien and you agree that such an interface is
needed on Arm, this is fine with me.

Jan



_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

WARNING: multiple messages have this Message-ID (diff)
From: "Jan Beulich" <JBeulich@suse.com>
To: "Stefano Stabellini" <sstabellini@kernel.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
	Julien Grall <julien.grall@arm.com>,
	Stefano Stabellini <stefanos@xilinx.com>,
	xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: [Xen-devel] [PATCH 1/6] xen: extend XEN_DOMCTL_memory_mapping to handle cacheability
Date: Fri, 26 Apr 2019 01:12:14 -0600	[thread overview]
Message-ID: <5CC2AF4E0200007800229537@prv1-mh.provo.novell.com> (raw)
Message-ID: <20190426071214.X-Uq14l8tgqWEeS4v-Gvys3Ysgf7gUMHC0_5gmMgewA@z> (raw)
In-Reply-To: <alpine.DEB.2.10.1904251523070.24598@sstabellini-ThinkPad-X260>

>>> On 26.04.19 at 00:31, <sstabellini@kernel.org> wrote:
> On Thu, 25 Apr 2019, Jan Beulich wrote:
>> But I agree with Julien (in case this wasn't explicit enough from
>> my earlier replay) that it first needs to be clarified whether such
>> an interface is wanted in the first place.
> 
> I have written down a few more details about the use-case elsewhere,
> I'll copy/paste here:
> 
>   Xilinx MPSoC has two Cortex R5 cpus in addition to four Cortex A53 cpus
>   on the board.  It is also possible to add additional Cortex M4 cpus and
>   Microblaze cpus in fabric. There could be dozen independent processors.
>   Users need to exchange data between the heterogeneous cpus. They usually
>   set up their own ring structures over shared memory, or they use
>   OpenAMP.  Either way, they need to share a cacheable memory region
>   between them.  The MPSoC is very flexible and the memory region can come
>   from a multitude of sources, including a portion of normal memory, or a
>   portion of a special memory area on the board. There are a couple of
>   special SRAM banks 64K or 256K large that could be used for that. Also,
>   PRAM can be easily added in fabric and used for the purpose.
> 
> At the very least to handle the special memory regions, we need to be
> able to allow iomem to map them as cacheable memory to a DomU. So I do
> think we need this interface extension.
> 
> Let me know if you still have any doubts/questions. Otherwise I'll work
> toward respinning the series in the proposed direction.

Well, as long as Julien and you agree that such an interface is
needed on Arm, this is fine with me.

Jan



_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

  reply	other threads:[~2019-04-26  7:12 UTC|newest]

Thread overview: 67+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-26 23:06 [PATCH 0/6] iomem cacheability Stefano Stabellini
2019-02-26 23:07 ` [PATCH 1/6] xen: extend XEN_DOMCTL_memory_mapping to handle cacheability Stefano Stabellini
2019-02-26 23:18   ` Julien Grall
2019-04-20  0:02     ` Stefano Stabellini
2019-04-20  0:02       ` [Xen-devel] " Stefano Stabellini
2019-04-21 17:32       ` Julien Grall
2019-04-21 17:32         ` [Xen-devel] " Julien Grall
2019-04-22 21:59         ` Stefano Stabellini
2019-04-22 21:59           ` [Xen-devel] " Stefano Stabellini
2019-04-24 10:42           ` Julien Grall
2019-04-24 10:42             ` [Xen-devel] " Julien Grall
2019-02-27 10:34   ` Jan Beulich
2019-04-17 21:12     ` Stefano Stabellini
2019-04-17 21:12       ` [Xen-devel] " Stefano Stabellini
2019-04-17 21:25       ` Julien Grall
2019-04-17 21:25         ` [Xen-devel] " Julien Grall
2019-04-17 21:55         ` Stefano Stabellini
2019-04-17 21:55           ` [Xen-devel] " Stefano Stabellini
2019-04-25 10:41       ` Jan Beulich
2019-04-25 10:41         ` [Xen-devel] " Jan Beulich
2019-04-25 22:31         ` Stefano Stabellini
2019-04-25 22:31           ` [Xen-devel] " Stefano Stabellini
2019-04-26  7:12           ` Jan Beulich [this message]
2019-04-26  7:12             ` Jan Beulich
2019-02-27 19:28   ` Julien Grall
2019-04-19 23:20     ` Stefano Stabellini
2019-04-19 23:20       ` [Xen-devel] " Stefano Stabellini
2019-04-21 17:14       ` Julien Grall
2019-04-21 17:14         ` [Xen-devel] " Julien Grall
2019-04-22 17:33         ` Stefano Stabellini
2019-04-22 17:33           ` [Xen-devel] " Stefano Stabellini
2019-04-22 17:42           ` Julien Grall
2019-04-22 17:42             ` [Xen-devel] " Julien Grall
2019-02-27 21:02   ` Julien Grall
2019-02-26 23:07 ` [PATCH 2/6] libxc: xc_domain_memory_mapping, " Stefano Stabellini
2019-02-26 23:07 ` [PATCH 3/6] libxl/xl: add cacheability option to iomem Stefano Stabellini
2019-02-27 20:02   ` Julien Grall
2019-04-19 23:13     ` Stefano Stabellini
2019-04-19 23:13       ` [Xen-devel] " Stefano Stabellini
2019-02-26 23:07 ` [PATCH 4/6] xen/arm: keep track of reserved-memory regions Stefano Stabellini
2019-02-28 14:38   ` Julien Grall
2019-02-26 23:07 ` [PATCH 5/6] xen/arm: map reserved-memory regions as normal memory in dom0 Stefano Stabellini
2019-02-26 23:45   ` Julien Grall
2019-04-22 22:42     ` Stefano Stabellini
2019-04-22 22:42       ` [Xen-devel] " Stefano Stabellini
2019-04-23  8:09       ` Julien Grall
2019-04-23  8:09         ` [Xen-devel] " Julien Grall
2019-04-23 17:32         ` Stefano Stabellini
2019-04-23 17:32           ` [Xen-devel] " Stefano Stabellini
2019-04-23 18:37           ` Julien Grall
2019-04-23 18:37             ` [Xen-devel] " Julien Grall
2019-04-23 21:34             ` Stefano Stabellini
2019-04-23 21:34               ` [Xen-devel] " Stefano Stabellini
2019-02-26 23:07 ` [PATCH 6/6] xen/docs: how to map a page between dom0 and domU using iomem Stefano Stabellini
2019-03-03 17:20 ` [PATCH 0/6] iomem cacheability Amit Tomer
2019-03-05 21:22   ` Stefano Stabellini
2019-03-05 22:45     ` Julien Grall
2019-03-06 11:46       ` Amit Tomer
2019-03-06 22:42         ` Stefano Stabellini
2019-03-06 22:59           ` Julien Grall
2019-03-07  8:42             ` Amit Tomer
2019-03-07 10:04               ` Julien Grall
2019-03-07 21:24                 ` Stefano Stabellini
2019-03-08 10:10                   ` Amit Tomer
2019-03-08 16:37                     ` Julien Grall
2019-03-08 17:44                       ` Amit Tomer
2019-03-06 11:30     ` Amit Tomer

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