From: Dan Williams <dan.j.williams@intel.com>
To: Dave Jiang <dave.jiang@intel.com>, <linux-cxl@vger.kernel.org>,
<linux-pci@vger.kernel.org>
Cc: <dan.j.williams@intel.com>, <ira.weiny@intel.com>,
<vishal.l.verma@intel.com>, <alison.schofield@intel.com>,
<Jonathan.Cameron@huawei.com>, <dave@stgolabs.net>,
<bhelgaas@google.com>, <lukas@wunner.de>
Subject: Re: [PATCH v4 2/4] PCI: Add check for CXL Secondary Bus Reset
Date: Tue, 9 Apr 2024 15:56:07 -0700 [thread overview]
Message-ID: <6615c78761bce_24596294cb@dwillia2-mobl3.amr.corp.intel.com.notmuch> (raw)
In-Reply-To: <20240409160256.94184-3-dave.jiang@intel.com>
Dave Jiang wrote:
> Per CXL spec r3.1 8.1.5.2, Secondary Bus Reset (SBR) is masked unless the
> "Unmask SBR" bit is set. Add a check to the PCI secondary bus reset
> path to fail the CXL SBR request if the "Unmask SBR" bit is clear in
> the CXL Port Control Extensions register by returning -ENOTTY.
>
> When the "Unmask SBR" bit is set to 0 (default), the bus_reset would
Feels like a missing "Otherwise," at the beginning of this sentence to
indicate transition from what the patch does to what happens without the
patch.
> appear to have executed successfully. However the operation is actually
> masked. The intention is to inform the user that SBR for the CXL device
> is masked and will not go through.
>
> If the "Unmask SBR" bit is set to 1, then the bus reset will execute
> successfully.
Otherwise, heh heh heh, you can add:
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
...I would say, do not spin the patch just for that small fixup.
next prev parent reply other threads:[~2024-04-09 22:56 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-09 16:01 [PATCH 0/4 v4] PCI: Add Secondary Bus Reset (SBR) support for CXL Dave Jiang
2024-04-09 16:01 ` [PATCH v4 1/4] PCI/cxl: Move PCI CXL vendor Id to a common location from CXL subsystem Dave Jiang
2024-04-09 21:28 ` Kuppuswamy Sathyanarayanan
2024-04-09 22:51 ` Dan Williams
2024-04-09 16:01 ` [PATCH v4 2/4] PCI: Add check for CXL Secondary Bus Reset Dave Jiang
2024-04-09 21:39 ` Kuppuswamy Sathyanarayanan
2024-04-09 21:56 ` Dave Jiang
2024-04-11 2:33 ` Kuppuswamy Sathyanarayanan
2024-04-09 22:56 ` Dan Williams [this message]
2024-04-09 16:01 ` [PATCH v4 3/4] PCI: Create new reset method to force SBR for CXL Dave Jiang
2024-04-26 19:46 ` Dan Williams
2024-04-27 6:19 ` Lukas Wunner
2024-04-27 17:07 ` Dan Williams
2024-04-09 16:01 ` [PATCH v4 4/4] cxl: Add post reset warning if reset results in loss of previously committed HDM decoders Dave Jiang
2024-04-26 20:03 ` Dan Williams
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