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Wed, 17 Mar 2021 14:54:55 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94) (envelope-from ) id 1lMXZT-002ESE-Qu; Wed, 17 Mar 2021 14:54:52 +0000 Date: Wed, 17 Mar 2021 14:54:51 +0000 Message-ID: <878s6lj0ec.wl-maz@kernel.org> From: Marc Zyngier To: Will Deacon Subject: Re: [PATCH 05/10] KVM: arm64: Rework SVE host-save/guest-restore In-Reply-To: <20210317142938.GA5393@willie-the-truck> References: <20210316101312.102925-1-maz@kernel.org> <20210316101312.102925-6-maz@kernel.org> <20210317142938.GA5393@willie-the-truck> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: will@kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, dave.martin@arm.com, daniel.kiss@arm.com, catalin.marinas@arm.com, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, broonie@kernel.org, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Cc: kvm@vger.kernel.org, Catalin Marinas , kvmarm@lists.cs.columbia.edu, broonie@kernel.org, kernel-team@android.com, dave.martin@arm.com, linux-arm-kernel@lists.infradead.org, daniel.kiss@arm.com X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Wed, 17 Mar 2021 14:29:39 +0000, Will Deacon wrote: > > On Tue, Mar 16, 2021 at 10:13:07AM +0000, Marc Zyngier wrote: > > In order to keep the code readable, move the host-save/guest-restore > > sequences in their own functions, with the following changes: > > - the hypervisor ZCR is now set from C code > > - ZCR_EL2 is always used as the EL2 accessor > > > > This results in some minor assembler macro rework. > > No functional change intended. > > > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/include/asm/fpsimdmacros.h | 8 +++-- > > arch/arm64/include/asm/kvm_hyp.h | 2 +- > > arch/arm64/kvm/hyp/fpsimd.S | 2 +- > > arch/arm64/kvm/hyp/include/hyp/switch.h | 41 +++++++++++++++---------- > > 4 files changed, 33 insertions(+), 20 deletions(-) > > [...] > > > diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h > > index fb68271c1a0f..d34dc220a1ce 100644 > > --- a/arch/arm64/kvm/hyp/include/hyp/switch.h > > +++ b/arch/arm64/kvm/hyp/include/hyp/switch.h > > @@ -196,6 +196,25 @@ static inline bool __populate_fault_info(struct kvm_vcpu *vcpu) > > return true; > > } > > > > +static inline void __hyp_sve_save_host(struct kvm_vcpu *vcpu) > > +{ > > + struct thread_struct *thread; > > + > > + thread = container_of(vcpu->arch.host_fpsimd_state, struct thread_struct, > > + uw.fpsimd_state); > > + > > + __sve_save_state(sve_pffr(thread), &vcpu->arch.host_fpsimd_state->fpsr); > > +} > > + > > +static inline void __hyp_sve_restore_guest(struct kvm_vcpu *vcpu) > > +{ > > + if (read_sysreg_s(SYS_ZCR_EL2) != (vcpu_sve_vq(vcpu) - 1)) > > Strictly speaking, we should probably be extracting the LEN field from > ZCR_EL2, otherwise this has the potential to go horribly wrong if any of > the RES0 bits are allocated in future. Good point, the equivalent asm macro has a BIC to that effect. I'll fix that in the next round, as there are similar patterns in a number of places. > Other than that: > > Acked-by: Will Deacon Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6D4BC433E0 for ; Wed, 17 Mar 2021 14:56:39 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2E7BE64F6A for ; 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Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lMXZg-003Nkf-Bk; Wed, 17 Mar 2021 14:55:04 +0000 Received: from mail.kernel.org ([198.145.29.99]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lMXZZ-003Nif-76 for linux-arm-kernel@lists.infradead.org; Wed, 17 Mar 2021 14:54:59 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 35FA864F45; Wed, 17 Mar 2021 14:54:55 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94) (envelope-from ) id 1lMXZT-002ESE-Qu; Wed, 17 Mar 2021 14:54:52 +0000 Date: Wed, 17 Mar 2021 14:54:51 +0000 Message-ID: <878s6lj0ec.wl-maz@kernel.org> From: Marc Zyngier To: Will Deacon Cc: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, dave.martin@arm.com, daniel.kiss@arm.com, Catalin Marinas , James Morse , Julien Thierry , Suzuki K Poulose , broonie@kernel.org, kernel-team@android.com Subject: Re: [PATCH 05/10] KVM: arm64: Rework SVE host-save/guest-restore In-Reply-To: <20210317142938.GA5393@willie-the-truck> References: <20210316101312.102925-1-maz@kernel.org> <20210316101312.102925-6-maz@kernel.org> <20210317142938.GA5393@willie-the-truck> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: will@kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, dave.martin@arm.com, daniel.kiss@arm.com, catalin.marinas@arm.com, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, broonie@kernel.org, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210317_145457_614347_91DCC167 X-CRM114-Status: GOOD ( 26.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 17 Mar 2021 14:29:39 +0000, Will Deacon wrote: > > On Tue, Mar 16, 2021 at 10:13:07AM +0000, Marc Zyngier wrote: > > In order to keep the code readable, move the host-save/guest-restore > > sequences in their own functions, with the following changes: > > - the hypervisor ZCR is now set from C code > > - ZCR_EL2 is always used as the EL2 accessor > > > > This results in some minor assembler macro rework. > > No functional change intended. > > > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/include/asm/fpsimdmacros.h | 8 +++-- > > arch/arm64/include/asm/kvm_hyp.h | 2 +- > > arch/arm64/kvm/hyp/fpsimd.S | 2 +- > > arch/arm64/kvm/hyp/include/hyp/switch.h | 41 +++++++++++++++---------- > > 4 files changed, 33 insertions(+), 20 deletions(-) > > [...] > > > diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h > > index fb68271c1a0f..d34dc220a1ce 100644 > > --- a/arch/arm64/kvm/hyp/include/hyp/switch.h > > +++ b/arch/arm64/kvm/hyp/include/hyp/switch.h > > @@ -196,6 +196,25 @@ static inline bool __populate_fault_info(struct kvm_vcpu *vcpu) > > return true; > > } > > > > +static inline void __hyp_sve_save_host(struct kvm_vcpu *vcpu) > > +{ > > + struct thread_struct *thread; > > + > > + thread = container_of(vcpu->arch.host_fpsimd_state, struct thread_struct, > > + uw.fpsimd_state); > > + > > + __sve_save_state(sve_pffr(thread), &vcpu->arch.host_fpsimd_state->fpsr); > > +} > > + > > +static inline void __hyp_sve_restore_guest(struct kvm_vcpu *vcpu) > > +{ > > + if (read_sysreg_s(SYS_ZCR_EL2) != (vcpu_sve_vq(vcpu) - 1)) > > Strictly speaking, we should probably be extracting the LEN field from > ZCR_EL2, otherwise this has the potential to go horribly wrong if any of > the RES0 bits are allocated in future. Good point, the equivalent asm macro has a BIC to that effect. I'll fix that in the next round, as there are similar patterns in a number of places. > Other than that: > > Acked-by: Will Deacon Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A8F1C433E6 for ; Wed, 17 Mar 2021 16:04:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4A65E64F4D for ; Wed, 17 Mar 2021 16:04:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232165AbhCQQES (ORCPT ); Wed, 17 Mar 2021 12:04:18 -0400 Received: from mail.kernel.org ([198.145.29.99]:37940 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231784AbhCQQDm (ORCPT ); Wed, 17 Mar 2021 12:03:42 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 35FA864F45; Wed, 17 Mar 2021 14:54:55 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94) (envelope-from ) id 1lMXZT-002ESE-Qu; Wed, 17 Mar 2021 14:54:52 +0000 Date: Wed, 17 Mar 2021 14:54:51 +0000 Message-ID: <878s6lj0ec.wl-maz@kernel.org> From: Marc Zyngier To: Will Deacon Cc: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, dave.martin@arm.com, daniel.kiss@arm.com, Catalin Marinas , James Morse , Julien Thierry , Suzuki K Poulose , broonie@kernel.org, kernel-team@android.com Subject: Re: [PATCH 05/10] KVM: arm64: Rework SVE host-save/guest-restore In-Reply-To: <20210317142938.GA5393@willie-the-truck> References: <20210316101312.102925-1-maz@kernel.org> <20210316101312.102925-6-maz@kernel.org> <20210317142938.GA5393@willie-the-truck> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: will@kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, dave.martin@arm.com, daniel.kiss@arm.com, catalin.marinas@arm.com, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, broonie@kernel.org, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Wed, 17 Mar 2021 14:29:39 +0000, Will Deacon wrote: > > On Tue, Mar 16, 2021 at 10:13:07AM +0000, Marc Zyngier wrote: > > In order to keep the code readable, move the host-save/guest-restore > > sequences in their own functions, with the following changes: > > - the hypervisor ZCR is now set from C code > > - ZCR_EL2 is always used as the EL2 accessor > > > > This results in some minor assembler macro rework. > > No functional change intended. > > > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/include/asm/fpsimdmacros.h | 8 +++-- > > arch/arm64/include/asm/kvm_hyp.h | 2 +- > > arch/arm64/kvm/hyp/fpsimd.S | 2 +- > > arch/arm64/kvm/hyp/include/hyp/switch.h | 41 +++++++++++++++---------- > > 4 files changed, 33 insertions(+), 20 deletions(-) > > [...] > > > diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h > > index fb68271c1a0f..d34dc220a1ce 100644 > > --- a/arch/arm64/kvm/hyp/include/hyp/switch.h > > +++ b/arch/arm64/kvm/hyp/include/hyp/switch.h > > @@ -196,6 +196,25 @@ static inline bool __populate_fault_info(struct kvm_vcpu *vcpu) > > return true; > > } > > > > +static inline void __hyp_sve_save_host(struct kvm_vcpu *vcpu) > > +{ > > + struct thread_struct *thread; > > + > > + thread = container_of(vcpu->arch.host_fpsimd_state, struct thread_struct, > > + uw.fpsimd_state); > > + > > + __sve_save_state(sve_pffr(thread), &vcpu->arch.host_fpsimd_state->fpsr); > > +} > > + > > +static inline void __hyp_sve_restore_guest(struct kvm_vcpu *vcpu) > > +{ > > + if (read_sysreg_s(SYS_ZCR_EL2) != (vcpu_sve_vq(vcpu) - 1)) > > Strictly speaking, we should probably be extracting the LEN field from > ZCR_EL2, otherwise this has the potential to go horribly wrong if any of > the RES0 bits are allocated in future. Good point, the equivalent asm macro has a BIC to that effect. I'll fix that in the next round, as there are similar patterns in a number of places. > Other than that: > > Acked-by: Will Deacon Thanks, M. -- Without deviation from the norm, progress is not possible.