* [PATCH 0/6] staging: iio: accel: Fix checkpatch warnings, unify style, improve readability
@ 2016-03-22 15:05 Svetlana Orlik
2016-03-22 15:07 ` [PATCH 1/6] staging: iio: accel: adis16204: Fix 'line over 80 characters' warning Svetlana Orlik
` (5 more replies)
0 siblings, 6 replies; 7+ messages in thread
From: Svetlana Orlik @ 2016-03-22 15:05 UTC (permalink / raw
To: outreachy-kernel
Some of the .h files got many 'line over 80 characters' checkpatch warnings
because of this commenting style:
#define ADIS16201_DIAG_STAT_ALARM2 BIT(9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
#define ADIS16201_DIAG_STAT_ALARM1 BIT(8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
Some other .h files have obviously been already corrected
by moving comment into line before #define, but interlacing
of comment and #defile lines with no space between them made
hard to read code like this:
/* Output, temperature */
#define ADIS16209_TEMP_OUT 0x0A
/* Output, x-axis inclination */
#define ADIS16209_XINCL_OUT 0x0C
/* Output, y-axis inclination */
#define ADIS16209_YINCL_OUT 0x0E
/* Output, +/-180 vertical rotational position */
#define ADIS16209_ROT_OUT 0x10
/* Calibration, x-axis acceleration offset null */
#define ADIS16209_XACCL_NULL 0x12
This patches move comments to line before #define where it is not done yet
(and where it is appropriate).
It helps to get rid of 'line over 80 characters' warnings and to unify code style.
Also, blank line is added after each #define-comment group and each
section title comment to improve readability of code.
Svetlana Orlik (6):
staging: iio: accel: adis16204: Fix 'line over 80 characters' warning
staging: iio: accel: adis16203: Fix 'line over 80 characters' warning
staging: iio: accel: adis16201: Fix 'line over 80 characters' warning
staging: iio: accel: adis16209: Improve readability
staging: iio: accel: adis16220: Improve readability
staging: iio: accel: adis16240: Improve readability
drivers/staging/iio/accel/adis16201.h | 156 ++++++++++++++++++++++++---------
drivers/staging/iio/accel/adis16203.h | 132 +++++++++++++++++++++-------
drivers/staging/iio/accel/adis16204.h | 159 +++++++++++++++++++++++++---------
drivers/staging/iio/accel/adis16209.h | 39 +++++++++
drivers/staging/iio/accel/adis16220.h | 48 ++++++++++
drivers/staging/iio/accel/adis16240.h | 50 +++++++++++
6 files changed, 471 insertions(+), 113 deletions(-)
--
2.5.0
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/6] staging: iio: accel: adis16204: Fix 'line over 80 characters' warning
2016-03-22 15:05 [PATCH 0/6] staging: iio: accel: Fix checkpatch warnings, unify style, improve readability Svetlana Orlik
@ 2016-03-22 15:07 ` Svetlana Orlik
2016-03-22 15:08 ` [PATCH 2/6] staging: iio: accel: adis16203: " Svetlana Orlik
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Svetlana Orlik @ 2016-03-22 15:07 UTC (permalink / raw
To: outreachy-kernel
Many of the comments in the same lines with #define
caused checkpatch warning 'line over 80 characters'.
Move all such comments to line before #define.
This style is already used in some other .h files in accel:
Add blank lines after #define to improve readability.
Signed-off-by: Svetlana Orlik <sveta.orlik.code@gmail.com>
---
drivers/staging/iio/accel/adis16204.h | 159 +++++++++++++++++++++++++---------
1 file changed, 118 insertions(+), 41 deletions(-)
diff --git a/drivers/staging/iio/accel/adis16204.h b/drivers/staging/iio/accel/adis16204.h
index 0b23f0b..cfc4038 100644
--- a/drivers/staging/iio/accel/adis16204.h
+++ b/drivers/staging/iio/accel/adis16204.h
@@ -3,53 +3,130 @@
#define ADIS16204_STARTUP_DELAY 220 /* ms */
-#define ADIS16204_FLASH_CNT 0x00 /* Flash memory write count */
-#define ADIS16204_SUPPLY_OUT 0x02 /* Output, power supply */
-#define ADIS16204_XACCL_OUT 0x04 /* Output, x-axis accelerometer */
-#define ADIS16204_YACCL_OUT 0x06 /* Output, y-axis accelerometer */
-#define ADIS16204_AUX_ADC 0x08 /* Output, auxiliary ADC input */
-#define ADIS16204_TEMP_OUT 0x0A /* Output, temperature */
-#define ADIS16204_X_PEAK_OUT 0x0C /* Twos complement */
-#define ADIS16204_Y_PEAK_OUT 0x0E /* Twos complement */
-#define ADIS16204_XACCL_NULL 0x10 /* Calibration, x-axis acceleration offset null */
-#define ADIS16204_YACCL_NULL 0x12 /* Calibration, y-axis acceleration offset null */
-#define ADIS16204_XACCL_SCALE 0x14 /* X-axis scale factor calibration register */
-#define ADIS16204_YACCL_SCALE 0x16 /* Y-axis scale factor calibration register */
-#define ADIS16204_XY_RSS_OUT 0x18 /* XY combined acceleration (RSS) */
-#define ADIS16204_XY_PEAK_OUT 0x1A /* Peak, XY combined output (RSS) */
-#define ADIS16204_CAP_BUF_1 0x1C /* Capture buffer output register 1 */
-#define ADIS16204_CAP_BUF_2 0x1E /* Capture buffer output register 2 */
-#define ADIS16204_ALM_MAG1 0x20 /* Alarm 1 amplitude threshold */
-#define ADIS16204_ALM_MAG2 0x22 /* Alarm 2 amplitude threshold */
-#define ADIS16204_ALM_CTRL 0x28 /* Alarm control */
-#define ADIS16204_CAPT_PNTR 0x2A /* Capture register address pointer */
-#define ADIS16204_AUX_DAC 0x30 /* Auxiliary DAC data */
-#define ADIS16204_GPIO_CTRL 0x32 /* General-purpose digital input/output control */
-#define ADIS16204_MSC_CTRL 0x34 /* Miscellaneous control */
-#define ADIS16204_SMPL_PRD 0x36 /* Internal sample period (rate) control */
-#define ADIS16204_AVG_CNT 0x38 /* Operation, filter configuration */
-#define ADIS16204_SLP_CNT 0x3A /* Operation, sleep mode control */
-#define ADIS16204_DIAG_STAT 0x3C /* Diagnostics, system status register */
-#define ADIS16204_GLOB_CMD 0x3E /* Operation, system command register */
+/* Flash memory write count */
+#define ADIS16204_FLASH_CNT 0x00
+
+/* Output, power supply */
+#define ADIS16204_SUPPLY_OUT 0x02
+
+/* Output, x-axis accelerometer */
+#define ADIS16204_XACCL_OUT 0x04
+
+/* Output, y-axis accelerometer */
+#define ADIS16204_YACCL_OUT 0x06
+
+/* Output, auxiliary ADC input */
+#define ADIS16204_AUX_ADC 0x08
+
+/* Output, temperature */
+#define ADIS16204_TEMP_OUT 0x0A
+
+/* Twos complement */
+#define ADIS16204_X_PEAK_OUT 0x0C
+#define ADIS16204_Y_PEAK_OUT 0x0E
+
+/* Calibration, x-axis acceleration offset null */
+#define ADIS16204_XACCL_NULL 0x10
+
+/* Calibration, y-axis acceleration offset null */
+#define ADIS16204_YACCL_NULL 0x12
+
+/* X-axis scale factor calibration register */
+#define ADIS16204_XACCL_SCALE 0x14
+
+/* Y-axis scale factor calibration register */
+#define ADIS16204_YACCL_SCALE 0x16
+
+/* XY combined acceleration (RSS) */
+#define ADIS16204_XY_RSS_OUT 0x18
+
+/* Peak, XY combined output (RSS) */
+#define ADIS16204_XY_PEAK_OUT 0x1A
+
+/* Capture buffer output register 1 */
+#define ADIS16204_CAP_BUF_1 0x1C
+
+/* Capture buffer output register 2 */
+#define ADIS16204_CAP_BUF_2 0x1E
+
+/* Alarm 1 amplitude threshold */
+#define ADIS16204_ALM_MAG1 0x20
+
+/* Alarm 2 amplitude threshold */
+#define ADIS16204_ALM_MAG2 0x22
+
+/* Alarm control */
+#define ADIS16204_ALM_CTRL 0x28
+
+/* Capture register address pointer */
+#define ADIS16204_CAPT_PNTR 0x2A
+
+/* Auxiliary DAC data */
+#define ADIS16204_AUX_DAC 0x30
+
+/* General-purpose digital input/output control */
+#define ADIS16204_GPIO_CTRL 0x32
+
+/* Miscellaneous control */
+#define ADIS16204_MSC_CTRL 0x34
+
+/* Internal sample period (rate) control */
+#define ADIS16204_SMPL_PRD 0x36
+
+/* Operation, filter configuration */
+#define ADIS16204_AVG_CNT 0x38
+
+/* Operation, sleep mode control */
+#define ADIS16204_SLP_CNT 0x3A
+
+/* Diagnostics, system status register */
+#define ADIS16204_DIAG_STAT 0x3C
+
+/* Operation, system command register */
+#define ADIS16204_GLOB_CMD 0x3E
/* MSC_CTRL */
-#define ADIS16204_MSC_CTRL_PWRUP_SELF_TEST BIT(10) /* Self-test at power-on: 1 = disabled, 0 = enabled */
-#define ADIS16204_MSC_CTRL_SELF_TEST_EN BIT(8) /* Self-test enable */
-#define ADIS16204_MSC_CTRL_DATA_RDY_EN BIT(2) /* Data-ready enable: 1 = enabled, 0 = disabled */
-#define ADIS16204_MSC_CTRL_ACTIVE_HIGH BIT(1) /* Data-ready polarity: 1 = active high, 0 = active low */
-#define ADIS16204_MSC_CTRL_DATA_RDY_DIO2 BIT(0) /* Data-ready line selection: 1 = DIO2, 0 = DIO1 */
+
+/* Self-test at power-on: 1 = disabled, 0 = enabled */
+#define ADIS16204_MSC_CTRL_PWRUP_SELF_TEST BIT(10)
+
+/* Self-test enable */
+#define ADIS16204_MSC_CTRL_SELF_TEST_EN BIT(8)
+
+/* Data-ready enable: 1 = enabled, 0 = disabled */
+#define ADIS16204_MSC_CTRL_DATA_RDY_EN BIT(2)
+
+/* Data-ready polarity: 1 = active high, 0 = active low */
+#define ADIS16204_MSC_CTRL_ACTIVE_HIGH BIT(1)
+
+/* Data-ready line selection: 1 = DIO2, 0 = DIO1 */
+#define ADIS16204_MSC_CTRL_DATA_RDY_DIO2 BIT(0)
/* DIAG_STAT */
-#define ADIS16204_DIAG_STAT_ALARM2 BIT(9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
-#define ADIS16204_DIAG_STAT_ALARM1 BIT(8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
-#define ADIS16204_DIAG_STAT_SELFTEST_FAIL_BIT 5 /* Self-test diagnostic error flag: 1 = error condition,
- 0 = normal operation */
-#define ADIS16204_DIAG_STAT_SPI_FAIL_BIT 3 /* SPI communications failure */
-#define ADIS16204_DIAG_STAT_FLASH_UPT_BIT 2 /* Flash update failure */
-#define ADIS16204_DIAG_STAT_POWER_HIGH_BIT 1 /* Power supply above 3.625 V */
-#define ADIS16204_DIAG_STAT_POWER_LOW_BIT 0 /* Power supply below 2.975 V */
+
+/* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
+#define ADIS16204_DIAG_STAT_ALARM2 BIT(9)
+
+/* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
+#define ADIS16204_DIAG_STAT_ALARM1 BIT(8)
+
+/* Self-test diagnostic error flag: 1 = error condition, 0 = normal operation */
+#define ADIS16204_DIAG_STAT_SELFTEST_FAIL_BIT 5
+
+/* SPI communications failure */
+#define ADIS16204_DIAG_STAT_SPI_FAIL_BIT 3
+
+/* Flash update failure */
+#define ADIS16204_DIAG_STAT_FLASH_UPT_BIT 2
+
+/* Power supply above 3.625 V */
+#define ADIS16204_DIAG_STAT_POWER_HIGH_BIT 1
+
+/* Power supply below 2.975 V */
+#define ADIS16204_DIAG_STAT_POWER_LOW_BIT 0
/* GLOB_CMD */
+
#define ADIS16204_GLOB_CMD_SW_RESET BIT(7)
#define ADIS16204_GLOB_CMD_CLEAR_STAT BIT(4)
#define ADIS16204_GLOB_CMD_FACTORY_CAL BIT(1)
--
2.5.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/6] staging: iio: accel: adis16203: Fix 'line over 80 characters' warning
2016-03-22 15:05 [PATCH 0/6] staging: iio: accel: Fix checkpatch warnings, unify style, improve readability Svetlana Orlik
2016-03-22 15:07 ` [PATCH 1/6] staging: iio: accel: adis16204: Fix 'line over 80 characters' warning Svetlana Orlik
@ 2016-03-22 15:08 ` Svetlana Orlik
2016-03-22 15:08 ` [PATCH 3/6] staging: iio: accel: adis16201: " Svetlana Orlik
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Svetlana Orlik @ 2016-03-22 15:08 UTC (permalink / raw
To: outreachy-kernel
Many of the comments in the same lines with #define
caused checkpatch warning 'line over 80 characters'.
Move all such comments to line before #define.
This style is already used in some other .h files in accel:
Add blank lines after #define to improve readability.
Signed-off-by: Svetlana Orlik <sveta.orlik.code@gmail.com>
---
drivers/staging/iio/accel/adis16203.h | 132 +++++++++++++++++++++++++---------
1 file changed, 99 insertions(+), 33 deletions(-)
diff --git a/drivers/staging/iio/accel/adis16203.h b/drivers/staging/iio/accel/adis16203.h
index 6426e38..b483e4e 100644
--- a/drivers/staging/iio/accel/adis16203.h
+++ b/drivers/staging/iio/accel/adis16203.h
@@ -3,45 +3,111 @@
#define ADIS16203_STARTUP_DELAY 220 /* ms */
-#define ADIS16203_FLASH_CNT 0x00 /* Flash memory write count */
-#define ADIS16203_SUPPLY_OUT 0x02 /* Output, power supply */
-#define ADIS16203_AUX_ADC 0x08 /* Output, auxiliary ADC input */
-#define ADIS16203_TEMP_OUT 0x0A /* Output, temperature */
-#define ADIS16203_XINCL_OUT 0x0C /* Output, x-axis inclination */
-#define ADIS16203_YINCL_OUT 0x0E /* Output, y-axis inclination */
-#define ADIS16203_INCL_NULL 0x18 /* Incline null calibration */
-#define ADIS16203_ALM_MAG1 0x20 /* Alarm 1 amplitude threshold */
-#define ADIS16203_ALM_MAG2 0x22 /* Alarm 2 amplitude threshold */
-#define ADIS16203_ALM_SMPL1 0x24 /* Alarm 1, sample period */
-#define ADIS16203_ALM_SMPL2 0x26 /* Alarm 2, sample period */
-#define ADIS16203_ALM_CTRL 0x28 /* Alarm control */
-#define ADIS16203_AUX_DAC 0x30 /* Auxiliary DAC data */
-#define ADIS16203_GPIO_CTRL 0x32 /* General-purpose digital input/output control */
-#define ADIS16203_MSC_CTRL 0x34 /* Miscellaneous control */
-#define ADIS16203_SMPL_PRD 0x36 /* Internal sample period (rate) control */
-#define ADIS16203_AVG_CNT 0x38 /* Operation, filter configuration */
-#define ADIS16203_SLP_CNT 0x3A /* Operation, sleep mode control */
-#define ADIS16203_DIAG_STAT 0x3C /* Diagnostics, system status register */
-#define ADIS16203_GLOB_CMD 0x3E /* Operation, system command register */
+/* Flash memory write count */
+#define ADIS16203_FLASH_CNT 0x00
+
+/* Output, power supply */
+#define ADIS16203_SUPPLY_OUT 0x02
+
+/* Output, auxiliary ADC input */
+#define ADIS16203_AUX_ADC 0x08
+
+/* Output, temperature */
+#define ADIS16203_TEMP_OUT 0x0A
+
+/* Output, x-axis inclination */
+#define ADIS16203_XINCL_OUT 0x0C
+
+/* Output, y-axis inclination */
+#define ADIS16203_YINCL_OUT 0x0E
+
+/* Incline null calibration */
+#define ADIS16203_INCL_NULL 0x18
+
+/* Alarm 1 amplitude threshold */
+#define ADIS16203_ALM_MAG1 0x20
+
+/* Alarm 2 amplitude threshold */
+#define ADIS16203_ALM_MAG2 0x22
+
+/* Alarm 1, sample period */
+#define ADIS16203_ALM_SMPL1 0x24
+
+/* Alarm 2, sample period */
+#define ADIS16203_ALM_SMPL2 0x26
+
+/* Alarm control */
+#define ADIS16203_ALM_CTRL 0x28
+
+/* Auxiliary DAC data */
+#define ADIS16203_AUX_DAC 0x30
+
+/* General-purpose digital input/output control */
+#define ADIS16203_GPIO_CTRL 0x32
+
+/* Miscellaneous control */
+#define ADIS16203_MSC_CTRL 0x34
+
+/* Internal sample period (rate) control */
+#define ADIS16203_SMPL_PRD 0x36
+
+/* Operation, filter configuration */
+#define ADIS16203_AVG_CNT 0x38
+
+/* Operation, sleep mode control */
+#define ADIS16203_SLP_CNT 0x3A
+
+/* Diagnostics, system status register */
+#define ADIS16203_DIAG_STAT 0x3C
+
+/* Operation, system command register */
+#define ADIS16203_GLOB_CMD 0x3E
/* MSC_CTRL */
-#define ADIS16203_MSC_CTRL_PWRUP_SELF_TEST BIT(10) /* Self-test at power-on: 1 = disabled, 0 = enabled */
-#define ADIS16203_MSC_CTRL_REVERSE_ROT_EN BIT(9) /* Reverses rotation of both inclination outputs */
-#define ADIS16203_MSC_CTRL_SELF_TEST_EN BIT(8) /* Self-test enable */
-#define ADIS16203_MSC_CTRL_DATA_RDY_EN BIT(2) /* Data-ready enable: 1 = enabled, 0 = disabled */
-#define ADIS16203_MSC_CTRL_ACTIVE_HIGH BIT(1) /* Data-ready polarity: 1 = active high, 0 = active low */
-#define ADIS16203_MSC_CTRL_DATA_RDY_DIO1 BIT(0) /* Data-ready line selection: 1 = DIO1, 0 = DIO0 */
+
+/* Self-test at power-on: 1 = disabled, 0 = enabled */
+#define ADIS16203_MSC_CTRL_PWRUP_SELF_TEST BIT(10)
+
+/* Reverses rotation of both inclination outputs */
+#define ADIS16203_MSC_CTRL_REVERSE_ROT_EN BIT(9)
+
+/* Self-test enable */
+#define ADIS16203_MSC_CTRL_SELF_TEST_EN BIT(8)
+
+/* Data-ready enable: 1 = enabled, 0 = disabled */
+#define ADIS16203_MSC_CTRL_DATA_RDY_EN BIT(2)
+
+/* Data-ready polarity: 1 = active high, 0 = active low */
+#define ADIS16203_MSC_CTRL_ACTIVE_HIGH BIT(1)
+
+/* Data-ready line selection: 1 = DIO1, 0 = DIO0 */
+#define ADIS16203_MSC_CTRL_DATA_RDY_DIO1 BIT(0)
/* DIAG_STAT */
-#define ADIS16203_DIAG_STAT_ALARM2 BIT(9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
-#define ADIS16203_DIAG_STAT_ALARM1 BIT(8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
-#define ADIS16203_DIAG_STAT_SELFTEST_FAIL_BIT 5 /* Self-test diagnostic error flag */
-#define ADIS16203_DIAG_STAT_SPI_FAIL_BIT 3 /* SPI communications failure */
-#define ADIS16203_DIAG_STAT_FLASH_UPT_BIT 2 /* Flash update failure */
-#define ADIS16203_DIAG_STAT_POWER_HIGH_BIT 1 /* Power supply above 3.625 V */
-#define ADIS16203_DIAG_STAT_POWER_LOW_BIT 0 /* Power supply below 3.15 V */
+
+/* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
+#define ADIS16203_DIAG_STAT_ALARM2 BIT(9)
+
+/* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
+#define ADIS16203_DIAG_STAT_ALARM1 BIT(8)
+
+/* Self-test diagnostic error flag */
+#define ADIS16203_DIAG_STAT_SELFTEST_FAIL_BIT 5
+
+/* SPI communications failure */
+#define ADIS16203_DIAG_STAT_SPI_FAIL_BIT 3
+
+/* Flash update failure */
+#define ADIS16203_DIAG_STAT_FLASH_UPT_BIT 2
+
+/* Power supply above 3.625 V */
+#define ADIS16203_DIAG_STAT_POWER_HIGH_BIT 1
+
+/* Power supply below 3.15 V */
+#define ADIS16203_DIAG_STAT_POWER_LOW_BIT 0
/* GLOB_CMD */
+
#define ADIS16203_GLOB_CMD_SW_RESET BIT(7)
#define ADIS16203_GLOB_CMD_CLEAR_STAT BIT(4)
#define ADIS16203_GLOB_CMD_FACTORY_CAL BIT(1)
--
2.5.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/6] staging: iio: accel: adis16201: Fix 'line over 80 characters' warning
2016-03-22 15:05 [PATCH 0/6] staging: iio: accel: Fix checkpatch warnings, unify style, improve readability Svetlana Orlik
2016-03-22 15:07 ` [PATCH 1/6] staging: iio: accel: adis16204: Fix 'line over 80 characters' warning Svetlana Orlik
2016-03-22 15:08 ` [PATCH 2/6] staging: iio: accel: adis16203: " Svetlana Orlik
@ 2016-03-22 15:08 ` Svetlana Orlik
2016-03-22 15:09 ` [PATCH 4/6] staging: iio: accel: adis16209: Improve readability Svetlana Orlik
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Svetlana Orlik @ 2016-03-22 15:08 UTC (permalink / raw
To: outreachy-kernel
Many of the comments in the same lines with #define
caused checkpatch warning 'line over 80 characters'.
Move all such comments to line before #define.
This style is already used in some other .h files in accel:
Add blank lines after #define to improve readability.
Signed-off-by: Svetlana Orlik <sveta.orlik.code@gmail.com>
---
drivers/staging/iio/accel/adis16201.h | 156 +++++++++++++++++++++++++---------
1 file changed, 117 insertions(+), 39 deletions(-)
diff --git a/drivers/staging/iio/accel/adis16201.h b/drivers/staging/iio/accel/adis16201.h
index e6b8c9a..64844ad 100644
--- a/drivers/staging/iio/accel/adis16201.h
+++ b/drivers/staging/iio/accel/adis16201.h
@@ -3,51 +3,129 @@
#define ADIS16201_STARTUP_DELAY 220 /* ms */
-#define ADIS16201_FLASH_CNT 0x00 /* Flash memory write count */
-#define ADIS16201_SUPPLY_OUT 0x02 /* Output, power supply */
-#define ADIS16201_XACCL_OUT 0x04 /* Output, x-axis accelerometer */
-#define ADIS16201_YACCL_OUT 0x06 /* Output, y-axis accelerometer */
-#define ADIS16201_AUX_ADC 0x08 /* Output, auxiliary ADC input */
-#define ADIS16201_TEMP_OUT 0x0A /* Output, temperature */
-#define ADIS16201_XINCL_OUT 0x0C /* Output, x-axis inclination */
-#define ADIS16201_YINCL_OUT 0x0E /* Output, y-axis inclination */
-#define ADIS16201_XACCL_OFFS 0x10 /* Calibration, x-axis acceleration offset */
-#define ADIS16201_YACCL_OFFS 0x12 /* Calibration, y-axis acceleration offset */
-#define ADIS16201_XACCL_SCALE 0x14 /* x-axis acceleration scale factor */
-#define ADIS16201_YACCL_SCALE 0x16 /* y-axis acceleration scale factor */
-#define ADIS16201_XINCL_OFFS 0x18 /* Calibration, x-axis inclination offset */
-#define ADIS16201_YINCL_OFFS 0x1A /* Calibration, y-axis inclination offset */
-#define ADIS16201_XINCL_SCALE 0x1C /* x-axis inclination scale factor */
-#define ADIS16201_YINCL_SCALE 0x1E /* y-axis inclination scale factor */
-#define ADIS16201_ALM_MAG1 0x20 /* Alarm 1 amplitude threshold */
-#define ADIS16201_ALM_MAG2 0x22 /* Alarm 2 amplitude threshold */
-#define ADIS16201_ALM_SMPL1 0x24 /* Alarm 1, sample period */
-#define ADIS16201_ALM_SMPL2 0x26 /* Alarm 2, sample period */
-#define ADIS16201_ALM_CTRL 0x28 /* Alarm control */
-#define ADIS16201_AUX_DAC 0x30 /* Auxiliary DAC data */
-#define ADIS16201_GPIO_CTRL 0x32 /* General-purpose digital input/output control */
-#define ADIS16201_MSC_CTRL 0x34 /* Miscellaneous control */
-#define ADIS16201_SMPL_PRD 0x36 /* Internal sample period (rate) control */
-#define ADIS16201_AVG_CNT 0x38 /* Operation, filter configuration */
-#define ADIS16201_SLP_CNT 0x3A /* Operation, sleep mode control */
-#define ADIS16201_DIAG_STAT 0x3C /* Diagnostics, system status register */
-#define ADIS16201_GLOB_CMD 0x3E /* Operation, system command register */
+/* Flash memory write count */
+#define ADIS16201_FLASH_CNT 0x00
+
+/* Output, power supply */
+#define ADIS16201_SUPPLY_OUT 0x02
+
+/* Output, x-axis accelerometer */
+#define ADIS16201_XACCL_OUT 0x04
+
+/* Output, y-axis accelerometer */
+#define ADIS16201_YACCL_OUT 0x06
+
+/* Output, auxiliary ADC input */
+#define ADIS16201_AUX_ADC 0x08
+
+/* Output, temperature */
+#define ADIS16201_TEMP_OUT 0x0A
+
+/* Output, x-axis inclination */
+#define ADIS16201_XINCL_OUT 0x0C
+
+/* Output, y-axis inclination */
+#define ADIS16201_YINCL_OUT 0x0E
+
+/* Calibration, x-axis acceleration offset */
+#define ADIS16201_XACCL_OFFS 0x10
+
+/* Calibration, y-axis acceleration offset */
+#define ADIS16201_YACCL_OFFS 0x12
+
+/* x-axis acceleration scale factor */
+#define ADIS16201_XACCL_SCALE 0x14
+
+/* y-axis acceleration scale factor */
+#define ADIS16201_YACCL_SCALE 0x16
+
+/* Calibration, x-axis inclination offset */
+#define ADIS16201_XINCL_OFFS 0x18
+
+/* Calibration, y-axis inclination offset */
+#define ADIS16201_YINCL_OFFS 0x1A
+
+/* x-axis inclination scale factor */
+#define ADIS16201_XINCL_SCALE 0x1C
+
+/* y-axis inclination scale factor */
+#define ADIS16201_YINCL_SCALE 0x1E
+
+/* Alarm 1 amplitude threshold */
+#define ADIS16201_ALM_MAG1 0x20
+
+/* Alarm 2 amplitude threshold */
+#define ADIS16201_ALM_MAG2 0x22
+
+/* Alarm 1, sample period */
+#define ADIS16201_ALM_SMPL1 0x24
+
+/* Alarm 2, sample period */
+#define ADIS16201_ALM_SMPL2 0x26
+
+/* Alarm control */
+#define ADIS16201_ALM_CTRL 0x28
+
+/* Auxiliary DAC data */
+#define ADIS16201_AUX_DAC 0x30
+
+/* General-purpose digital input/output control */
+#define ADIS16201_GPIO_CTRL 0x32
+
+/* Miscellaneous control */
+#define ADIS16201_MSC_CTRL 0x34
+
+/* Internal sample period (rate) control */
+#define ADIS16201_SMPL_PRD 0x36
+
+/* Operation, filter configuration */
+#define ADIS16201_AVG_CNT 0x38
+
+/* Operation, sleep mode control */
+#define ADIS16201_SLP_CNT 0x3A
+
+/* Diagnostics, system status register */
+#define ADIS16201_DIAG_STAT 0x3C
+
+/* Operation, system command register */
+#define ADIS16201_GLOB_CMD 0x3E
/* MSC_CTRL */
-#define ADIS16201_MSC_CTRL_SELF_TEST_EN BIT(8) /* Self-test enable */
-#define ADIS16201_MSC_CTRL_DATA_RDY_EN BIT(2) /* Data-ready enable: 1 = enabled, 0 = disabled */
-#define ADIS16201_MSC_CTRL_ACTIVE_HIGH BIT(1) /* Data-ready polarity: 1 = active high, 0 = active low */
-#define ADIS16201_MSC_CTRL_DATA_RDY_DIO1 BIT(0) /* Data-ready line selection: 1 = DIO1, 0 = DIO0 */
+
+/* Self-test enable */
+#define ADIS16201_MSC_CTRL_SELF_TEST_EN BIT(8)
+
+/* Data-ready enable: 1 = enabled, 0 = disabled */
+#define ADIS16201_MSC_CTRL_DATA_RDY_EN BIT(2)
+
+/* Data-ready polarity: 1 = active high, 0 = active low */
+#define ADIS16201_MSC_CTRL_ACTIVE_HIGH BIT(1)
+
+/* Data-ready line selection: 1 = DIO1, 0 = DIO0 */
+#define ADIS16201_MSC_CTRL_DATA_RDY_DIO1 BIT(0)
/* DIAG_STAT */
-#define ADIS16201_DIAG_STAT_ALARM2 BIT(9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
-#define ADIS16201_DIAG_STAT_ALARM1 BIT(8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
-#define ADIS16201_DIAG_STAT_SPI_FAIL_BIT 3 /* SPI communications failure */
-#define ADIS16201_DIAG_STAT_FLASH_UPT_BIT 2 /* Flash update failure */
-#define ADIS16201_DIAG_STAT_POWER_HIGH_BIT 1 /* Power supply above 3.625 V */
-#define ADIS16201_DIAG_STAT_POWER_LOW_BIT 0 /* Power supply below 3.15 V */
+
+/* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
+#define ADIS16201_DIAG_STAT_ALARM2 BIT(9)
+
+/* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
+#define ADIS16201_DIAG_STAT_ALARM1 BIT(8)
+
+/* SPI communications failure */
+#define ADIS16201_DIAG_STAT_SPI_FAIL_BIT 3
+
+/* Flash update failure */
+#define ADIS16201_DIAG_STAT_FLASH_UPT_BIT 2
+
+/* Power supply above 3.625 V */
+#define ADIS16201_DIAG_STAT_POWER_HIGH_BIT 1
+
+/* Power supply below 3.15 V */
+#define ADIS16201_DIAG_STAT_POWER_LOW_BIT 0
/* GLOB_CMD */
+
#define ADIS16201_GLOB_CMD_SW_RESET BIT(7)
#define ADIS16201_GLOB_CMD_FACTORY_CAL BIT(1)
--
2.5.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 4/6] staging: iio: accel: adis16209: Improve readability
2016-03-22 15:05 [PATCH 0/6] staging: iio: accel: Fix checkpatch warnings, unify style, improve readability Svetlana Orlik
` (2 preceding siblings ...)
2016-03-22 15:08 ` [PATCH 3/6] staging: iio: accel: adis16201: " Svetlana Orlik
@ 2016-03-22 15:09 ` Svetlana Orlik
2016-03-22 15:09 ` [PATCH 5/6] staging: iio: accel: adis16220: " Svetlana Orlik
2016-03-22 15:10 ` [PATCH 6/6] staging: iio: accel: adis16240: " Svetlana Orlik
5 siblings, 0 replies; 7+ messages in thread
From: Svetlana Orlik @ 2016-03-22 15:09 UTC (permalink / raw
To: outreachy-kernel
Lines with #define interlaced with comment lines making a mess.
Separate groups of #define-comment with blank lines.
Separate section title comments with blank lines.
Signed-off-by: Svetlana Orlik <sveta.orlik.code@gmail.com>
---
drivers/staging/iio/accel/adis16209.h | 39 +++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/drivers/staging/iio/accel/adis16209.h b/drivers/staging/iio/accel/adis16209.h
index 813698d..315f1c0 100644
--- a/drivers/staging/iio/accel/adis16209.h
+++ b/drivers/staging/iio/accel/adis16209.h
@@ -5,88 +5,127 @@
/* Flash memory write count */
#define ADIS16209_FLASH_CNT 0x00
+
/* Output, power supply */
#define ADIS16209_SUPPLY_OUT 0x02
+
/* Output, x-axis accelerometer */
#define ADIS16209_XACCL_OUT 0x04
+
/* Output, y-axis accelerometer */
#define ADIS16209_YACCL_OUT 0x06
+
/* Output, auxiliary ADC input */
#define ADIS16209_AUX_ADC 0x08
+
/* Output, temperature */
#define ADIS16209_TEMP_OUT 0x0A
+
/* Output, x-axis inclination */
#define ADIS16209_XINCL_OUT 0x0C
+
/* Output, y-axis inclination */
#define ADIS16209_YINCL_OUT 0x0E
+
/* Output, +/-180 vertical rotational position */
#define ADIS16209_ROT_OUT 0x10
+
/* Calibration, x-axis acceleration offset null */
#define ADIS16209_XACCL_NULL 0x12
+
/* Calibration, y-axis acceleration offset null */
#define ADIS16209_YACCL_NULL 0x14
+
/* Calibration, x-axis inclination offset null */
#define ADIS16209_XINCL_NULL 0x16
+
/* Calibration, y-axis inclination offset null */
#define ADIS16209_YINCL_NULL 0x18
+
/* Calibration, vertical rotation offset null */
#define ADIS16209_ROT_NULL 0x1A
+
/* Alarm 1 amplitude threshold */
#define ADIS16209_ALM_MAG1 0x20
+
/* Alarm 2 amplitude threshold */
#define ADIS16209_ALM_MAG2 0x22
+
/* Alarm 1, sample period */
#define ADIS16209_ALM_SMPL1 0x24
+
/* Alarm 2, sample period */
#define ADIS16209_ALM_SMPL2 0x26
+
/* Alarm control */
#define ADIS16209_ALM_CTRL 0x28
+
/* Auxiliary DAC data */
#define ADIS16209_AUX_DAC 0x30
+
/* General-purpose digital input/output control */
#define ADIS16209_GPIO_CTRL 0x32
+
/* Miscellaneous control */
#define ADIS16209_MSC_CTRL 0x34
+
/* Internal sample period (rate) control */
#define ADIS16209_SMPL_PRD 0x36
+
/* Operation, filter configuration */
#define ADIS16209_AVG_CNT 0x38
+
/* Operation, sleep mode control */
#define ADIS16209_SLP_CNT 0x3A
+
/* Diagnostics, system status register */
#define ADIS16209_DIAG_STAT 0x3C
+
/* Operation, system command register */
#define ADIS16209_GLOB_CMD 0x3E
/* MSC_CTRL */
+
/* Self-test at power-on: 1 = disabled, 0 = enabled */
#define ADIS16209_MSC_CTRL_PWRUP_SELF_TEST BIT(10)
+
/* Self-test enable */
#define ADIS16209_MSC_CTRL_SELF_TEST_EN BIT(8)
+
/* Data-ready enable: 1 = enabled, 0 = disabled */
#define ADIS16209_MSC_CTRL_DATA_RDY_EN BIT(2)
+
/* Data-ready polarity: 1 = active high, 0 = active low */
#define ADIS16209_MSC_CTRL_ACTIVE_HIGH BIT(1)
+
/* Data-ready line selection: 1 = DIO2, 0 = DIO1 */
#define ADIS16209_MSC_CTRL_DATA_RDY_DIO2 BIT(0)
/* DIAG_STAT */
+
/* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
#define ADIS16209_DIAG_STAT_ALARM2 BIT(9)
+
/* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
#define ADIS16209_DIAG_STAT_ALARM1 BIT(8)
+
/* Self-test diagnostic error flag: 1 = error condition, 0 = normal operation */
#define ADIS16209_DIAG_STAT_SELFTEST_FAIL_BIT 5
+
/* SPI communications failure */
#define ADIS16209_DIAG_STAT_SPI_FAIL_BIT 3
+
/* Flash update failure */
#define ADIS16209_DIAG_STAT_FLASH_UPT_BIT 2
+
/* Power supply above 3.625 V */
#define ADIS16209_DIAG_STAT_POWER_HIGH_BIT 1
+
/* Power supply below 3.15 V */
#define ADIS16209_DIAG_STAT_POWER_LOW_BIT 0
/* GLOB_CMD */
+
#define ADIS16209_GLOB_CMD_SW_RESET BIT(7)
#define ADIS16209_GLOB_CMD_CLEAR_STAT BIT(4)
#define ADIS16209_GLOB_CMD_FACTORY_CAL BIT(1)
--
2.5.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 5/6] staging: iio: accel: adis16220: Improve readability
2016-03-22 15:05 [PATCH 0/6] staging: iio: accel: Fix checkpatch warnings, unify style, improve readability Svetlana Orlik
` (3 preceding siblings ...)
2016-03-22 15:09 ` [PATCH 4/6] staging: iio: accel: adis16209: Improve readability Svetlana Orlik
@ 2016-03-22 15:09 ` Svetlana Orlik
2016-03-22 15:10 ` [PATCH 6/6] staging: iio: accel: adis16240: " Svetlana Orlik
5 siblings, 0 replies; 7+ messages in thread
From: Svetlana Orlik @ 2016-03-22 15:09 UTC (permalink / raw
To: outreachy-kernel
Lines with #define interlaced with comment lines making a mess.
Separate groups of #define-comment with blank lines.
Separate section title comments with blank lines.
Signed-off-by: Svetlana Orlik <sveta.orlik.code@gmail.com>
---
drivers/staging/iio/accel/adis16220.h | 48 +++++++++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/drivers/staging/iio/accel/adis16220.h b/drivers/staging/iio/accel/adis16220.h
index eab8633..31a1268 100644
--- a/drivers/staging/iio/accel/adis16220.h
+++ b/drivers/staging/iio/accel/adis16220.h
@@ -7,111 +7,159 @@
/* Flash memory write count */
#define ADIS16220_FLASH_CNT 0x00
+
/* Control, acceleration offset adjustment control */
#define ADIS16220_ACCL_NULL 0x02
+
/* Control, AIN1 offset adjustment control */
#define ADIS16220_AIN1_NULL 0x04
+
/* Control, AIN2 offset adjustment control */
#define ADIS16220_AIN2_NULL 0x06
+
/* Output, power supply during capture */
#define ADIS16220_CAPT_SUPPLY 0x0A
+
/* Output, temperature during capture */
#define ADIS16220_CAPT_TEMP 0x0C
+
/* Output, peak acceleration during capture */
#define ADIS16220_CAPT_PEAKA 0x0E
+
/* Output, peak AIN1 level during capture */
#define ADIS16220_CAPT_PEAK1 0x10
+
/* Output, peak AIN2 level during capture */
#define ADIS16220_CAPT_PEAK2 0x12
+
/* Output, capture buffer for acceleration */
#define ADIS16220_CAPT_BUFA 0x14
+
/* Output, capture buffer for AIN1 */
#define ADIS16220_CAPT_BUF1 0x16
+
/* Output, capture buffer for AIN2 */
#define ADIS16220_CAPT_BUF2 0x18
+
/* Control, capture buffer address pointer */
#define ADIS16220_CAPT_PNTR 0x1A
+
/* Control, capture control register */
#define ADIS16220_CAPT_CTRL 0x1C
+
/* Control, capture period (automatic mode) */
#define ADIS16220_CAPT_PRD 0x1E
+
/* Control, Alarm A, acceleration peak threshold */
#define ADIS16220_ALM_MAGA 0x20
+
/* Control, Alarm 1, AIN1 peak threshold */
#define ADIS16220_ALM_MAG1 0x22
+
/* Control, Alarm 2, AIN2 peak threshold */
#define ADIS16220_ALM_MAG2 0x24
+
/* Control, Alarm S, peak threshold */
#define ADIS16220_ALM_MAGS 0x26
+
/* Control, alarm configuration register */
#define ADIS16220_ALM_CTRL 0x28
+
/* Control, general I/O configuration */
#define ADIS16220_GPIO_CTRL 0x32
+
/* Control, self-test control, AIN configuration */
#define ADIS16220_MSC_CTRL 0x34
+
/* Control, digital I/O configuration */
#define ADIS16220_DIO_CTRL 0x36
+
/* Control, filter configuration */
#define ADIS16220_AVG_CNT 0x38
+
/* Status, system status */
#define ADIS16220_DIAG_STAT 0x3C
+
/* Control, system commands */
#define ADIS16220_GLOB_CMD 0x3E
+
/* Status, self-test response */
#define ADIS16220_ST_DELTA 0x40
+
/* Lot Identification Code 1 */
#define ADIS16220_LOT_ID1 0x52
+
/* Lot Identification Code 2 */
#define ADIS16220_LOT_ID2 0x54
+
/* Product identifier; convert to decimal = 16220 */
#define ADIS16220_PROD_ID 0x56
+
/* Serial number */
#define ADIS16220_SERIAL_NUM 0x58
#define ADIS16220_CAPTURE_SIZE 2048
/* MSC_CTRL */
+
#define ADIS16220_MSC_CTRL_SELF_TEST_EN BIT(8)
#define ADIS16220_MSC_CTRL_POWER_SUP_COM_AIN1 BIT(1)
#define ADIS16220_MSC_CTRL_POWER_SUP_COM_AIN2 BIT(0)
/* DIO_CTRL */
+
#define ADIS16220_MSC_CTRL_DIO2_BUSY_IND (BIT(5) | BIT(4))
#define ADIS16220_MSC_CTRL_DIO1_BUSY_IND (BIT(3) | BIT(2))
#define ADIS16220_MSC_CTRL_DIO2_ACT_HIGH BIT(1)
#define ADIS16220_MSC_CTRL_DIO1_ACT_HIGH BIT(0)
/* DIAG_STAT */
+
/* AIN2 sample > ALM_MAG2 */
#define ADIS16220_DIAG_STAT_ALM_MAG2 BIT(14)
+
/* AIN1 sample > ALM_MAG1 */
#define ADIS16220_DIAG_STAT_ALM_MAG1 BIT(13)
+
/* Acceleration sample > ALM_MAGA */
#define ADIS16220_DIAG_STAT_ALM_MAGA BIT(12)
+
/* Error condition programmed into ALM_MAGS[11:0] and ALM_CTRL[5:4] is true */
#define ADIS16220_DIAG_STAT_ALM_MAGS BIT(11)
+
/* |Peak value in AIN2 data capture| > ALM_MAG2 */
#define ADIS16220_DIAG_STAT_PEAK_AIN2 BIT(10)
+
/* |Peak value in AIN1 data capture| > ALM_MAG1 */
#define ADIS16220_DIAG_STAT_PEAK_AIN1 BIT(9)
+
/* |Peak value in acceleration data capture| > ALM_MAGA */
#define ADIS16220_DIAG_STAT_PEAK_ACCEL BIT(8)
+
/* Data ready, capture complete */
#define ADIS16220_DIAG_STAT_DATA_RDY BIT(7)
+
#define ADIS16220_DIAG_STAT_FLASH_CHK BIT(6)
+
#define ADIS16220_DIAG_STAT_SELF_TEST BIT(5)
+
/* Capture period violation/interruption */
#define ADIS16220_DIAG_STAT_VIOLATION_BIT 4
+
/* SPI communications failure */
#define ADIS16220_DIAG_STAT_SPI_FAIL_BIT 3
+
/* Flash update failure */
#define ADIS16220_DIAG_STAT_FLASH_UPT_BIT 2
+
/* Power supply above 3.625 V */
#define ADIS16220_DIAG_STAT_POWER_HIGH_BIT 1
+
/* Power supply below 3.15 V */
#define ADIS16220_DIAG_STAT_POWER_LOW_BIT 0
/* GLOB_CMD */
+
#define ADIS16220_GLOB_CMD_SW_RESET BIT(7)
#define ADIS16220_GLOB_CMD_SELF_TEST BIT(2)
#define ADIS16220_GLOB_CMD_PWR_DOWN BIT(1)
--
2.5.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 6/6] staging: iio: accel: adis16240: Improve readability
2016-03-22 15:05 [PATCH 0/6] staging: iio: accel: Fix checkpatch warnings, unify style, improve readability Svetlana Orlik
` (4 preceding siblings ...)
2016-03-22 15:09 ` [PATCH 5/6] staging: iio: accel: adis16220: " Svetlana Orlik
@ 2016-03-22 15:10 ` Svetlana Orlik
5 siblings, 0 replies; 7+ messages in thread
From: Svetlana Orlik @ 2016-03-22 15:10 UTC (permalink / raw
To: outreachy-kernel
Lines with #define interlaced with comment lines making a mess.
Separate groups of #define-comment with blank lines.
Separate section title comments with blank lines.
Signed-off-by: Svetlana Orlik <sveta.orlik.code@gmail.com>
---
drivers/staging/iio/accel/adis16240.h | 50 +++++++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/drivers/staging/iio/accel/adis16240.h b/drivers/staging/iio/accel/adis16240.h
index 66b5ad2..b2cb37b 100644
--- a/drivers/staging/iio/accel/adis16240.h
+++ b/drivers/staging/iio/accel/adis16240.h
@@ -5,110 +5,160 @@
/* Flash memory write count */
#define ADIS16240_FLASH_CNT 0x00
+
/* Output, power supply */
#define ADIS16240_SUPPLY_OUT 0x02
+
/* Output, x-axis accelerometer */
#define ADIS16240_XACCL_OUT 0x04
+
/* Output, y-axis accelerometer */
#define ADIS16240_YACCL_OUT 0x06
+
/* Output, z-axis accelerometer */
#define ADIS16240_ZACCL_OUT 0x08
+
/* Output, auxiliary ADC input */
#define ADIS16240_AUX_ADC 0x0A
+
/* Output, temperature */
#define ADIS16240_TEMP_OUT 0x0C
+
/* Output, x-axis acceleration peak */
#define ADIS16240_XPEAK_OUT 0x0E
+
/* Output, y-axis acceleration peak */
#define ADIS16240_YPEAK_OUT 0x10
+
/* Output, z-axis acceleration peak */
#define ADIS16240_ZPEAK_OUT 0x12
+
/* Output, sum-of-squares acceleration peak */
#define ADIS16240_XYZPEAK_OUT 0x14
+
/* Output, Capture Buffer 1, X and Y acceleration */
#define ADIS16240_CAPT_BUF1 0x16
+
/* Output, Capture Buffer 2, Z acceleration */
#define ADIS16240_CAPT_BUF2 0x18
+
/* Diagnostic, error flags */
#define ADIS16240_DIAG_STAT 0x1A
+
/* Diagnostic, event counter */
#define ADIS16240_EVNT_CNTR 0x1C
+
/* Diagnostic, check sum value from firmware test */
#define ADIS16240_CHK_SUM 0x1E
+
/* Calibration, x-axis acceleration offset adjustment */
#define ADIS16240_XACCL_OFF 0x20
+
/* Calibration, y-axis acceleration offset adjustment */
#define ADIS16240_YACCL_OFF 0x22
+
/* Calibration, z-axis acceleration offset adjustment */
#define ADIS16240_ZACCL_OFF 0x24
+
/* Clock, hour and minute */
#define ADIS16240_CLK_TIME 0x2E
+
/* Clock, month and day */
#define ADIS16240_CLK_DATE 0x30
+
/* Clock, year */
#define ADIS16240_CLK_YEAR 0x32
+
/* Wake-up setting, hour and minute */
#define ADIS16240_WAKE_TIME 0x34
+
/* Wake-up setting, month and day */
#define ADIS16240_WAKE_DATE 0x36
+
/* Alarm 1 amplitude threshold */
#define ADIS16240_ALM_MAG1 0x38
+
/* Alarm 2 amplitude threshold */
#define ADIS16240_ALM_MAG2 0x3A
+
/* Alarm control */
#define ADIS16240_ALM_CTRL 0x3C
+
/* Capture, external trigger control */
#define ADIS16240_XTRIG_CTRL 0x3E
+
/* Capture, address pointer */
#define ADIS16240_CAPT_PNTR 0x40
+
/* Capture, configuration and control */
#define ADIS16240_CAPT_CTRL 0x42
+
/* General-purpose digital input/output control */
#define ADIS16240_GPIO_CTRL 0x44
+
/* Miscellaneous control */
#define ADIS16240_MSC_CTRL 0x46
+
/* Internal sample period (rate) control */
#define ADIS16240_SMPL_PRD 0x48
+
/* System command */
#define ADIS16240_GLOB_CMD 0x4A
/* MSC_CTRL */
+
/* Enables sum-of-squares output (XYZPEAK_OUT) */
#define ADIS16240_MSC_CTRL_XYZPEAK_OUT_EN BIT(15)
+
/* Enables peak tracking output (XPEAK_OUT, YPEAK_OUT, and ZPEAK_OUT) */
#define ADIS16240_MSC_CTRL_X_Y_ZPEAK_OUT_EN BIT(14)
+
/* Self-test enable: 1 = apply electrostatic force, 0 = disabled */
#define ADIS16240_MSC_CTRL_SELF_TEST_EN BIT(8)
+
/* Data-ready enable: 1 = enabled, 0 = disabled */
#define ADIS16240_MSC_CTRL_DATA_RDY_EN BIT(2)
+
/* Data-ready polarity: 1 = active high, 0 = active low */
#define ADIS16240_MSC_CTRL_ACTIVE_HIGH BIT(1)
+
/* Data-ready line selection: 1 = DIO2, 0 = DIO1 */
#define ADIS16240_MSC_CTRL_DATA_RDY_DIO2 BIT(0)
/* DIAG_STAT */
+
/* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
#define ADIS16240_DIAG_STAT_ALARM2 BIT(9)
+
/* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
#define ADIS16240_DIAG_STAT_ALARM1 BIT(8)
+
/* Capture buffer full: 1 = capture buffer is full */
#define ADIS16240_DIAG_STAT_CPT_BUF_FUL BIT(7)
+
/* Flash test, checksum flag: 1 = mismatch, 0 = match */
#define ADIS16240_DIAG_STAT_CHKSUM BIT(6)
+
/* Power-on, self-test flag: 1 = failure, 0 = pass */
#define ADIS16240_DIAG_STAT_PWRON_FAIL_BIT 5
+
/* Power-on self-test: 1 = in-progress, 0 = complete */
#define ADIS16240_DIAG_STAT_PWRON_BUSY BIT(4)
+
/* SPI communications failure */
#define ADIS16240_DIAG_STAT_SPI_FAIL_BIT 3
+
/* Flash update failure */
#define ADIS16240_DIAG_STAT_FLASH_UPT_BIT 2
+
/* Power supply above 3.625 V */
#define ADIS16240_DIAG_STAT_POWER_HIGH_BIT 1
+
/* Power supply below 3.15 V */
#define ADIS16240_DIAG_STAT_POWER_LOW_BIT 0
/* GLOB_CMD */
+
#define ADIS16240_GLOB_CMD_RESUME BIT(8)
#define ADIS16240_GLOB_CMD_SW_RESET BIT(7)
#define ADIS16240_GLOB_CMD_STANDBY BIT(2)
--
2.5.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2016-03-22 15:10 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-03-22 15:05 [PATCH 0/6] staging: iio: accel: Fix checkpatch warnings, unify style, improve readability Svetlana Orlik
2016-03-22 15:07 ` [PATCH 1/6] staging: iio: accel: adis16204: Fix 'line over 80 characters' warning Svetlana Orlik
2016-03-22 15:08 ` [PATCH 2/6] staging: iio: accel: adis16203: " Svetlana Orlik
2016-03-22 15:08 ` [PATCH 3/6] staging: iio: accel: adis16201: " Svetlana Orlik
2016-03-22 15:09 ` [PATCH 4/6] staging: iio: accel: adis16209: Improve readability Svetlana Orlik
2016-03-22 15:09 ` [PATCH 5/6] staging: iio: accel: adis16220: " Svetlana Orlik
2016-03-22 15:10 ` [PATCH 6/6] staging: iio: accel: adis16240: " Svetlana Orlik
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.